diff options
Diffstat (limited to 'arch/arm/mach-footbridge/include')
| -rw-r--r-- | arch/arm/mach-footbridge/include/mach/hardware.h | 90 | ||||
| -rw-r--r-- | arch/arm/mach-footbridge/include/mach/irqs.h | 97 | ||||
| -rw-r--r-- | arch/arm/mach-footbridge/include/mach/isa-dma.h | 18 | ||||
| -rw-r--r-- | arch/arm/mach-footbridge/include/mach/memory.h | 26 | ||||
| -rw-r--r-- | arch/arm/mach-footbridge/include/mach/uncompress.h | 34 |
5 files changed, 265 insertions, 0 deletions
diff --git a/arch/arm/mach-footbridge/include/mach/hardware.h b/arch/arm/mach-footbridge/include/mach/hardware.h new file mode 100644 index 000000000..985ad3a95 --- /dev/null +++ b/arch/arm/mach-footbridge/include/mach/hardware.h @@ -0,0 +1,90 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * arch/arm/mach-footbridge/include/mach/hardware.h + * + * Copyright (C) 1998-1999 Russell King. + * + * This file contains the hardware definitions of the EBSA-285. + */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +/* Virtual Physical Size + * 0xff800000 0x40000000 1MB X-Bus + * 0xff000000 0x7c000000 1MB PCI I/O space + * 0xfe000000 0x42000000 1MB CSR + * 0xfd000000 0x78000000 1MB Outbound write flush (not supported) + * 0xfc000000 0x79000000 1MB PCI IACK/special space + * 0xfb000000 0x7a000000 16MB PCI Config type 1 + * 0xfa000000 0x7b000000 16MB PCI Config type 0 + * 0xf9000000 0x50000000 1MB Cache flush + * 0xf0000000 0x80000000 16MB ISA memory + */ + +#define XBUS_SIZE 0x00100000 +#define XBUS_BASE 0xff800000 + +#define ARMCSR_SIZE 0x00100000 +#define ARMCSR_BASE 0xfe000000 + +#define WFLUSH_SIZE 0x00100000 +#define WFLUSH_BASE 0xfd000000 + +#define PCIIACK_SIZE 0x00100000 +#define PCIIACK_BASE 0xfc000000 + +#define PCICFG1_SIZE 0x01000000 +#define PCICFG1_BASE 0xfb000000 + +#define PCICFG0_SIZE 0x01000000 +#define PCICFG0_BASE 0xfa000000 + +#define PCIMEM_SIZE 0x01000000 +#define PCIMEM_BASE 0xf0000000 + +#define XBUS_CS2 0x40012000 + +#define XBUS_SWITCH ((volatile unsigned char *)(XBUS_BASE + 0x12000)) +#define XBUS_SWITCH_SWITCH ((*XBUS_SWITCH) & 15) +#define XBUS_SWITCH_J17_13 ((*XBUS_SWITCH) & (1 << 4)) +#define XBUS_SWITCH_J17_11 ((*XBUS_SWITCH) & (1 << 5)) +#define XBUS_SWITCH_J17_9 ((*XBUS_SWITCH) & (1 << 6)) + +#define UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108) /* CSR_ROMBASEMASK */ + + +/* PIC irq control */ +#define PIC_LO 0x20 +#define PIC_MASK_LO 0x21 +#define PIC_HI 0xA0 +#define PIC_MASK_HI 0xA1 + +/* GPIO pins */ +#define GPIO_CCLK 0x800 +#define GPIO_DSCLK 0x400 +#define GPIO_E2CLK 0x200 +#define GPIO_IOLOAD 0x100 +#define GPIO_RED_LED 0x080 +#define GPIO_WDTIMER 0x040 +#define GPIO_DATA 0x020 +#define GPIO_IOCLK 0x010 +#define GPIO_DONE 0x008 +#define GPIO_FAN 0x004 +#define GPIO_GREEN_LED 0x002 +#define GPIO_RESET 0x001 + +/* CPLD pins */ +#define CPLD_DS_ENABLE 8 +#define CPLD_7111_DISABLE 4 +#define CPLD_UNMUTE 2 +#define CPLD_FLASH_WR_ENABLE 1 + +#ifndef __ASSEMBLY__ +extern raw_spinlock_t nw_gpio_lock; +extern void nw_gpio_modify_op(unsigned int mask, unsigned int set); +extern void nw_gpio_modify_io(unsigned int mask, unsigned int in); +extern unsigned int nw_gpio_read(void); +extern void nw_cpld_modify(unsigned int mask, unsigned int set); +#endif + +#endif diff --git a/arch/arm/mach-footbridge/include/mach/irqs.h b/arch/arm/mach-footbridge/include/mach/irqs.h new file mode 100644 index 000000000..a5f41846a --- /dev/null +++ b/arch/arm/mach-footbridge/include/mach/irqs.h @@ -0,0 +1,97 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * arch/arm/mach-footbridge/include/mach/irqs.h + * + * Copyright (C) 1998 Russell King + * Copyright (C) 1998 Phil Blundell + * + * Changelog: + * 20-Jan-1998 RMK Started merge of EBSA286, CATS and NetWinder + * 01-Feb-1999 PJB ISA IRQs start at 0 not 16 + */ +#include <asm/mach-types.h> + +#define NR_IRQS 36 +#define NR_DC21285_IRQS 16 + +#define _ISA_IRQ(x) (0 + (x)) +#define _ISA_INR(x) ((x) - 0) +#define _DC21285_IRQ(x) (16 + (x)) +#define _DC21285_INR(x) ((x) - 16) + +/* + * This is a list of all interrupts that the 21285 + * can generate and we handle. + */ +#define IRQ_CONRX _DC21285_IRQ(0) +#define IRQ_CONTX _DC21285_IRQ(1) +#define IRQ_TIMER1 _DC21285_IRQ(2) +#define IRQ_TIMER2 _DC21285_IRQ(3) +#define IRQ_TIMER3 _DC21285_IRQ(4) +#define IRQ_IN0 _DC21285_IRQ(5) +#define IRQ_IN1 _DC21285_IRQ(6) +#define IRQ_IN2 _DC21285_IRQ(7) +#define IRQ_IN3 _DC21285_IRQ(8) +#define IRQ_DOORBELLHOST _DC21285_IRQ(9) +#define IRQ_DMA1 _DC21285_IRQ(10) +#define IRQ_DMA2 _DC21285_IRQ(11) +#define IRQ_PCI _DC21285_IRQ(12) +#define IRQ_SDRAMPARITY _DC21285_IRQ(13) +#define IRQ_I2OINPOST _DC21285_IRQ(14) +#define IRQ_PCI_ABORT _DC21285_IRQ(15) +#define IRQ_PCI_SERR _DC21285_IRQ(16) +#define IRQ_DISCARD_TIMER _DC21285_IRQ(17) +#define IRQ_PCI_DPERR _DC21285_IRQ(18) +#define IRQ_PCI_PERR _DC21285_IRQ(19) + +#define IRQ_ISA_TIMER _ISA_IRQ(0) +#define IRQ_ISA_KEYBOARD _ISA_IRQ(1) +#define IRQ_ISA_CASCADE _ISA_IRQ(2) +#define IRQ_ISA_UART2 _ISA_IRQ(3) +#define IRQ_ISA_UART _ISA_IRQ(4) +#define IRQ_ISA_FLOPPY _ISA_IRQ(6) +#define IRQ_ISA_PRINTER _ISA_IRQ(7) +#define IRQ_ISA_RTC_ALARM _ISA_IRQ(8) +#define IRQ_ISA_2 _ISA_IRQ(9) +#define IRQ_ISA_PS2MOUSE _ISA_IRQ(12) +#define IRQ_ISA_HARDDISK1 _ISA_IRQ(14) +#define IRQ_ISA_HARDDISK2 _ISA_IRQ(15) + +#define IRQ_MASK_UART_RX (1 << 2) +#define IRQ_MASK_UART_TX (1 << 3) +#define IRQ_MASK_TIMER1 (1 << 4) +#define IRQ_MASK_TIMER2 (1 << 5) +#define IRQ_MASK_TIMER3 (1 << 6) +#define IRQ_MASK_IN0 (1 << 8) +#define IRQ_MASK_IN1 (1 << 9) +#define IRQ_MASK_IN2 (1 << 10) +#define IRQ_MASK_IN3 (1 << 11) +#define IRQ_MASK_DOORBELLHOST (1 << 15) +#define IRQ_MASK_DMA1 (1 << 16) +#define IRQ_MASK_DMA2 (1 << 17) +#define IRQ_MASK_PCI (1 << 18) +#define IRQ_MASK_SDRAMPARITY (1 << 24) +#define IRQ_MASK_I2OINPOST (1 << 25) +#define IRQ_MASK_PCI_ABORT ((1 << 29) | (1 << 30)) +#define IRQ_MASK_PCI_SERR (1 << 23) +#define IRQ_MASK_DISCARD_TIMER (1 << 27) +#define IRQ_MASK_PCI_DPERR (1 << 28) +#define IRQ_MASK_PCI_PERR (1 << 31) + +/* + * Netwinder interrupt allocations + */ +#define IRQ_NETWINDER_ETHER10 IRQ_IN0 +#define IRQ_NETWINDER_ETHER100 IRQ_IN1 +#define IRQ_NETWINDER_VIDCOMP IRQ_IN2 +#define IRQ_NETWINDER_PS2MOUSE _ISA_IRQ(5) +#define IRQ_NETWINDER_IR _ISA_IRQ(6) +#define IRQ_NETWINDER_BUTTON _ISA_IRQ(10) +#define IRQ_NETWINDER_VGA _ISA_IRQ(11) +#define IRQ_NETWINDER_SOUND _ISA_IRQ(12) + +#define I8042_KBD_IRQ IRQ_ISA_KEYBOARD +#define I8042_AUX_IRQ (machine_is_netwinder() ? IRQ_NETWINDER_PS2MOUSE : IRQ_ISA_PS2MOUSE) +#define IRQ_FLOPPYDISK IRQ_ISA_FLOPPY + +#define irq_canonicalize(_i) (((_i) == IRQ_ISA_CASCADE) ? IRQ_ISA_2 : _i) diff --git a/arch/arm/mach-footbridge/include/mach/isa-dma.h b/arch/arm/mach-footbridge/include/mach/isa-dma.h new file mode 100644 index 000000000..b10731a1f --- /dev/null +++ b/arch/arm/mach-footbridge/include/mach/isa-dma.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * arch/arm/mach-footbridge/include/mach/isa-dma.h + * + * Architecture DMA routines + * + * Copyright (C) 1998,1999 Russell King + * Copyright (C) 1998,1999 Philip Blundell + */ +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +#define MAX_DMA_CHANNELS 8 + +#define DMA_FLOPPY (2) +#define DMA_ISA_CASCADE (4) + +#endif /* _ASM_ARCH_DMA_H */ diff --git a/arch/arm/mach-footbridge/include/mach/memory.h b/arch/arm/mach-footbridge/include/mach/memory.h new file mode 100644 index 000000000..951687766 --- /dev/null +++ b/arch/arm/mach-footbridge/include/mach/memory.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * arch/arm/mach-footbridge/include/mach/memory.h + * + * Copyright (C) 1996-1999 Russell King. + * + * Changelog: + * 20-Oct-1996 RMK Created + * 31-Dec-1997 RMK Fixed definitions to reduce warnings. + * 17-May-1998 DAG Added __virt_to_bus and __bus_to_virt functions. + * 21-Nov-1998 RMK Changed __virt_to_bus and __bus_to_virt to macros. + * 21-Mar-1999 RMK Added PAGE_OFFSET for co285 architecture. + * Renamed to memory.h + * Moved PAGE_OFFSET and TASK_SIZE here + */ +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +/* + * Cache flushing area. + */ +#define FLUSH_BASE 0xf9000000 + +#define FLUSH_BASE_PHYS 0x50000000 + +#endif diff --git a/arch/arm/mach-footbridge/include/mach/uncompress.h b/arch/arm/mach-footbridge/include/mach/uncompress.h new file mode 100644 index 000000000..28b577e29 --- /dev/null +++ b/arch/arm/mach-footbridge/include/mach/uncompress.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * arch/arm/mach-footbridge/include/mach/uncompress.h + * + * Copyright (C) 1996-1999 Russell King + */ +#include <asm/mach-types.h> + +/* + * Note! This could cause problems on the NetWinder + */ +#define DC21285_BASE ((volatile unsigned int *)0x42000160) +#define SER0_BASE ((volatile unsigned char *)0x7c0003f8) + +static inline void putc(char c) +{ + if (machine_is_netwinder()) { + while ((SER0_BASE[5] & 0x60) != 0x60) + barrier(); + SER0_BASE[0] = c; + } else { + while (DC21285_BASE[6] & 8); + DC21285_BASE[0] = c; + } +} + +static inline void flush(void) +{ +} + +/* + * nothing to do + */ +#define arch_decomp_setup() |