diff options
Diffstat (limited to 'drivers/staging/media/atomisp/i2c')
18 files changed, 16402 insertions, 0 deletions
diff --git a/drivers/staging/media/atomisp/i2c/Kconfig b/drivers/staging/media/atomisp/i2c/Kconfig new file mode 100644 index 000000000..e726101b2 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/Kconfig @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Kconfig for sensor drivers +# + +config VIDEO_ATOMISP_OV2722 + tristate "OVT ov2722 sensor support" + depends on ACPI + depends on I2C && VIDEO_DEV + help + This is a Video4Linux2 sensor-level driver for the OVT + OV2722 raw camera. + + OVT is a 2M raw sensor. + + It currently only works with the atomisp driver. + +config VIDEO_ATOMISP_GC2235 + tristate "Galaxy gc2235 sensor support" + depends on ACPI + depends on I2C && VIDEO_DEV + help + This is a Video4Linux2 sensor-level driver for the OVT + GC2235 raw camera. + + GC2235 is a 2M raw sensor. + + It currently only works with the atomisp driver. + +config VIDEO_ATOMISP_MSRLIST_HELPER + tristate "Helper library to load, parse and apply large register lists." + depends on I2C + help + This is a helper library to be used from a sensor driver to load, parse + and apply large register lists. + + To compile this driver as a module, choose M here: the + module will be called libmsrlisthelper. + +config VIDEO_ATOMISP_MT9M114 + tristate "Aptina mt9m114 sensor support" + depends on ACPI + depends on I2C && VIDEO_DEV + help + This is a Video4Linux2 sensor-level driver for the Micron + mt9m114 1.3 Mpixel camera. + + mt9m114 is video camera sensor. + + It currently only works with the atomisp driver. + +config VIDEO_ATOMISP_GC0310 + tristate "GC0310 sensor support" + depends on ACPI + depends on I2C && VIDEO_DEV + help + This is a Video4Linux2 sensor-level driver for the Galaxycore + GC0310 0.3MP sensor. + +config VIDEO_ATOMISP_OV2680 + tristate "Omnivision OV2680 sensor support" + depends on ACPI + depends on I2C && VIDEO_DEV + help + This is a Video4Linux2 sensor-level driver for the Omnivision + OV2680 raw camera. + + ov2680 is a 2M raw sensor. + + It currently only works with the atomisp driver. + +config VIDEO_ATOMISP_OV5693 + tristate "Omnivision ov5693 sensor support" + depends on ACPI + depends on I2C && VIDEO_DEV + help + This is a Video4Linux2 sensor-level driver for the Micron + ov5693 5 Mpixel camera. + + ov5693 is video camera sensor. + + It currently only works with the atomisp driver. + +# +# Kconfig for flash drivers +# + +config VIDEO_ATOMISP_LM3554 + tristate "LM3554 flash light driver" + depends on ACPI + depends on VIDEO_DEV && I2C + help + This is a Video4Linux2 sub-dev driver for the LM3554 + flash light driver. + + To compile this driver as a module, choose M here: the + module will be called lm3554 diff --git a/drivers/staging/media/atomisp/i2c/Makefile b/drivers/staging/media/atomisp/i2c/Makefile new file mode 100644 index 000000000..8d022986e --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/Makefile @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Makefile for sensor drivers +# + +obj-$(CONFIG_VIDEO_ATOMISP_OV5693) += ov5693/ +obj-$(CONFIG_VIDEO_ATOMISP_MT9M114) += atomisp-mt9m114.o +obj-$(CONFIG_VIDEO_ATOMISP_GC2235) += atomisp-gc2235.o +obj-$(CONFIG_VIDEO_ATOMISP_OV2722) += atomisp-ov2722.o +obj-$(CONFIG_VIDEO_ATOMISP_OV2680) += atomisp-ov2680.o +obj-$(CONFIG_VIDEO_ATOMISP_GC0310) += atomisp-gc0310.o + +obj-$(CONFIG_VIDEO_ATOMISP_MSRLIST_HELPER) += atomisp-libmsrlisthelper.o + +# Makefile for flash drivers +# + +obj-$(CONFIG_VIDEO_ATOMISP_LM3554) += atomisp-lm3554.o diff --git a/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c new file mode 100644 index 000000000..783f1b88e --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c @@ -0,0 +1,1299 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Support for GalaxyCore GC0310 VGA camera sensor. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/module.h> +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/mm.h> +#include <linux/string.h> +#include <linux/errno.h> +#include <linux/init.h> +#include <linux/kmod.h> +#include <linux/device.h> +#include <linux/delay.h> +#include <linux/slab.h> +#include <linux/i2c.h> +#include <linux/moduleparam.h> +#include <media/v4l2-device.h> +#include <linux/io.h> +#include "../include/linux/atomisp_gmin_platform.h" + +#include "gc0310.h" + +/* i2c read/write stuff */ +static int gc0310_read_reg(struct i2c_client *client, + u16 data_length, u8 reg, u8 *val) +{ + int err; + struct i2c_msg msg[2]; + unsigned char data[1]; + + if (!client->adapter) { + dev_err(&client->dev, "%s error, no client->adapter\n", + __func__); + return -ENODEV; + } + + if (data_length != GC0310_8BIT) { + dev_err(&client->dev, "%s error, invalid data length\n", + __func__); + return -EINVAL; + } + + memset(msg, 0, sizeof(msg)); + + msg[0].addr = client->addr; + msg[0].flags = 0; + msg[0].len = I2C_MSG_LENGTH; + msg[0].buf = data; + + /* high byte goes out first */ + data[0] = (u8)(reg & 0xff); + + msg[1].addr = client->addr; + msg[1].len = data_length; + msg[1].flags = I2C_M_RD; + msg[1].buf = data; + + err = i2c_transfer(client->adapter, msg, 2); + if (err != 2) { + if (err >= 0) + err = -EIO; + dev_err(&client->dev, + "read from offset 0x%x error %d", reg, err); + return err; + } + + *val = 0; + /* high byte comes first */ + if (data_length == GC0310_8BIT) + *val = (u8)data[0]; + + return 0; +} + +static int gc0310_i2c_write(struct i2c_client *client, u16 len, u8 *data) +{ + struct i2c_msg msg; + const int num_msg = 1; + int ret; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = len; + msg.buf = data; + ret = i2c_transfer(client->adapter, &msg, 1); + + return ret == num_msg ? 0 : -EIO; +} + +static int gc0310_write_reg(struct i2c_client *client, u16 data_length, + u8 reg, u8 val) +{ + int ret; + unsigned char data[2] = {0}; + u8 *wreg = (u8 *)data; + const u16 len = data_length + sizeof(u8); /* 8-bit address + data */ + + if (data_length != GC0310_8BIT) { + dev_err(&client->dev, + "%s error, invalid data_length\n", __func__); + return -EINVAL; + } + + /* high byte goes out first */ + *wreg = (u8)(reg & 0xff); + + if (data_length == GC0310_8BIT) + data[1] = (u8)(val); + + ret = gc0310_i2c_write(client, len, data); + if (ret) + dev_err(&client->dev, + "write error: wrote 0x%x to offset 0x%x error %d", + val, reg, ret); + + return ret; +} + +/* + * gc0310_write_reg_array - Initializes a list of GC0310 registers + * @client: i2c driver client structure + * @reglist: list of registers to be written + * + * This function initializes a list of registers. When consecutive addresses + * are found in a row on the list, this function creates a buffer and sends + * consecutive data in a single i2c_transfer(). + * + * __gc0310_flush_reg_array, __gc0310_buf_reg_array() and + * __gc0310_write_reg_is_consecutive() are internal functions to + * gc0310_write_reg_array_fast() and should be not used anywhere else. + * + */ + +static int __gc0310_flush_reg_array(struct i2c_client *client, + struct gc0310_write_ctrl *ctrl) +{ + u16 size; + + if (ctrl->index == 0) + return 0; + + size = sizeof(u8) + ctrl->index; /* 8-bit address + data */ + ctrl->buffer.addr = (u8)(ctrl->buffer.addr); + ctrl->index = 0; + + return gc0310_i2c_write(client, size, (u8 *)&ctrl->buffer); +} + +static int __gc0310_buf_reg_array(struct i2c_client *client, + struct gc0310_write_ctrl *ctrl, + const struct gc0310_reg *next) +{ + int size; + + switch (next->type) { + case GC0310_8BIT: + size = 1; + ctrl->buffer.data[ctrl->index] = (u8)next->val; + break; + default: + return -EINVAL; + } + + /* When first item is added, we need to store its starting address */ + if (ctrl->index == 0) + ctrl->buffer.addr = next->reg; + + ctrl->index += size; + + /* + * Buffer cannot guarantee free space for u32? Better flush it to avoid + * possible lack of memory for next item. + */ + if (ctrl->index + sizeof(u8) >= GC0310_MAX_WRITE_BUF_SIZE) + return __gc0310_flush_reg_array(client, ctrl); + + return 0; +} + +static int __gc0310_write_reg_is_consecutive(struct i2c_client *client, + struct gc0310_write_ctrl *ctrl, + const struct gc0310_reg *next) +{ + if (ctrl->index == 0) + return 1; + + return ctrl->buffer.addr + ctrl->index == next->reg; +} + +static int gc0310_write_reg_array(struct i2c_client *client, + const struct gc0310_reg *reglist) +{ + const struct gc0310_reg *next = reglist; + struct gc0310_write_ctrl ctrl; + int err; + + ctrl.index = 0; + for (; next->type != GC0310_TOK_TERM; next++) { + switch (next->type & GC0310_TOK_MASK) { + case GC0310_TOK_DELAY: + err = __gc0310_flush_reg_array(client, &ctrl); + if (err) + return err; + msleep(next->val); + break; + default: + /* + * If next address is not consecutive, data needs to be + * flushed before proceed. + */ + if (!__gc0310_write_reg_is_consecutive(client, &ctrl, + next)) { + err = __gc0310_flush_reg_array(client, &ctrl); + if (err) + return err; + } + err = __gc0310_buf_reg_array(client, &ctrl, next); + if (err) { + dev_err(&client->dev, "%s: write error, aborted\n", + __func__); + return err; + } + break; + } + } + + return __gc0310_flush_reg_array(client, &ctrl); +} + +static int gc0310_g_focal(struct v4l2_subdev *sd, s32 *val) +{ + *val = (GC0310_FOCAL_LENGTH_NUM << 16) | GC0310_FOCAL_LENGTH_DEM; + return 0; +} + +static int gc0310_g_fnumber(struct v4l2_subdev *sd, s32 *val) +{ + /*const f number for imx*/ + *val = (GC0310_F_NUMBER_DEFAULT_NUM << 16) | GC0310_F_NUMBER_DEM; + return 0; +} + +static int gc0310_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) +{ + *val = (GC0310_F_NUMBER_DEFAULT_NUM << 24) | + (GC0310_F_NUMBER_DEM << 16) | + (GC0310_F_NUMBER_DEFAULT_NUM << 8) | GC0310_F_NUMBER_DEM; + return 0; +} + +static int gc0310_g_bin_factor_x(struct v4l2_subdev *sd, s32 *val) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + + *val = dev->res->bin_factor_x; + + return 0; +} + +static int gc0310_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + + *val = dev->res->bin_factor_y; + + return 0; +} + +static int gc0310_get_intg_factor(struct i2c_client *client, + struct camera_mipi_info *info, + const struct gc0310_resolution *res) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct gc0310_device *dev = to_gc0310_sensor(sd); + struct atomisp_sensor_mode_data *buf = &info->data; + u16 val; + u8 reg_val; + int ret; + unsigned int hori_blanking; + unsigned int vert_blanking; + unsigned int sh_delay; + + if (!info) + return -EINVAL; + + /* pixel clock calculattion */ + dev->vt_pix_clk_freq_mhz = 14400000; // 16.8MHz + buf->vt_pix_clk_freq_mhz = dev->vt_pix_clk_freq_mhz; + dev_dbg(&client->dev, "vt_pix_clk_freq_mhz=%d\n", buf->vt_pix_clk_freq_mhz); + + /* get integration time */ + buf->coarse_integration_time_min = GC0310_COARSE_INTG_TIME_MIN; + buf->coarse_integration_time_max_margin = + GC0310_COARSE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_min = GC0310_FINE_INTG_TIME_MIN; + buf->fine_integration_time_max_margin = + GC0310_FINE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_def = GC0310_FINE_INTG_TIME_MIN; + buf->read_mode = res->bin_mode; + + /* get the cropping and output resolution to ISP for this mode. */ + /* Getting crop_horizontal_start */ + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_H_CROP_START_H, ®_val); + if (ret) + return ret; + val = (reg_val & 0xFF) << 8; + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_H_CROP_START_L, ®_val); + if (ret) + return ret; + buf->crop_horizontal_start = val | (reg_val & 0xFF); + dev_dbg(&client->dev, "crop_horizontal_start=%d\n", buf->crop_horizontal_start); + + /* Getting crop_vertical_start */ + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_V_CROP_START_H, ®_val); + if (ret) + return ret; + val = (reg_val & 0xFF) << 8; + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_V_CROP_START_L, ®_val); + if (ret) + return ret; + buf->crop_vertical_start = val | (reg_val & 0xFF); + dev_dbg(&client->dev, "crop_vertical_start=%d\n", buf->crop_vertical_start); + + /* Getting output_width */ + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_H_OUTSIZE_H, ®_val); + if (ret) + return ret; + val = (reg_val & 0xFF) << 8; + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_H_OUTSIZE_L, ®_val); + if (ret) + return ret; + buf->output_width = val | (reg_val & 0xFF); + dev_dbg(&client->dev, "output_width=%d\n", buf->output_width); + + /* Getting output_height */ + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_V_OUTSIZE_H, ®_val); + if (ret) + return ret; + val = (reg_val & 0xFF) << 8; + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_V_OUTSIZE_L, ®_val); + if (ret) + return ret; + buf->output_height = val | (reg_val & 0xFF); + dev_dbg(&client->dev, "output_height=%d\n", buf->output_height); + + buf->crop_horizontal_end = buf->crop_horizontal_start + buf->output_width - 1; + buf->crop_vertical_end = buf->crop_vertical_start + buf->output_height - 1; + dev_dbg(&client->dev, "crop_horizontal_end=%d\n", buf->crop_horizontal_end); + dev_dbg(&client->dev, "crop_vertical_end=%d\n", buf->crop_vertical_end); + + /* Getting line_length_pck */ + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_H_BLANKING_H, ®_val); + if (ret) + return ret; + val = (reg_val & 0xFF) << 8; + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_H_BLANKING_L, ®_val); + if (ret) + return ret; + hori_blanking = val | (reg_val & 0xFF); + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_SH_DELAY, ®_val); + if (ret) + return ret; + sh_delay = reg_val; + buf->line_length_pck = buf->output_width + hori_blanking + sh_delay + 4; + dev_dbg(&client->dev, "hori_blanking=%d sh_delay=%d line_length_pck=%d\n", hori_blanking, + sh_delay, buf->line_length_pck); + + /* Getting frame_length_lines */ + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_V_BLANKING_H, ®_val); + if (ret) + return ret; + val = (reg_val & 0xFF) << 8; + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_V_BLANKING_L, ®_val); + if (ret) + return ret; + vert_blanking = val | (reg_val & 0xFF); + buf->frame_length_lines = buf->output_height + vert_blanking; + dev_dbg(&client->dev, "vert_blanking=%d frame_length_lines=%d\n", vert_blanking, + buf->frame_length_lines); + + buf->binning_factor_x = res->bin_factor_x ? + res->bin_factor_x : 1; + buf->binning_factor_y = res->bin_factor_y ? + res->bin_factor_y : 1; + return 0; +} + +static int gc0310_set_gain(struct v4l2_subdev *sd, int gain) + +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + u8 again, dgain; + + if (gain < 0x20) + gain = 0x20; + if (gain > 0x80) + gain = 0x80; + + if (gain >= 0x20 && gain < 0x40) { + again = 0x0; /* sqrt(2) */ + dgain = gain; + } else { + again = 0x2; /* 2 * sqrt(2) */ + dgain = gain / 2; + } + + dev_dbg(&client->dev, "gain=0x%x again=0x%x dgain=0x%x\n", gain, again, dgain); + + /* set analog gain */ + ret = gc0310_write_reg(client, GC0310_8BIT, + GC0310_AGC_ADJ, again); + if (ret) + return ret; + + /* set digital gain */ + ret = gc0310_write_reg(client, GC0310_8BIT, + GC0310_DGC_ADJ, dgain); + if (ret) + return ret; + + return 0; +} + +static int __gc0310_set_exposure(struct v4l2_subdev *sd, int coarse_itg, + int gain, int digitgain) + +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + dev_dbg(&client->dev, "coarse_itg=%d gain=%d digitgain=%d\n", coarse_itg, gain, digitgain); + + /* set exposure */ + ret = gc0310_write_reg(client, GC0310_8BIT, + GC0310_AEC_PK_EXPO_L, + coarse_itg & 0xff); + if (ret) + return ret; + + ret = gc0310_write_reg(client, GC0310_8BIT, + GC0310_AEC_PK_EXPO_H, + (coarse_itg >> 8) & 0x0f); + if (ret) + return ret; + + ret = gc0310_set_gain(sd, gain); + if (ret) + return ret; + + return ret; +} + +static int gc0310_set_exposure(struct v4l2_subdev *sd, int exposure, + int gain, int digitgain) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + int ret; + + mutex_lock(&dev->input_lock); + ret = __gc0310_set_exposure(sd, exposure, gain, digitgain); + mutex_unlock(&dev->input_lock); + + return ret; +} + +static long gc0310_s_exposure(struct v4l2_subdev *sd, + struct atomisp_exposure *exposure) +{ + int exp = exposure->integration_time[0]; + int gain = exposure->gain[0]; + int digitgain = exposure->gain[1]; + + /* we should not accept the invalid value below. */ + if (gain == 0) { + struct i2c_client *client = v4l2_get_subdevdata(sd); + + v4l2_err(client, "%s: invalid value\n", __func__); + return -EINVAL; + } + + return gc0310_set_exposure(sd, exp, gain, digitgain); +} + +/* TO DO */ +static int gc0310_v_flip(struct v4l2_subdev *sd, s32 value) +{ + return 0; +} + +/* TO DO */ +static int gc0310_h_flip(struct v4l2_subdev *sd, s32 value) +{ + return 0; +} + +static long gc0310_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) +{ + switch (cmd) { + case ATOMISP_IOC_S_EXPOSURE: + return gc0310_s_exposure(sd, arg); + default: + return -EINVAL; + } + return 0; +} + +/* This returns the exposure time being used. This should only be used + * for filling in EXIF data, not for actual image processing. + */ +static int gc0310_q_exposure(struct v4l2_subdev *sd, s32 *value) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u8 reg_v; + int ret; + + /* get exposure */ + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_AEC_PK_EXPO_L, + ®_v); + if (ret) + goto err; + + *value = reg_v; + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_AEC_PK_EXPO_H, + ®_v); + if (ret) + goto err; + + *value = *value + (reg_v << 8); +err: + return ret; +} + +static int gc0310_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct gc0310_device *dev = + container_of(ctrl->handler, struct gc0310_device, ctrl_handler); + struct i2c_client *client = v4l2_get_subdevdata(&dev->sd); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_VFLIP: + dev_dbg(&client->dev, "%s: CID_VFLIP:%d.\n", + __func__, ctrl->val); + ret = gc0310_v_flip(&dev->sd, ctrl->val); + break; + case V4L2_CID_HFLIP: + dev_dbg(&client->dev, "%s: CID_HFLIP:%d.\n", + __func__, ctrl->val); + ret = gc0310_h_flip(&dev->sd, ctrl->val); + break; + default: + ret = -EINVAL; + } + return ret; +} + +static int gc0310_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct gc0310_device *dev = + container_of(ctrl->handler, struct gc0310_device, ctrl_handler); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_EXPOSURE_ABSOLUTE: + ret = gc0310_q_exposure(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FOCAL_ABSOLUTE: + ret = gc0310_g_focal(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_ABSOLUTE: + ret = gc0310_g_fnumber(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_RANGE: + ret = gc0310_g_fnumber_range(&dev->sd, &ctrl->val); + break; + case V4L2_CID_BIN_FACTOR_HORZ: + ret = gc0310_g_bin_factor_x(&dev->sd, &ctrl->val); + break; + case V4L2_CID_BIN_FACTOR_VERT: + ret = gc0310_g_bin_factor_y(&dev->sd, &ctrl->val); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static const struct v4l2_ctrl_ops ctrl_ops = { + .s_ctrl = gc0310_s_ctrl, + .g_volatile_ctrl = gc0310_g_volatile_ctrl +}; + +static const struct v4l2_ctrl_config gc0310_controls[] = { + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "exposure", + .min = 0x0, + .max = 0xffff, + .step = 0x01, + .def = 0x00, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_VFLIP, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Flip", + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_HFLIP, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Mirror", + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focal length", + .min = GC0310_FOCAL_LENGTH_DEFAULT, + .max = GC0310_FOCAL_LENGTH_DEFAULT, + .step = 0x01, + .def = GC0310_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number", + .min = GC0310_F_NUMBER_DEFAULT, + .max = GC0310_F_NUMBER_DEFAULT, + .step = 0x01, + .def = GC0310_F_NUMBER_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number range", + .min = GC0310_F_NUMBER_RANGE, + .max = GC0310_F_NUMBER_RANGE, + .step = 0x01, + .def = GC0310_F_NUMBER_RANGE, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_HORZ, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "horizontal binning factor", + .min = 0, + .max = GC0310_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_VERT, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "vertical binning factor", + .min = 0, + .max = GC0310_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, +}; + +static int gc0310_init(struct v4l2_subdev *sd) +{ + int ret; + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct gc0310_device *dev = to_gc0310_sensor(sd); + + mutex_lock(&dev->input_lock); + + /* set initial registers */ + ret = gc0310_write_reg_array(client, gc0310_reset_register); + + /* restore settings */ + gc0310_res = gc0310_res_preview; + N_RES = N_RES_PREVIEW; + + mutex_unlock(&dev->input_lock); + + return ret; +} + +static int power_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret = 0; + struct gc0310_device *dev = to_gc0310_sensor(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + if (flag) { + /* The upstream module driver (written to Crystal + * Cove) had this logic to pulse the rails low first. + * This appears to break things on the MRD7 with the + * X-Powers PMIC... + * + * ret = dev->platform_data->v1p8_ctrl(sd, 0); + * ret |= dev->platform_data->v2p8_ctrl(sd, 0); + * mdelay(50); + */ + ret |= dev->platform_data->v1p8_ctrl(sd, 1); + ret |= dev->platform_data->v2p8_ctrl(sd, 1); + usleep_range(10000, 15000); + } + + if (!flag || ret) { + ret |= dev->platform_data->v1p8_ctrl(sd, 0); + ret |= dev->platform_data->v2p8_ctrl(sd, 0); + } + return ret; +} + +static int gpio_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret; + struct gc0310_device *dev = to_gc0310_sensor(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + /* GPIO0 == "reset" (active low), GPIO1 == "power down" */ + if (flag) { + /* Pulse reset, then release power down */ + ret = dev->platform_data->gpio0_ctrl(sd, 0); + usleep_range(5000, 10000); + ret |= dev->platform_data->gpio0_ctrl(sd, 1); + usleep_range(10000, 15000); + ret |= dev->platform_data->gpio1_ctrl(sd, 0); + usleep_range(10000, 15000); + } else { + ret = dev->platform_data->gpio1_ctrl(sd, 1); + ret |= dev->platform_data->gpio0_ctrl(sd, 0); + } + return ret; +} + +static int power_down(struct v4l2_subdev *sd); + +static int power_up(struct v4l2_subdev *sd) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + + /* power control */ + ret = power_ctrl(sd, 1); + if (ret) + goto fail_power; + + /* flis clock control */ + ret = dev->platform_data->flisclk_ctrl(sd, 1); + if (ret) + goto fail_clk; + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 1); + if (ret) { + ret = gpio_ctrl(sd, 1); + if (ret) + goto fail_gpio; + } + + msleep(100); + + return 0; + +fail_gpio: + dev->platform_data->flisclk_ctrl(sd, 0); +fail_clk: + power_ctrl(sd, 0); +fail_power: + dev_err(&client->dev, "sensor power-up failed\n"); + + return ret; +} + +static int power_down(struct v4l2_subdev *sd) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 0); + if (ret) { + ret = gpio_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "gpio failed 2\n"); + } + + ret = dev->platform_data->flisclk_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "flisclk failed\n"); + + /* power control */ + ret = power_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "vprog failed.\n"); + + return ret; +} + +static int gc0310_s_power(struct v4l2_subdev *sd, int on) +{ + int ret; + + if (on == 0) + return power_down(sd); + + ret = power_up(sd); + if (ret) + return ret; + + return gc0310_init(sd); +} + +/* TODO: remove it. */ +static int startup(struct v4l2_subdev *sd) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + ret = gc0310_write_reg_array(client, dev->res->regs); + if (ret) { + dev_err(&client->dev, "gc0310 write register err.\n"); + return ret; + } + + return ret; +} + +static int gc0310_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct gc0310_device *dev = to_gc0310_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct camera_mipi_info *gc0310_info = NULL; + struct gc0310_resolution *res; + int ret = 0; + + if (format->pad) + return -EINVAL; + + if (!fmt) + return -EINVAL; + + gc0310_info = v4l2_get_subdev_hostdata(sd); + if (!gc0310_info) + return -EINVAL; + + mutex_lock(&dev->input_lock); + + res = v4l2_find_nearest_size(gc0310_res_preview, + ARRAY_SIZE(gc0310_res_preview), width, + height, fmt->width, fmt->height); + if (!res) + res = &gc0310_res_preview[N_RES - 1]; + + fmt->width = res->width; + fmt->height = res->height; + dev->res = res; + + fmt->code = MEDIA_BUS_FMT_SGRBG8_1X8; + + if (format->which == V4L2_SUBDEV_FORMAT_TRY) { + sd_state->pads->try_fmt = *fmt; + mutex_unlock(&dev->input_lock); + return 0; + } + + dev_dbg(&client->dev, "%s: before gc0310_write_reg_array %s\n", + __func__, dev->res->desc); + ret = startup(sd); + if (ret) { + dev_err(&client->dev, "gc0310 startup err\n"); + goto err; + } + + ret = gc0310_get_intg_factor(client, gc0310_info, dev->res); + if (ret) { + dev_err(&client->dev, "failed to get integration_factor\n"); + goto err; + } + +err: + mutex_unlock(&dev->input_lock); + return ret; +} + +static int gc0310_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct gc0310_device *dev = to_gc0310_sensor(sd); + + if (format->pad) + return -EINVAL; + + if (!fmt) + return -EINVAL; + + fmt->width = dev->res->width; + fmt->height = dev->res->height; + fmt->code = MEDIA_BUS_FMT_SGRBG8_1X8; + + return 0; +} + +static int gc0310_detect(struct i2c_client *client) +{ + struct i2c_adapter *adapter = client->adapter; + u8 high, low; + int ret; + u16 id; + + if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) + return -ENODEV; + + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_SC_CMMN_CHIP_ID_H, &high); + if (ret) { + dev_err(&client->dev, "read sensor_id_high failed\n"); + return -ENODEV; + } + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_SC_CMMN_CHIP_ID_L, &low); + if (ret) { + dev_err(&client->dev, "read sensor_id_low failed\n"); + return -ENODEV; + } + id = ((((u16)high) << 8) | (u16)low); + dev_dbg(&client->dev, "sensor ID = 0x%x\n", id); + + if (id != GC0310_ID) { + dev_err(&client->dev, "sensor ID error, read id = 0x%x, target id = 0x%x\n", id, + GC0310_ID); + return -ENODEV; + } + + dev_dbg(&client->dev, "detect gc0310 success\n"); + + return 0; +} + +static int gc0310_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + dev_dbg(&client->dev, "%s S enable=%d\n", __func__, enable); + mutex_lock(&dev->input_lock); + + if (enable) { + /* enable per frame MIPI and sensor ctrl reset */ + ret = gc0310_write_reg(client, GC0310_8BIT, + 0xFE, 0x30); + if (ret) { + mutex_unlock(&dev->input_lock); + return ret; + } + } + + ret = gc0310_write_reg(client, GC0310_8BIT, + GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_3); + if (ret) { + mutex_unlock(&dev->input_lock); + return ret; + } + + ret = gc0310_write_reg(client, GC0310_8BIT, GC0310_SW_STREAM, + enable ? GC0310_START_STREAMING : + GC0310_STOP_STREAMING); + if (ret) { + mutex_unlock(&dev->input_lock); + return ret; + } + + ret = gc0310_write_reg(client, GC0310_8BIT, + GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_0); + if (ret) { + mutex_unlock(&dev->input_lock); + return ret; + } + + mutex_unlock(&dev->input_lock); + return ret; +} + +static int gc0310_s_config(struct v4l2_subdev *sd, + int irq, void *platform_data) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + if (!platform_data) + return -ENODEV; + + dev->platform_data = + (struct camera_sensor_platform_data *)platform_data; + + mutex_lock(&dev->input_lock); + /* power off the module, then power on it in future + * as first power on by board may not fulfill the + * power on sequqence needed by the module + */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "gc0310 power-off err.\n"); + goto fail_power_off; + } + + ret = power_up(sd); + if (ret) { + dev_err(&client->dev, "gc0310 power-up err.\n"); + goto fail_power_on; + } + + ret = dev->platform_data->csi_cfg(sd, 1); + if (ret) + goto fail_csi_cfg; + + /* config & detect sensor */ + ret = gc0310_detect(client); + if (ret) { + dev_err(&client->dev, "gc0310_detect err s_config.\n"); + goto fail_csi_cfg; + } + + /* turn off sensor, after probed */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "gc0310 power-off err.\n"); + goto fail_csi_cfg; + } + mutex_unlock(&dev->input_lock); + + return 0; + +fail_csi_cfg: + dev->platform_data->csi_cfg(sd, 0); +fail_power_on: + power_down(sd); + dev_err(&client->dev, "sensor power-gating failed\n"); +fail_power_off: + mutex_unlock(&dev->input_lock); + return ret; +} + +static int gc0310_g_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *interval) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + + interval->interval.numerator = 1; + interval->interval.denominator = dev->res->fps; + + return 0; +} + +static int gc0310_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index >= MAX_FMTS) + return -EINVAL; + + code->code = MEDIA_BUS_FMT_SGRBG8_1X8; + return 0; +} + +static int gc0310_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_frame_size_enum *fse) +{ + int index = fse->index; + + if (index >= N_RES) + return -EINVAL; + + fse->min_width = gc0310_res[index].width; + fse->min_height = gc0310_res[index].height; + fse->max_width = gc0310_res[index].width; + fse->max_height = gc0310_res[index].height; + + return 0; +} + +static int gc0310_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + + mutex_lock(&dev->input_lock); + *frames = dev->res->skip_frames; + mutex_unlock(&dev->input_lock); + + return 0; +} + +static const struct v4l2_subdev_sensor_ops gc0310_sensor_ops = { + .g_skip_frames = gc0310_g_skip_frames, +}; + +static const struct v4l2_subdev_video_ops gc0310_video_ops = { + .s_stream = gc0310_s_stream, + .g_frame_interval = gc0310_g_frame_interval, +}; + +static const struct v4l2_subdev_core_ops gc0310_core_ops = { + .s_power = gc0310_s_power, + .ioctl = gc0310_ioctl, +}; + +static const struct v4l2_subdev_pad_ops gc0310_pad_ops = { + .enum_mbus_code = gc0310_enum_mbus_code, + .enum_frame_size = gc0310_enum_frame_size, + .get_fmt = gc0310_get_fmt, + .set_fmt = gc0310_set_fmt, +}; + +static const struct v4l2_subdev_ops gc0310_ops = { + .core = &gc0310_core_ops, + .video = &gc0310_video_ops, + .pad = &gc0310_pad_ops, + .sensor = &gc0310_sensor_ops, +}; + +static void gc0310_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct gc0310_device *dev = to_gc0310_sensor(sd); + + dev_dbg(&client->dev, "gc0310_remove...\n"); + + dev->platform_data->csi_cfg(sd, 0); + + v4l2_device_unregister_subdev(sd); + media_entity_cleanup(&dev->sd.entity); + v4l2_ctrl_handler_free(&dev->ctrl_handler); + kfree(dev); +} + +static int gc0310_probe(struct i2c_client *client) +{ + struct gc0310_device *dev; + int ret; + void *pdata; + unsigned int i; + + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + mutex_init(&dev->input_lock); + + dev->res = &gc0310_res_preview[0]; + v4l2_i2c_subdev_init(&dev->sd, client, &gc0310_ops); + + pdata = gmin_camera_platform_data(&dev->sd, + ATOMISP_INPUT_FORMAT_RAW_8, + atomisp_bayer_order_grbg); + if (!pdata) { + ret = -EINVAL; + goto out_free; + } + + ret = gc0310_s_config(&dev->sd, client->irq, pdata); + if (ret) + goto out_free; + + ret = atomisp_register_i2c_module(&dev->sd, pdata, RAW_CAMERA); + if (ret) + goto out_free; + + dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + dev->pad.flags = MEDIA_PAD_FL_SOURCE; + dev->format.code = MEDIA_BUS_FMT_SGRBG8_1X8; + dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; + ret = + v4l2_ctrl_handler_init(&dev->ctrl_handler, + ARRAY_SIZE(gc0310_controls)); + if (ret) { + gc0310_remove(client); + return ret; + } + + for (i = 0; i < ARRAY_SIZE(gc0310_controls); i++) + v4l2_ctrl_new_custom(&dev->ctrl_handler, &gc0310_controls[i], + NULL); + + if (dev->ctrl_handler.error) { + gc0310_remove(client); + return dev->ctrl_handler.error; + } + + /* Use same lock for controls as for everything else. */ + dev->ctrl_handler.lock = &dev->input_lock; + dev->sd.ctrl_handler = &dev->ctrl_handler; + + ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad); + if (ret) + gc0310_remove(client); + + return ret; +out_free: + v4l2_device_unregister_subdev(&dev->sd); + kfree(dev); + return ret; +} + +static const struct acpi_device_id gc0310_acpi_match[] = { + {"XXGC0310"}, + {"INT0310"}, + {}, +}; +MODULE_DEVICE_TABLE(acpi, gc0310_acpi_match); + +static struct i2c_driver gc0310_driver = { + .driver = { + .name = "gc0310", + .acpi_match_table = gc0310_acpi_match, + }, + .probe_new = gc0310_probe, + .remove = gc0310_remove, +}; +module_i2c_driver(gc0310_driver); + +MODULE_AUTHOR("Lai, Angie <angie.lai@intel.com>"); +MODULE_DESCRIPTION("A low-level driver for GalaxyCore GC0310 sensors"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c b/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c new file mode 100644 index 000000000..4d5a7e335 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c @@ -0,0 +1,1050 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Support for GalaxyCore GC2235 2M camera sensor. + * + * Copyright (c) 2014 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/module.h> +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/mm.h> +#include <linux/string.h> +#include <linux/errno.h> +#include <linux/init.h> +#include <linux/kmod.h> +#include <linux/device.h> +#include <linux/delay.h> +#include <linux/slab.h> +#include <linux/i2c.h> +#include <linux/moduleparam.h> +#include <media/v4l2-device.h> +#include "../include/linux/atomisp_gmin_platform.h" +#include <linux/acpi.h> +#include <linux/io.h> + +#include "gc2235.h" + +/* i2c read/write stuff */ +static int gc2235_read_reg(struct i2c_client *client, + u16 data_length, u16 reg, u16 *val) +{ + int err; + struct i2c_msg msg[2]; + unsigned char data[6]; + + if (!client->adapter) { + dev_err(&client->dev, "%s error, no client->adapter\n", + __func__); + return -ENODEV; + } + + if (data_length != GC2235_8BIT) { + dev_err(&client->dev, "%s error, invalid data length\n", + __func__); + return -EINVAL; + } + + memset(msg, 0, sizeof(msg)); + + msg[0].addr = client->addr; + msg[0].flags = 0; + msg[0].len = 1; + msg[0].buf = data; + + /* high byte goes out first */ + data[0] = (u8)(reg & 0xff); + + msg[1].addr = client->addr; + msg[1].len = data_length; + msg[1].flags = I2C_M_RD; + msg[1].buf = data; + + err = i2c_transfer(client->adapter, msg, 2); + if (err != 2) { + if (err >= 0) + err = -EIO; + dev_err(&client->dev, + "read from offset 0x%x error %d", reg, err); + return err; + } + + *val = 0; + /* high byte comes first */ + if (data_length == GC2235_8BIT) + *val = (u8)data[0]; + + return 0; +} + +static int gc2235_i2c_write(struct i2c_client *client, u16 len, u8 *data) +{ + struct i2c_msg msg; + const int num_msg = 1; + int ret; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = len; + msg.buf = data; + ret = i2c_transfer(client->adapter, &msg, 1); + + return ret == num_msg ? 0 : -EIO; +} + +static int gc2235_write_reg(struct i2c_client *client, u16 data_length, + u8 reg, u8 val) +{ + int ret; + unsigned char data[4] = {0}; + const u16 len = data_length + sizeof(u8); /* 16-bit address + data */ + + if (data_length != GC2235_8BIT) { + dev_err(&client->dev, + "%s error, invalid data_length\n", __func__); + return -EINVAL; + } + + /* high byte goes out first */ + data[0] = reg; + data[1] = val; + + ret = gc2235_i2c_write(client, len, data); + if (ret) + dev_err(&client->dev, + "write error: wrote 0x%x to offset 0x%x error %d", + val, reg, ret); + + return ret; +} + +static int __gc2235_flush_reg_array(struct i2c_client *client, + struct gc2235_write_ctrl *ctrl) +{ + u16 size; + + if (ctrl->index == 0) + return 0; + + size = sizeof(u8) + ctrl->index; /* 8-bit address + data */ + ctrl->index = 0; + + return gc2235_i2c_write(client, size, (u8 *)&ctrl->buffer); +} + +static int __gc2235_buf_reg_array(struct i2c_client *client, + struct gc2235_write_ctrl *ctrl, + const struct gc2235_reg *next) +{ + int size; + + if (next->type != GC2235_8BIT) + return -EINVAL; + + size = 1; + ctrl->buffer.data[ctrl->index] = (u8)next->val; + + /* When first item is added, we need to store its starting address */ + if (ctrl->index == 0) + ctrl->buffer.addr = next->reg; + + ctrl->index += size; + + /* + * Buffer cannot guarantee free space for u32? Better flush it to avoid + * possible lack of memory for next item. + */ + if (ctrl->index + sizeof(u8) >= GC2235_MAX_WRITE_BUF_SIZE) + return __gc2235_flush_reg_array(client, ctrl); + + return 0; +} + +static int __gc2235_write_reg_is_consecutive(struct i2c_client *client, + struct gc2235_write_ctrl *ctrl, + const struct gc2235_reg *next) +{ + if (ctrl->index == 0) + return 1; + + return ctrl->buffer.addr + ctrl->index == next->reg; +} + +static int gc2235_write_reg_array(struct i2c_client *client, + const struct gc2235_reg *reglist) +{ + const struct gc2235_reg *next = reglist; + struct gc2235_write_ctrl ctrl; + int err; + + ctrl.index = 0; + for (; next->type != GC2235_TOK_TERM; next++) { + switch (next->type & GC2235_TOK_MASK) { + case GC2235_TOK_DELAY: + err = __gc2235_flush_reg_array(client, &ctrl); + if (err) + return err; + msleep(next->val); + break; + default: + /* + * If next address is not consecutive, data needs to be + * flushed before proceed. + */ + if (!__gc2235_write_reg_is_consecutive(client, &ctrl, + next)) { + err = __gc2235_flush_reg_array(client, &ctrl); + if (err) + return err; + } + err = __gc2235_buf_reg_array(client, &ctrl, next); + if (err) { + dev_err(&client->dev, "%s: write error, aborted\n", + __func__); + return err; + } + break; + } + } + + return __gc2235_flush_reg_array(client, &ctrl); +} + +static int gc2235_g_focal(struct v4l2_subdev *sd, s32 *val) +{ + *val = (GC2235_FOCAL_LENGTH_NUM << 16) | GC2235_FOCAL_LENGTH_DEM; + return 0; +} + +static int gc2235_g_fnumber(struct v4l2_subdev *sd, s32 *val) +{ + /* const f number for imx */ + *val = (GC2235_F_NUMBER_DEFAULT_NUM << 16) | GC2235_F_NUMBER_DEM; + return 0; +} + +static int gc2235_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) +{ + *val = (GC2235_F_NUMBER_DEFAULT_NUM << 24) | + (GC2235_F_NUMBER_DEM << 16) | + (GC2235_F_NUMBER_DEFAULT_NUM << 8) | GC2235_F_NUMBER_DEM; + return 0; +} + +static int gc2235_get_intg_factor(struct i2c_client *client, + struct camera_mipi_info *info, + const struct gc2235_resolution *res) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct gc2235_device *dev = to_gc2235_sensor(sd); + struct atomisp_sensor_mode_data *buf = &info->data; + u16 reg_val, reg_val_h; + int ret; + + if (!info) + return -EINVAL; + + /* pixel clock calculattion */ + buf->vt_pix_clk_freq_mhz = dev->vt_pix_clk_freq_mhz = 30000000; + + /* get integration time */ + buf->coarse_integration_time_min = GC2235_COARSE_INTG_TIME_MIN; + buf->coarse_integration_time_max_margin = + GC2235_COARSE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_min = GC2235_FINE_INTG_TIME_MIN; + buf->fine_integration_time_max_margin = + GC2235_FINE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_def = GC2235_FINE_INTG_TIME_MIN; + buf->frame_length_lines = res->lines_per_frame; + buf->line_length_pck = res->pixels_per_line; + buf->read_mode = res->bin_mode; + + /* get the cropping and output resolution to ISP for this mode. */ + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_H_CROP_START_H, ®_val_h); + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_H_CROP_START_L, ®_val); + if (ret) + return ret; + + buf->crop_horizontal_start = (reg_val_h << 8) | reg_val; + + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_V_CROP_START_H, ®_val_h); + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_V_CROP_START_L, ®_val); + if (ret) + return ret; + + buf->crop_vertical_start = (reg_val_h << 8) | reg_val; + + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_H_OUTSIZE_H, ®_val_h); + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_H_OUTSIZE_L, ®_val); + if (ret) + return ret; + buf->output_width = (reg_val_h << 8) | reg_val; + + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_V_OUTSIZE_H, ®_val_h); + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_V_OUTSIZE_L, ®_val); + if (ret) + return ret; + buf->output_height = (reg_val_h << 8) | reg_val; + + buf->crop_horizontal_end = buf->crop_horizontal_start + + buf->output_width - 1; + buf->crop_vertical_end = buf->crop_vertical_start + + buf->output_height - 1; + + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_HB_H, ®_val_h); + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_HB_L, ®_val); + if (ret) + return ret; + +#if 0 + u16 dummy = (reg_val_h << 8) | reg_val; +#endif + + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_SH_DELAY_H, ®_val_h); + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_SH_DELAY_L, ®_val); + +#if 0 + buf->line_length_pck = buf->output_width + 16 + dummy + + (((u16)reg_val_h << 8) | (u16)reg_val) + 4; +#endif + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_VB_H, ®_val_h); + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_VB_L, ®_val); + if (ret) + return ret; + +#if 0 + buf->frame_length_lines = buf->output_height + 32 + + (((u16)reg_val_h << 8) | (u16)reg_val); +#endif + buf->binning_factor_x = res->bin_factor_x ? + res->bin_factor_x : 1; + buf->binning_factor_y = res->bin_factor_y ? + res->bin_factor_y : 1; + return 0; +} + +static long __gc2235_set_exposure(struct v4l2_subdev *sd, int coarse_itg, + int gain, int digitgain) + +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u16 coarse_integration = (u16)coarse_itg; + int ret = 0; + u16 expo_coarse_h, expo_coarse_l, gain_val = 0xF0, gain_val2 = 0xF0; + + expo_coarse_h = coarse_integration >> 8; + expo_coarse_l = coarse_integration & 0xff; + + ret = gc2235_write_reg(client, GC2235_8BIT, + GC2235_EXPOSURE_H, expo_coarse_h); + ret = gc2235_write_reg(client, GC2235_8BIT, + GC2235_EXPOSURE_L, expo_coarse_l); + + if (gain <= 0x58) { + gain_val = 0x40; + gain_val2 = 0x58; + } else if (gain < 256) { + gain_val = 0x40; + gain_val2 = gain; + } else { + gain_val2 = 64 * gain / 256; + gain_val = 0xff; + } + + ret = gc2235_write_reg(client, GC2235_8BIT, + GC2235_GLOBAL_GAIN, (u8)gain_val); + ret = gc2235_write_reg(client, GC2235_8BIT, + GC2235_PRE_GAIN, (u8)gain_val2); + + return ret; +} + +static int gc2235_set_exposure(struct v4l2_subdev *sd, int exposure, + int gain, int digitgain) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + int ret; + + mutex_lock(&dev->input_lock); + ret = __gc2235_set_exposure(sd, exposure, gain, digitgain); + mutex_unlock(&dev->input_lock); + + return ret; +} + +static long gc2235_s_exposure(struct v4l2_subdev *sd, + struct atomisp_exposure *exposure) +{ + int exp = exposure->integration_time[0]; + int gain = exposure->gain[0]; + int digitgain = exposure->gain[1]; + + /* we should not accept the invalid value below. */ + if (gain == 0) { + struct i2c_client *client = v4l2_get_subdevdata(sd); + + v4l2_err(client, "%s: invalid value\n", __func__); + return -EINVAL; + } + + return gc2235_set_exposure(sd, exp, gain, digitgain); +} + +static long gc2235_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) +{ + switch (cmd) { + case ATOMISP_IOC_S_EXPOSURE: + return gc2235_s_exposure(sd, arg); + default: + return -EINVAL; + } + return 0; +} + +/* + * This returns the exposure time being used. This should only be used + * for filling in EXIF data, not for actual image processing. + */ +static int gc2235_q_exposure(struct v4l2_subdev *sd, s32 *value) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u16 reg_v, reg_v2; + int ret; + + /* get exposure */ + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_EXPOSURE_L, + ®_v); + if (ret) + goto err; + + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_EXPOSURE_H, + ®_v2); + if (ret) + goto err; + + reg_v += reg_v2 << 8; + + *value = reg_v; +err: + return ret; +} + +static int gc2235_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct gc2235_device *dev = + container_of(ctrl->handler, struct gc2235_device, ctrl_handler); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_EXPOSURE_ABSOLUTE: + ret = gc2235_q_exposure(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FOCAL_ABSOLUTE: + ret = gc2235_g_focal(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_ABSOLUTE: + ret = gc2235_g_fnumber(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_RANGE: + ret = gc2235_g_fnumber_range(&dev->sd, &ctrl->val); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static const struct v4l2_ctrl_ops ctrl_ops = { + .g_volatile_ctrl = gc2235_g_volatile_ctrl +}; + +static struct v4l2_ctrl_config gc2235_controls[] = { + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "exposure", + .min = 0x0, + .max = 0xffff, + .step = 0x01, + .def = 0x00, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focal length", + .min = GC2235_FOCAL_LENGTH_DEFAULT, + .max = GC2235_FOCAL_LENGTH_DEFAULT, + .step = 0x01, + .def = GC2235_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number", + .min = GC2235_F_NUMBER_DEFAULT, + .max = GC2235_F_NUMBER_DEFAULT, + .step = 0x01, + .def = GC2235_F_NUMBER_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number range", + .min = GC2235_F_NUMBER_RANGE, + .max = GC2235_F_NUMBER_RANGE, + .step = 0x01, + .def = GC2235_F_NUMBER_RANGE, + .flags = 0, + }, +}; + +static int __gc2235_init(struct v4l2_subdev *sd) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + + /* restore settings */ + gc2235_res = gc2235_res_preview; + N_RES = N_RES_PREVIEW; + + return gc2235_write_reg_array(client, gc2235_init_settings); +} + +static int is_init; + +static int power_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret = -1; + struct gc2235_device *dev = to_gc2235_sensor(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + if (flag) { + ret = dev->platform_data->v1p8_ctrl(sd, 1); + usleep_range(60, 90); + if (ret == 0) + ret |= dev->platform_data->v2p8_ctrl(sd, 1); + } else { + ret = dev->platform_data->v1p8_ctrl(sd, 0); + ret |= dev->platform_data->v2p8_ctrl(sd, 0); + } + return ret; +} + +static int gpio_ctrl(struct v4l2_subdev *sd, bool flag) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + int ret; + + if (!dev || !dev->platform_data) + return -ENODEV; + + ret = dev->platform_data->gpio1_ctrl(sd, !flag); + usleep_range(60, 90); + ret |= dev->platform_data->gpio0_ctrl(sd, flag); + + return ret; +} + +static int power_up(struct v4l2_subdev *sd) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + /* power control */ + ret = power_ctrl(sd, 1); + if (ret) + goto fail_power; + + /* according to DS, at least 5ms is needed between DOVDD and PWDN */ + usleep_range(5000, 6000); + + ret = dev->platform_data->flisclk_ctrl(sd, 1); + if (ret) + goto fail_clk; + usleep_range(5000, 6000); + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 1); + if (ret) { + ret = gpio_ctrl(sd, 1); + if (ret) + goto fail_power; + } + + msleep(5); + return 0; + +fail_clk: + gpio_ctrl(sd, 0); +fail_power: + power_ctrl(sd, 0); + dev_err(&client->dev, "sensor power-up failed\n"); + + return ret; +} + +static int power_down(struct v4l2_subdev *sd) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + /* gpio ctrl */ + ret = gpio_ctrl(sd, 0); + if (ret) { + ret = gpio_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "gpio failed 2\n"); + } + + ret = dev->platform_data->flisclk_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "flisclk failed\n"); + + /* power control */ + ret = power_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "vprog failed.\n"); + + return ret; +} + +static int gc2235_s_power(struct v4l2_subdev *sd, int on) +{ + int ret; + + if (on == 0) { + ret = power_down(sd); + } else { + ret = power_up(sd); + if (!ret) + ret = __gc2235_init(sd); + is_init = 1; + } + return ret; +} + +static int startup(struct v4l2_subdev *sd) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + if (is_init == 0) { + /* + * force gc2235 to do a reset in res change, otherwise it + * can not output normal after switching res. and it is not + * necessary for first time run up after power on, for the sack + * of performance + */ + power_down(sd); + power_up(sd); + gc2235_write_reg_array(client, gc2235_init_settings); + } + + ret = gc2235_write_reg_array(client, dev->res->regs); + if (ret) { + dev_err(&client->dev, "gc2235 write register err.\n"); + return ret; + } + is_init = 0; + + return ret; +} + +static int gc2235_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct gc2235_device *dev = to_gc2235_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct camera_mipi_info *gc2235_info = NULL; + struct gc2235_resolution *res; + int ret = 0; + + gc2235_info = v4l2_get_subdev_hostdata(sd); + if (!gc2235_info) + return -EINVAL; + if (format->pad) + return -EINVAL; + if (!fmt) + return -EINVAL; + + mutex_lock(&dev->input_lock); + res = v4l2_find_nearest_size(gc2235_res_preview, + ARRAY_SIZE(gc2235_res_preview), width, + height, fmt->width, fmt->height); + if (!res) + res = &gc2235_res_preview[N_RES - 1]; + + fmt->width = res->width; + fmt->height = res->height; + dev->res = res; + + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; + if (format->which == V4L2_SUBDEV_FORMAT_TRY) { + sd_state->pads->try_fmt = *fmt; + mutex_unlock(&dev->input_lock); + return 0; + } + + ret = startup(sd); + if (ret) { + dev_err(&client->dev, "gc2235 startup err\n"); + goto err; + } + + ret = gc2235_get_intg_factor(client, gc2235_info, + dev->res); + if (ret) + dev_err(&client->dev, "failed to get integration_factor\n"); + +err: + mutex_unlock(&dev->input_lock); + return ret; +} + +static int gc2235_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct gc2235_device *dev = to_gc2235_sensor(sd); + + if (format->pad) + return -EINVAL; + + if (!fmt) + return -EINVAL; + + fmt->width = dev->res->width; + fmt->height = dev->res->height; + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; + + return 0; +} + +static int gc2235_detect(struct i2c_client *client) +{ + struct i2c_adapter *adapter = client->adapter; + u16 high = 0, low = 0; + u16 id; + + if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) + return -ENODEV; + + gc2235_read_reg(client, GC2235_8BIT, GC2235_SENSOR_ID_H, &high); + gc2235_read_reg(client, GC2235_8BIT, GC2235_SENSOR_ID_L, &low); + id = ((high << 8) | low); + + if (id != GC2235_ID) { + dev_err(&client->dev, "sensor ID error, 0x%x\n", id); + return -ENODEV; + } + + dev_info(&client->dev, "detect gc2235 success\n"); + return 0; +} + +static int gc2235_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + mutex_lock(&dev->input_lock); + + if (enable) + ret = gc2235_write_reg_array(client, gc2235_stream_on); + else + ret = gc2235_write_reg_array(client, gc2235_stream_off); + + mutex_unlock(&dev->input_lock); + return ret; +} + +static int gc2235_s_config(struct v4l2_subdev *sd, + int irq, void *platform_data) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + if (!platform_data) + return -ENODEV; + + dev->platform_data = + (struct camera_sensor_platform_data *)platform_data; + + mutex_lock(&dev->input_lock); + /* + * power off the module, then power on it in future + * as first power on by board may not fulfill the + * power on sequqence needed by the module + */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "gc2235 power-off err.\n"); + goto fail_power_off; + } + + ret = power_up(sd); + if (ret) { + dev_err(&client->dev, "gc2235 power-up err.\n"); + goto fail_power_on; + } + + ret = dev->platform_data->csi_cfg(sd, 1); + if (ret) + goto fail_csi_cfg; + + /* config & detect sensor */ + ret = gc2235_detect(client); + if (ret) { + dev_err(&client->dev, "gc2235_detect err s_config.\n"); + goto fail_csi_cfg; + } + + /* turn off sensor, after probed */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "gc2235 power-off err.\n"); + goto fail_csi_cfg; + } + mutex_unlock(&dev->input_lock); + + return 0; + +fail_csi_cfg: + dev->platform_data->csi_cfg(sd, 0); +fail_power_on: + power_down(sd); + dev_err(&client->dev, "sensor power-gating failed\n"); +fail_power_off: + mutex_unlock(&dev->input_lock); + return ret; +} + +static int gc2235_g_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *interval) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + + interval->interval.numerator = 1; + interval->interval.denominator = dev->res->fps; + + return 0; +} + +static int gc2235_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index >= MAX_FMTS) + return -EINVAL; + + code->code = MEDIA_BUS_FMT_SBGGR10_1X10; + return 0; +} + +static int gc2235_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_frame_size_enum *fse) +{ + int index = fse->index; + + if (index >= N_RES) + return -EINVAL; + + fse->min_width = gc2235_res[index].width; + fse->min_height = gc2235_res[index].height; + fse->max_width = gc2235_res[index].width; + fse->max_height = gc2235_res[index].height; + + return 0; +} + +static int gc2235_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + + mutex_lock(&dev->input_lock); + *frames = dev->res->skip_frames; + mutex_unlock(&dev->input_lock); + + return 0; +} + +static const struct v4l2_subdev_sensor_ops gc2235_sensor_ops = { + .g_skip_frames = gc2235_g_skip_frames, +}; + +static const struct v4l2_subdev_video_ops gc2235_video_ops = { + .s_stream = gc2235_s_stream, + .g_frame_interval = gc2235_g_frame_interval, +}; + +static const struct v4l2_subdev_core_ops gc2235_core_ops = { + .s_power = gc2235_s_power, + .ioctl = gc2235_ioctl, +}; + +static const struct v4l2_subdev_pad_ops gc2235_pad_ops = { + .enum_mbus_code = gc2235_enum_mbus_code, + .enum_frame_size = gc2235_enum_frame_size, + .get_fmt = gc2235_get_fmt, + .set_fmt = gc2235_set_fmt, +}; + +static const struct v4l2_subdev_ops gc2235_ops = { + .core = &gc2235_core_ops, + .video = &gc2235_video_ops, + .pad = &gc2235_pad_ops, + .sensor = &gc2235_sensor_ops, +}; + +static void gc2235_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct gc2235_device *dev = to_gc2235_sensor(sd); + + dev_dbg(&client->dev, "gc2235_remove...\n"); + + dev->platform_data->csi_cfg(sd, 0); + + v4l2_device_unregister_subdev(sd); + media_entity_cleanup(&dev->sd.entity); + v4l2_ctrl_handler_free(&dev->ctrl_handler); + kfree(dev); +} + +static int gc2235_probe(struct i2c_client *client) +{ + struct gc2235_device *dev; + void *gcpdev; + int ret; + unsigned int i; + + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + mutex_init(&dev->input_lock); + + dev->res = &gc2235_res_preview[0]; + v4l2_i2c_subdev_init(&dev->sd, client, &gc2235_ops); + + gcpdev = gmin_camera_platform_data(&dev->sd, + ATOMISP_INPUT_FORMAT_RAW_10, + atomisp_bayer_order_grbg); + + ret = gc2235_s_config(&dev->sd, client->irq, gcpdev); + if (ret) + goto out_free; + + dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + dev->pad.flags = MEDIA_PAD_FL_SOURCE; + dev->format.code = MEDIA_BUS_FMT_SBGGR10_1X10; + dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; + ret = + v4l2_ctrl_handler_init(&dev->ctrl_handler, + ARRAY_SIZE(gc2235_controls)); + if (ret) { + gc2235_remove(client); + return ret; + } + + for (i = 0; i < ARRAY_SIZE(gc2235_controls); i++) + v4l2_ctrl_new_custom(&dev->ctrl_handler, &gc2235_controls[i], + NULL); + + if (dev->ctrl_handler.error) { + gc2235_remove(client); + return dev->ctrl_handler.error; + } + + /* Use same lock for controls as for everything else. */ + dev->ctrl_handler.lock = &dev->input_lock; + dev->sd.ctrl_handler = &dev->ctrl_handler; + + ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad); + if (ret) + gc2235_remove(client); + + return atomisp_register_i2c_module(&dev->sd, gcpdev, RAW_CAMERA); + +out_free: + v4l2_device_unregister_subdev(&dev->sd); + kfree(dev); + + return ret; +} + +static const struct acpi_device_id gc2235_acpi_match[] = { + { "INT33F8" }, + {}, +}; +MODULE_DEVICE_TABLE(acpi, gc2235_acpi_match); + +static struct i2c_driver gc2235_driver = { + .driver = { + .name = "gc2235", + .acpi_match_table = gc2235_acpi_match, + }, + .probe_new = gc2235_probe, + .remove = gc2235_remove, +}; +module_i2c_driver(gc2235_driver); + +MODULE_AUTHOR("Shuguang Gong <Shuguang.Gong@intel.com>"); +MODULE_DESCRIPTION("A low-level driver for GC2235 sensors"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/atomisp/i2c/atomisp-libmsrlisthelper.c b/drivers/staging/media/atomisp/i2c/atomisp-libmsrlisthelper.c new file mode 100644 index 000000000..7a20d918a --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/atomisp-libmsrlisthelper.c @@ -0,0 +1,210 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#include <linux/i2c.h> +#include <linux/firmware.h> +#include <linux/device.h> +#include <linux/export.h> +#include "../include/linux/libmsrlisthelper.h" +#include <linux/module.h> +#include <linux/slab.h> + +/* Tagged binary data container structure definitions. */ +struct tbd_header { + u32 tag; /*!< Tag identifier, also checks endianness */ + u32 size; /*!< Container size including this header */ + u32 version; /*!< Version, format 0xYYMMDDVV */ + u32 revision; /*!< Revision, format 0xYYMMDDVV */ + u32 config_bits; /*!< Configuration flag bits set */ + u32 checksum; /*!< Global checksum, header included */ +} __packed; + +struct tbd_record_header { + u32 size; /*!< Size of record including header */ + u8 format_id; /*!< tbd_format_t enumeration values used */ + u8 packing_key; /*!< Packing method; 0 = no packing */ + u16 class_id; /*!< tbd_class_t enumeration values used */ +} __packed; + +struct tbd_data_record_header { + u16 next_offset; + u16 flags; + u16 data_offset; + u16 data_size; +} __packed; + +#define TBD_CLASS_DRV_ID 2 + +static int set_msr_configuration(struct i2c_client *client, uint8_t *bufptr, + unsigned int size) +{ + /* + * The configuration data contains any number of sequences where + * the first byte (that is, uint8_t) that marks the number of bytes + * in the sequence to follow, is indeed followed by the indicated + * number of bytes of actual data to be written to sensor. + * By convention, the first two bytes of actual data should be + * understood as an address in the sensor address space (hibyte + * followed by lobyte) where the remaining data in the sequence + * will be written. + */ + + u8 *ptr = bufptr; + + while (ptr < bufptr + size) { + struct i2c_msg msg = { + .addr = client->addr, + .flags = 0, + }; + int ret; + + /* How many bytes */ + msg.len = *ptr++; + /* Where the bytes are located */ + msg.buf = ptr; + ptr += msg.len; + + if (ptr > bufptr + size) + /* Accessing data beyond bounds is not tolerated */ + return -EINVAL; + + ret = i2c_transfer(client->adapter, &msg, 1); + if (ret < 0) { + dev_err(&client->dev, "i2c write error: %d", ret); + return ret; + } + } + return 0; +} + +static int parse_and_apply(struct i2c_client *client, uint8_t *buffer, + unsigned int size) +{ + u8 *endptr8 = buffer + size; + struct tbd_data_record_header *header = + (struct tbd_data_record_header *)buffer; + + /* There may be any number of datasets present */ + unsigned int dataset = 0; + + do { + /* In below, four variables are read from buffer */ + if ((uint8_t *)header + sizeof(*header) > endptr8) + return -EINVAL; + + /* All data should be located within given buffer */ + if ((uint8_t *)header + header->data_offset + + header->data_size > endptr8) + return -EINVAL; + + /* We have a new valid dataset */ + dataset++; + /* See whether there is MSR data */ + /* If yes, update the reg info */ + if (header->data_size && (header->flags & 1)) { + int ret; + + dev_info(&client->dev, + "New MSR data for sensor driver (dataset %02d) size:%d\n", + dataset, header->data_size); + ret = set_msr_configuration(client, + buffer + header->data_offset, + header->data_size); + if (ret) + return ret; + } + header = (struct tbd_data_record_header *)(buffer + + header->next_offset); + } while (header->next_offset); + + return 0; +} + +int apply_msr_data(struct i2c_client *client, const struct firmware *fw) +{ + struct tbd_header *header; + struct tbd_record_header *record; + + if (!fw) { + dev_warn(&client->dev, "Drv data is not loaded.\n"); + return -EINVAL; + } + + if (sizeof(*header) > fw->size) + return -EINVAL; + + header = (struct tbd_header *)fw->data; + /* Check that we have drvb block. */ + if (memcmp(&header->tag, "DRVB", 4)) + return -EINVAL; + + /* Check the size */ + if (header->size != fw->size) + return -EINVAL; + + if (sizeof(*header) + sizeof(*record) > fw->size) + return -EINVAL; + + record = (struct tbd_record_header *)(header + 1); + /* Check that class id mathes tbd's drv id. */ + if (record->class_id != TBD_CLASS_DRV_ID) + return -EINVAL; + + /* Size 0 shall not be treated as an error */ + if (!record->size) + return 0; + + return parse_and_apply(client, (uint8_t *)(record + 1), record->size); +} +EXPORT_SYMBOL_GPL(apply_msr_data); + +int load_msr_list(struct i2c_client *client, char *name, + const struct firmware **fw) +{ + int ret = request_firmware(fw, name, &client->dev); + + if (ret) { + dev_err(&client->dev, + "Error %d while requesting firmware %s\n", + ret, name); + return ret; + } + dev_info(&client->dev, "Received %lu bytes drv data\n", + (unsigned long)(*fw)->size); + + return 0; +} +EXPORT_SYMBOL_GPL(load_msr_list); + +void release_msr_list(struct i2c_client *client, const struct firmware *fw) +{ + release_firmware(fw); +} +EXPORT_SYMBOL_GPL(release_msr_list); + +static int init_msrlisthelper(void) +{ + return 0; +} + +static void exit_msrlisthelper(void) +{ +} + +module_init(init_msrlisthelper); +module_exit(exit_msrlisthelper); + +MODULE_AUTHOR("Jukka Kaartinen <jukka.o.kaartinen@intel.com>"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c b/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c new file mode 100644 index 000000000..75d16b525 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c @@ -0,0 +1,955 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * LED flash driver for LM3554 + * + * Copyright (c) 2010-2012 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#include <linux/module.h> +#include <linux/i2c.h> +#include <linux/mutex.h> +#include <linux/delay.h> +#include <linux/gpio/consumer.h> +#include <linux/slab.h> + +#include "../include/media/lm3554.h" +#include <media/v4l2-ctrls.h> +#include <media/v4l2-device.h> +#include <linux/acpi.h> +#include "../include/linux/atomisp_gmin_platform.h" +#include "../include/linux/atomisp.h" + +/* Registers */ + +#define LM3554_TORCH_BRIGHTNESS_REG 0xA0 +#define LM3554_TORCH_MODE_SHIFT 0 +#define LM3554_TORCH_CURRENT_SHIFT 3 +#define LM3554_INDICATOR_CURRENT_SHIFT 6 + +#define LM3554_FLASH_BRIGHTNESS_REG 0xB0 +#define LM3554_FLASH_MODE_SHIFT 0 +#define LM3554_FLASH_CURRENT_SHIFT 3 +#define LM3554_STROBE_SENSITIVITY_SHIFT 7 + +#define LM3554_FLASH_DURATION_REG 0xC0 +#define LM3554_FLASH_TIMEOUT_SHIFT 0 +#define LM3554_CURRENT_LIMIT_SHIFT 5 + +#define LM3554_FLAGS_REG 0xD0 +#define LM3554_FLAG_TIMEOUT BIT(0) +#define LM3554_FLAG_THERMAL_SHUTDOWN BIT(1) +#define LM3554_FLAG_LED_FAULT BIT(2) +#define LM3554_FLAG_TX1_INTERRUPT BIT(3) +#define LM3554_FLAG_TX2_INTERRUPT BIT(4) +#define LM3554_FLAG_LED_THERMAL_FAULT BIT(5) +#define LM3554_FLAG_UNUSED BIT(6) +#define LM3554_FLAG_INPUT_VOLTAGE_LOW BIT(7) + +#define LM3554_CONFIG_REG_1 0xE0 +#define LM3554_ENVM_TX2_SHIFT 5 +#define LM3554_TX2_POLARITY_SHIFT 6 + +struct lm3554 { + struct v4l2_subdev sd; + + struct mutex power_lock; + struct v4l2_ctrl_handler ctrl_handler; + int power_count; + + unsigned int mode; + int timeout; + u8 torch_current; + u8 indicator_current; + u8 flash_current; + + struct timer_list flash_off_delay; + struct lm3554_platform_data *pdata; +}; + +#define to_lm3554(p_sd) container_of(p_sd, struct lm3554, sd) + +/* Return negative errno else zero on success */ +static int lm3554_write(struct lm3554 *flash, u8 addr, u8 val) +{ + struct i2c_client *client = v4l2_get_subdevdata(&flash->sd); + int ret; + + ret = i2c_smbus_write_byte_data(client, addr, val); + + dev_dbg(&client->dev, "Write Addr:%02X Val:%02X %s\n", addr, val, + ret < 0 ? "fail" : "ok"); + + return ret; +} + +/* Return negative errno else a data byte received from the device. */ +static int lm3554_read(struct lm3554 *flash, u8 addr) +{ + struct i2c_client *client = v4l2_get_subdevdata(&flash->sd); + int ret; + + ret = i2c_smbus_read_byte_data(client, addr); + + dev_dbg(&client->dev, "Read Addr:%02X Val:%02X %s\n", addr, ret, + ret < 0 ? "fail" : "ok"); + + return ret; +} + +/* ----------------------------------------------------------------------------- + * Hardware configuration + */ + +static int lm3554_set_mode(struct lm3554 *flash, unsigned int mode) +{ + u8 val; + int ret; + + val = (mode << LM3554_FLASH_MODE_SHIFT) | + (flash->flash_current << LM3554_FLASH_CURRENT_SHIFT); + + ret = lm3554_write(flash, LM3554_FLASH_BRIGHTNESS_REG, val); + if (ret == 0) + flash->mode = mode; + return ret; +} + +static int lm3554_set_torch(struct lm3554 *flash) +{ + u8 val; + + val = (flash->mode << LM3554_TORCH_MODE_SHIFT) | + (flash->torch_current << LM3554_TORCH_CURRENT_SHIFT) | + (flash->indicator_current << LM3554_INDICATOR_CURRENT_SHIFT); + + return lm3554_write(flash, LM3554_TORCH_BRIGHTNESS_REG, val); +} + +static int lm3554_set_flash(struct lm3554 *flash) +{ + u8 val; + + val = (flash->mode << LM3554_FLASH_MODE_SHIFT) | + (flash->flash_current << LM3554_FLASH_CURRENT_SHIFT); + + return lm3554_write(flash, LM3554_FLASH_BRIGHTNESS_REG, val); +} + +static int lm3554_set_duration(struct lm3554 *flash) +{ + u8 val; + + val = (flash->timeout << LM3554_FLASH_TIMEOUT_SHIFT) | + (flash->pdata->current_limit << LM3554_CURRENT_LIMIT_SHIFT); + + return lm3554_write(flash, LM3554_FLASH_DURATION_REG, val); +} + +static int lm3554_set_config1(struct lm3554 *flash) +{ + u8 val; + + val = (flash->pdata->envm_tx2 << LM3554_ENVM_TX2_SHIFT) | + (flash->pdata->tx2_polarity << LM3554_TX2_POLARITY_SHIFT); + return lm3554_write(flash, LM3554_CONFIG_REG_1, val); +} + +/* ----------------------------------------------------------------------------- + * Hardware trigger + */ +static void lm3554_flash_off_delay(struct timer_list *t) +{ + struct lm3554 *flash = from_timer(flash, t, flash_off_delay); + struct lm3554_platform_data *pdata = flash->pdata; + + gpiod_set_value(pdata->gpio_strobe, 0); +} + +static int lm3554_hw_strobe(struct i2c_client *client, bool strobe) +{ + int ret, timer_pending; + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct lm3554 *flash = to_lm3554(sd); + struct lm3554_platform_data *pdata = flash->pdata; + + /* + * An abnormal high flash current is observed when strobe off the + * flash. Workaround here is firstly set flash current to lower level, + * wait a short moment, and then strobe off the flash. + */ + + timer_pending = del_timer_sync(&flash->flash_off_delay); + + /* Flash off */ + if (!strobe) { + /* set current to 70mA and wait a while */ + ret = lm3554_write(flash, LM3554_FLASH_BRIGHTNESS_REG, 0); + if (ret < 0) + goto err; + mod_timer(&flash->flash_off_delay, + jiffies + msecs_to_jiffies(LM3554_TIMER_DELAY)); + return 0; + } + + /* Flash on */ + + /* + * If timer is killed before run, flash is not strobe off, + * so must strobe off here + */ + if (timer_pending) + gpiod_set_value(pdata->gpio_strobe, 0); + + /* Restore flash current settings */ + ret = lm3554_set_flash(flash); + if (ret < 0) + goto err; + + /* Strobe on Flash */ + gpiod_set_value(pdata->gpio_strobe, 1); + + return 0; +err: + dev_err(&client->dev, "failed to %s flash strobe (%d)\n", + strobe ? "on" : "off", ret); + return ret; +} + +/* ----------------------------------------------------------------------------- + * V4L2 controls + */ + +static int lm3554_read_status(struct lm3554 *flash) +{ + int ret; + struct i2c_client *client = v4l2_get_subdevdata(&flash->sd); + + /* NOTE: reading register clear fault status */ + ret = lm3554_read(flash, LM3554_FLAGS_REG); + if (ret < 0) + return ret; + + /* + * Accordingly to datasheet we read back '1' in bit 6. + * Clear it first. + */ + ret &= ~LM3554_FLAG_UNUSED; + + /* + * Do not take TX1/TX2 signal as an error + * because MSIC will not turn off flash, but turn to + * torch mode according to gsm modem signal by hardware. + */ + ret &= ~(LM3554_FLAG_TX1_INTERRUPT | LM3554_FLAG_TX2_INTERRUPT); + + if (ret > 0) + dev_dbg(&client->dev, "LM3554 flag status: %02x\n", ret); + + return ret; +} + +static int lm3554_s_flash_timeout(struct v4l2_subdev *sd, u32 val) +{ + struct lm3554 *flash = to_lm3554(sd); + + val = clamp(val, LM3554_MIN_TIMEOUT, LM3554_MAX_TIMEOUT); + val = val / LM3554_TIMEOUT_STEPSIZE - 1; + + flash->timeout = val; + + return lm3554_set_duration(flash); +} + +static int lm3554_g_flash_timeout(struct v4l2_subdev *sd, s32 *val) +{ + struct lm3554 *flash = to_lm3554(sd); + + *val = (u32)(flash->timeout + 1) * LM3554_TIMEOUT_STEPSIZE; + + return 0; +} + +static int lm3554_s_flash_intensity(struct v4l2_subdev *sd, u32 intensity) +{ + struct lm3554 *flash = to_lm3554(sd); + + intensity = LM3554_CLAMP_PERCENTAGE(intensity); + intensity = LM3554_PERCENT_TO_VALUE(intensity, LM3554_FLASH_STEP); + + flash->flash_current = intensity; + + return lm3554_set_flash(flash); +} + +static int lm3554_g_flash_intensity(struct v4l2_subdev *sd, s32 *val) +{ + struct lm3554 *flash = to_lm3554(sd); + + *val = LM3554_VALUE_TO_PERCENT((u32)flash->flash_current, + LM3554_FLASH_STEP); + + return 0; +} + +static int lm3554_s_torch_intensity(struct v4l2_subdev *sd, u32 intensity) +{ + struct lm3554 *flash = to_lm3554(sd); + + intensity = LM3554_CLAMP_PERCENTAGE(intensity); + intensity = LM3554_PERCENT_TO_VALUE(intensity, LM3554_TORCH_STEP); + + flash->torch_current = intensity; + + return lm3554_set_torch(flash); +} + +static int lm3554_g_torch_intensity(struct v4l2_subdev *sd, s32 *val) +{ + struct lm3554 *flash = to_lm3554(sd); + + *val = LM3554_VALUE_TO_PERCENT((u32)flash->torch_current, + LM3554_TORCH_STEP); + + return 0; +} + +static int lm3554_s_indicator_intensity(struct v4l2_subdev *sd, u32 intensity) +{ + struct lm3554 *flash = to_lm3554(sd); + + intensity = LM3554_CLAMP_PERCENTAGE(intensity); + intensity = LM3554_PERCENT_TO_VALUE(intensity, LM3554_INDICATOR_STEP); + + flash->indicator_current = intensity; + + return lm3554_set_torch(flash); +} + +static int lm3554_g_indicator_intensity(struct v4l2_subdev *sd, s32 *val) +{ + struct lm3554 *flash = to_lm3554(sd); + + *val = LM3554_VALUE_TO_PERCENT((u32)flash->indicator_current, + LM3554_INDICATOR_STEP); + + return 0; +} + +static int lm3554_s_flash_strobe(struct v4l2_subdev *sd, u32 val) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + + return lm3554_hw_strobe(client, val); +} + +static int lm3554_s_flash_mode(struct v4l2_subdev *sd, u32 new_mode) +{ + struct lm3554 *flash = to_lm3554(sd); + unsigned int mode; + + switch (new_mode) { + case ATOMISP_FLASH_MODE_OFF: + mode = LM3554_MODE_SHUTDOWN; + break; + case ATOMISP_FLASH_MODE_FLASH: + mode = LM3554_MODE_FLASH; + break; + case ATOMISP_FLASH_MODE_INDICATOR: + mode = LM3554_MODE_INDICATOR; + break; + case ATOMISP_FLASH_MODE_TORCH: + mode = LM3554_MODE_TORCH; + break; + default: + return -EINVAL; + } + + return lm3554_set_mode(flash, mode); +} + +static int lm3554_g_flash_mode(struct v4l2_subdev *sd, s32 *val) +{ + struct lm3554 *flash = to_lm3554(sd); + *val = flash->mode; + return 0; +} + +static int lm3554_g_flash_status(struct v4l2_subdev *sd, s32 *val) +{ + struct lm3554 *flash = to_lm3554(sd); + int value; + + value = lm3554_read_status(flash); + if (value < 0) + return value; + + if (value & LM3554_FLAG_TIMEOUT) + *val = ATOMISP_FLASH_STATUS_TIMEOUT; + else if (value > 0) + *val = ATOMISP_FLASH_STATUS_HW_ERROR; + else + *val = ATOMISP_FLASH_STATUS_OK; + + return 0; +} + +static int lm3554_g_flash_status_register(struct v4l2_subdev *sd, s32 *val) +{ + struct lm3554 *flash = to_lm3554(sd); + int ret; + + ret = lm3554_read(flash, LM3554_FLAGS_REG); + + if (ret < 0) + return ret; + + *val = ret; + return 0; +} + +static int lm3554_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct lm3554 *dev = + container_of(ctrl->handler, struct lm3554, ctrl_handler); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_FLASH_TIMEOUT: + ret = lm3554_s_flash_timeout(&dev->sd, ctrl->val); + break; + case V4L2_CID_FLASH_INTENSITY: + ret = lm3554_s_flash_intensity(&dev->sd, ctrl->val); + break; + case V4L2_CID_FLASH_TORCH_INTENSITY: + ret = lm3554_s_torch_intensity(&dev->sd, ctrl->val); + break; + case V4L2_CID_FLASH_INDICATOR_INTENSITY: + ret = lm3554_s_indicator_intensity(&dev->sd, ctrl->val); + break; + case V4L2_CID_FLASH_STROBE: + ret = lm3554_s_flash_strobe(&dev->sd, ctrl->val); + break; + case V4L2_CID_FLASH_MODE: + ret = lm3554_s_flash_mode(&dev->sd, ctrl->val); + break; + default: + ret = -EINVAL; + } + return ret; +} + +static int lm3554_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct lm3554 *dev = + container_of(ctrl->handler, struct lm3554, ctrl_handler); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_FLASH_TIMEOUT: + ret = lm3554_g_flash_timeout(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FLASH_INTENSITY: + ret = lm3554_g_flash_intensity(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FLASH_TORCH_INTENSITY: + ret = lm3554_g_torch_intensity(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FLASH_INDICATOR_INTENSITY: + ret = lm3554_g_indicator_intensity(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FLASH_MODE: + ret = lm3554_g_flash_mode(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FLASH_STATUS: + ret = lm3554_g_flash_status(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FLASH_STATUS_REGISTER: + ret = lm3554_g_flash_status_register(&dev->sd, &ctrl->val); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static const struct v4l2_ctrl_ops ctrl_ops = { + .s_ctrl = lm3554_s_ctrl, + .g_volatile_ctrl = lm3554_g_volatile_ctrl +}; + +static const struct v4l2_ctrl_config lm3554_controls[] = { + { + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_TIMEOUT, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Flash Timeout", + .min = 0x0, + .max = LM3554_MAX_TIMEOUT, + .step = 0x01, + .def = LM3554_DEFAULT_TIMEOUT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_INTENSITY, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Flash Intensity", + .min = LM3554_MIN_PERCENT, + .max = LM3554_MAX_PERCENT, + .step = 0x01, + .def = LM3554_FLASH_DEFAULT_BRIGHTNESS, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_TORCH_INTENSITY, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Torch Intensity", + .min = LM3554_MIN_PERCENT, + .max = LM3554_MAX_PERCENT, + .step = 0x01, + .def = LM3554_TORCH_DEFAULT_BRIGHTNESS, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_INDICATOR_INTENSITY, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Indicator Intensity", + .min = LM3554_MIN_PERCENT, + .max = LM3554_MAX_PERCENT, + .step = 0x01, + .def = LM3554_INDICATOR_DEFAULT_BRIGHTNESS, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_STROBE, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Flash Strobe", + .min = 0, + .max = 1, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_MODE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Flash Mode", + .min = 0, + .max = 100, + .step = 1, + .def = ATOMISP_FLASH_MODE_OFF, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_STATUS, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Flash Status", + .min = ATOMISP_FLASH_STATUS_OK, + .max = ATOMISP_FLASH_STATUS_TIMEOUT, + .step = 1, + .def = ATOMISP_FLASH_STATUS_OK, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_STATUS_REGISTER, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Flash Status Register", + .min = 0, + .max = 255, + .step = 1, + .def = 0, + .flags = 0, + }, +}; + +/* ----------------------------------------------------------------------------- + * V4L2 subdev core operations + */ + +/* Put device into known state. */ +static int lm3554_setup(struct lm3554 *flash) +{ + struct i2c_client *client = v4l2_get_subdevdata(&flash->sd); + int ret; + + /* clear the flags register */ + ret = lm3554_read(flash, LM3554_FLAGS_REG); + if (ret < 0) + return ret; + + dev_dbg(&client->dev, "Fault info: %02x\n", ret); + + ret = lm3554_set_config1(flash); + if (ret < 0) + return ret; + + ret = lm3554_set_duration(flash); + if (ret < 0) + return ret; + + ret = lm3554_set_torch(flash); + if (ret < 0) + return ret; + + ret = lm3554_set_flash(flash); + if (ret < 0) + return ret; + + /* read status */ + ret = lm3554_read_status(flash); + if (ret < 0) + return ret; + + return ret ? -EIO : 0; +} + +static int __lm3554_s_power(struct lm3554 *flash, int power) +{ + struct lm3554_platform_data *pdata = flash->pdata; + int ret; + + /*initialize flash driver*/ + gpiod_set_value(pdata->gpio_reset, power); + usleep_range(100, 100 + 1); + + if (power) { + /* Setup default values. This makes sure that the chip + * is in a known state. + */ + ret = lm3554_setup(flash); + if (ret < 0) { + __lm3554_s_power(flash, 0); + return ret; + } + } + + return 0; +} + +static int lm3554_s_power(struct v4l2_subdev *sd, int power) +{ + struct lm3554 *flash = to_lm3554(sd); + int ret = 0; + + mutex_lock(&flash->power_lock); + + if (flash->power_count == !power) { + ret = __lm3554_s_power(flash, !!power); + if (ret < 0) + goto done; + } + + flash->power_count += power ? 1 : -1; + WARN_ON(flash->power_count < 0); + +done: + mutex_unlock(&flash->power_lock); + return ret; +} + +static const struct v4l2_subdev_core_ops lm3554_core_ops = { + .s_power = lm3554_s_power, +}; + +static const struct v4l2_subdev_ops lm3554_ops = { + .core = &lm3554_core_ops, +}; + +static int lm3554_detect(struct v4l2_subdev *sd) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct i2c_adapter *adapter = client->adapter; + struct lm3554 *flash = to_lm3554(sd); + int ret; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_err(&client->dev, "lm3554_detect i2c error\n"); + return -ENODEV; + } + + /* Power up the flash driver and reset it */ + ret = lm3554_s_power(&flash->sd, 1); + if (ret < 0) { + dev_err(&client->dev, "Failed to power on lm3554 LED flash\n"); + } else { + dev_dbg(&client->dev, "Successfully detected lm3554 LED flash\n"); + lm3554_s_power(&flash->sd, 0); + } + + return ret; +} + +static int lm3554_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) +{ + return lm3554_s_power(sd, 1); +} + +static int lm3554_close(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) +{ + return lm3554_s_power(sd, 0); +} + +static const struct v4l2_subdev_internal_ops lm3554_internal_ops = { + .registered = lm3554_detect, + .open = lm3554_open, + .close = lm3554_close, +}; + +/* ----------------------------------------------------------------------------- + * I2C driver + */ +#ifdef CONFIG_PM + +static int lm3554_suspend(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct v4l2_subdev *subdev = i2c_get_clientdata(client); + struct lm3554 *flash = to_lm3554(subdev); + int rval; + + if (flash->power_count == 0) + return 0; + + rval = __lm3554_s_power(flash, 0); + + dev_dbg(&client->dev, "Suspend %s\n", rval < 0 ? "failed" : "ok"); + + return rval; +} + +static int lm3554_resume(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct v4l2_subdev *subdev = i2c_get_clientdata(client); + struct lm3554 *flash = to_lm3554(subdev); + int rval; + + if (flash->power_count == 0) + return 0; + + rval = __lm3554_s_power(flash, 1); + + dev_dbg(&client->dev, "Resume %s\n", rval < 0 ? "fail" : "ok"); + + return rval; +} + +#else + +#define lm3554_suspend NULL +#define lm3554_resume NULL + +#endif /* CONFIG_PM */ + +static int lm3554_gpio_init(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct lm3554 *flash = to_lm3554(sd); + struct lm3554_platform_data *pdata = flash->pdata; + int ret; + + if (!pdata->gpio_reset) + return -EINVAL; + + ret = gpiod_direction_output(pdata->gpio_reset, 0); + if (ret < 0) + return ret; + + if (!pdata->gpio_strobe) + return -EINVAL; + + ret = gpiod_direction_output(pdata->gpio_strobe, 0); + if (ret < 0) + return ret; + + return 0; +} + +static void lm3554_gpio_uninit(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct lm3554 *flash = to_lm3554(sd); + struct lm3554_platform_data *pdata = flash->pdata; + int ret; + + ret = gpiod_direction_output(pdata->gpio_strobe, 0); + if (ret < 0) + dev_err(&client->dev, + "gpio request/direction_output fail for gpio_strobe"); + + ret = gpiod_direction_output(pdata->gpio_reset, 0); + if (ret < 0) + dev_err(&client->dev, + "gpio request/direction_output fail for gpio_reset"); +} + +static void *lm3554_platform_data_func(struct i2c_client *client) +{ + static struct lm3554_platform_data platform_data; + + platform_data.gpio_reset = gpiod_get_index(&client->dev, + NULL, 2, GPIOD_OUT_LOW); + if (IS_ERR(platform_data.gpio_reset)) + return ERR_CAST(platform_data.gpio_reset); + platform_data.gpio_strobe = gpiod_get_index(&client->dev, + NULL, 0, GPIOD_OUT_LOW); + if (IS_ERR(platform_data.gpio_strobe)) + return ERR_CAST(platform_data.gpio_strobe); + platform_data.gpio_torch = gpiod_get_index(&client->dev, + NULL, 1, GPIOD_OUT_LOW); + if (IS_ERR(platform_data.gpio_torch)) + return ERR_CAST(platform_data.gpio_torch); + + /* Set to TX2 mode, then ENVM/TX2 pin is a power amplifier sync input: + * ENVM/TX pin asserted, flash forced into torch; + * ENVM/TX pin desserted, flash set back; + */ + platform_data.envm_tx2 = 1; + platform_data.tx2_polarity = 0; + + /* set peak current limit to be 1000mA */ + platform_data.current_limit = 0; + + return &platform_data; +} + +static int lm3554_probe(struct i2c_client *client) +{ + int err = 0; + struct lm3554 *flash; + unsigned int i; + + flash = kzalloc(sizeof(*flash), GFP_KERNEL); + if (!flash) + return -ENOMEM; + + flash->pdata = lm3554_platform_data_func(client); + if (IS_ERR(flash->pdata)) { + err = PTR_ERR(flash->pdata); + goto free_flash; + } + + v4l2_i2c_subdev_init(&flash->sd, client, &lm3554_ops); + flash->sd.internal_ops = &lm3554_internal_ops; + flash->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + flash->mode = ATOMISP_FLASH_MODE_OFF; + flash->timeout = LM3554_MAX_TIMEOUT / LM3554_TIMEOUT_STEPSIZE - 1; + err = + v4l2_ctrl_handler_init(&flash->ctrl_handler, + ARRAY_SIZE(lm3554_controls)); + if (err) { + dev_err(&client->dev, "error initialize a ctrl_handler.\n"); + goto unregister_subdev; + } + + for (i = 0; i < ARRAY_SIZE(lm3554_controls); i++) + v4l2_ctrl_new_custom(&flash->ctrl_handler, &lm3554_controls[i], + NULL); + + if (flash->ctrl_handler.error) { + dev_err(&client->dev, "ctrl_handler error.\n"); + err = flash->ctrl_handler.error; + goto free_handler; + } + + flash->sd.ctrl_handler = &flash->ctrl_handler; + err = media_entity_pads_init(&flash->sd.entity, 0, NULL); + if (err) { + dev_err(&client->dev, "error initialize a media entity.\n"); + goto free_handler; + } + + flash->sd.entity.function = MEDIA_ENT_F_FLASH; + + mutex_init(&flash->power_lock); + + timer_setup(&flash->flash_off_delay, lm3554_flash_off_delay, 0); + + err = lm3554_gpio_init(client); + if (err) { + dev_err(&client->dev, "gpio request/direction_output fail.\n"); + goto cleanup_media; + } + + err = atomisp_register_i2c_module(&flash->sd, NULL, LED_FLASH); + if (err) { + dev_err(&client->dev, "fail to register atomisp i2c module.\n"); + goto uninit_gpio; + } + + return 0; + +uninit_gpio: + lm3554_gpio_uninit(client); +cleanup_media: + media_entity_cleanup(&flash->sd.entity); +free_handler: + v4l2_ctrl_handler_free(&flash->ctrl_handler); +unregister_subdev: + v4l2_device_unregister_subdev(&flash->sd); +free_flash: + kfree(flash); + + return err; +} + +static void lm3554_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct lm3554 *flash = to_lm3554(sd); + + media_entity_cleanup(&flash->sd.entity); + v4l2_ctrl_handler_free(&flash->ctrl_handler); + v4l2_device_unregister_subdev(sd); + + atomisp_gmin_remove_subdev(sd); + + del_timer_sync(&flash->flash_off_delay); + + lm3554_gpio_uninit(client); + + kfree(flash); +} + +static const struct dev_pm_ops lm3554_pm_ops = { + .suspend = lm3554_suspend, + .resume = lm3554_resume, +}; + +static const struct acpi_device_id lm3554_acpi_match[] = { + { "INTCF1C" }, + {}, +}; +MODULE_DEVICE_TABLE(acpi, lm3554_acpi_match); + +static struct i2c_driver lm3554_driver = { + .driver = { + .name = "lm3554", + .pm = &lm3554_pm_ops, + .acpi_match_table = lm3554_acpi_match, + }, + .probe_new = lm3554_probe, + .remove = lm3554_remove, +}; +module_i2c_driver(lm3554_driver); + +MODULE_AUTHOR("Jing Tao <jing.tao@intel.com>"); +MODULE_DESCRIPTION("LED flash driver for LM3554"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c new file mode 100644 index 000000000..a0e8e94b2 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c @@ -0,0 +1,1815 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Support for mt9m114 Camera Sensor. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#include <linux/module.h> +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/mm.h> +#include <linux/string.h> +#include <linux/errno.h> +#include <linux/init.h> +#include <linux/kmod.h> +#include <linux/device.h> +#include <linux/fs.h> +#include <linux/slab.h> +#include <linux/delay.h> +#include <linux/i2c.h> +#include <linux/acpi.h> +#include "../include/linux/atomisp_gmin_platform.h" +#include <media/v4l2-device.h> + +#include "mt9m114.h" + +#define to_mt9m114_sensor(sd) container_of(sd, struct mt9m114_device, sd) + +/* + * TODO: use debug parameter to actually define when debug messages should + * be printed. + */ +static int debug; +static int aaalock; +module_param(debug, int, 0644); +MODULE_PARM_DESC(debug, "Debug level (0-1)"); + +static int mt9m114_t_vflip(struct v4l2_subdev *sd, int value); +static int mt9m114_t_hflip(struct v4l2_subdev *sd, int value); +static int mt9m114_wait_state(struct i2c_client *client, int timeout); + +static int +mt9m114_read_reg(struct i2c_client *client, u16 data_length, u32 reg, u32 *val) +{ + int err; + struct i2c_msg msg[2]; + unsigned char data[4]; + + if (!client->adapter) { + v4l2_err(client, "%s error, no client->adapter\n", __func__); + return -ENODEV; + } + + if (data_length != MISENSOR_8BIT && data_length != MISENSOR_16BIT + && data_length != MISENSOR_32BIT) { + v4l2_err(client, "%s error, invalid data length\n", __func__); + return -EINVAL; + } + + msg[0].addr = client->addr; + msg[0].flags = 0; + msg[0].len = MSG_LEN_OFFSET; + msg[0].buf = data; + + /* high byte goes out first */ + data[0] = (u16)(reg >> 8); + data[1] = (u16)(reg & 0xff); + + msg[1].addr = client->addr; + msg[1].len = data_length; + msg[1].flags = I2C_M_RD; + msg[1].buf = data; + + err = i2c_transfer(client->adapter, msg, 2); + + if (err >= 0) { + *val = 0; + /* high byte comes first */ + if (data_length == MISENSOR_8BIT) + *val = data[0]; + else if (data_length == MISENSOR_16BIT) + *val = data[1] + (data[0] << 8); + else + *val = data[3] + (data[2] << 8) + + (data[1] << 16) + (data[0] << 24); + + return 0; + } + + dev_err(&client->dev, "read from offset 0x%x error %d", reg, err); + return err; +} + +static int +mt9m114_write_reg(struct i2c_client *client, u16 data_length, u16 reg, u32 val) +{ + int num_msg; + struct i2c_msg msg; + unsigned char data[6] = {0}; + __be16 *wreg; + int retry = 0; + + if (!client->adapter) { + v4l2_err(client, "%s error, no client->adapter\n", __func__); + return -ENODEV; + } + + if (data_length != MISENSOR_8BIT && data_length != MISENSOR_16BIT + && data_length != MISENSOR_32BIT) { + v4l2_err(client, "%s error, invalid data_length\n", __func__); + return -EINVAL; + } + + memset(&msg, 0, sizeof(msg)); + +again: + msg.addr = client->addr; + msg.flags = 0; + msg.len = 2 + data_length; + msg.buf = data; + + /* high byte goes out first */ + wreg = (void *)data; + *wreg = cpu_to_be16(reg); + + if (data_length == MISENSOR_8BIT) { + data[2] = (u8)(val); + } else if (data_length == MISENSOR_16BIT) { + u16 *wdata = (void *)&data[2]; + + *wdata = be16_to_cpu(*(__be16 *)&data[2]); + } else { + /* MISENSOR_32BIT */ + u32 *wdata = (void *)&data[2]; + + *wdata = be32_to_cpu(*(__be32 *)&data[2]); + } + + num_msg = i2c_transfer(client->adapter, &msg, 1); + + /* + * HACK: Need some delay here for Rev 2 sensors otherwise some + * registers do not seem to load correctly. + */ + mdelay(1); + + if (num_msg >= 0) + return 0; + + dev_err(&client->dev, "write error: wrote 0x%x to offset 0x%x error %d", + val, reg, num_msg); + if (retry <= I2C_RETRY_COUNT) { + dev_dbg(&client->dev, "retrying... %d", retry); + retry++; + msleep(20); + goto again; + } + + return num_msg; +} + +/** + * misensor_rmw_reg - Read/Modify/Write a value to a register in the sensor + * device + * @client: i2c driver client structure + * @data_length: 8/16/32-bits length + * @reg: register address + * @mask: masked out bits + * @set: bits set + * + * Read/modify/write a value to a register in the sensor device. + * Returns zero if successful, or non-zero otherwise. + */ +static int +misensor_rmw_reg(struct i2c_client *client, u16 data_length, u16 reg, + u32 mask, u32 set) +{ + int err; + u32 val; + + /* Exit when no mask */ + if (mask == 0) + return 0; + + /* @mask must not exceed data length */ + switch (data_length) { + case MISENSOR_8BIT: + if (mask & ~0xff) + return -EINVAL; + break; + case MISENSOR_16BIT: + if (mask & ~0xffff) + return -EINVAL; + break; + case MISENSOR_32BIT: + break; + default: + /* Wrong @data_length */ + return -EINVAL; + } + + err = mt9m114_read_reg(client, data_length, reg, &val); + if (err) { + v4l2_err(client, "%s error exit, read failed\n", __func__); + return -EINVAL; + } + + val &= ~mask; + + /* + * Perform the OR function if the @set exists. + * Shift @set value to target bit location. @set should set only + * bits included in @mask. + * + * REVISIT: This function expects @set to be non-shifted. Its shift + * value is then defined to be equal to mask's LSB position. + * How about to inform values in their right offset position and avoid + * this unneeded shift operation? + */ + set <<= ffs(mask) - 1; + val |= set & mask; + + err = mt9m114_write_reg(client, data_length, reg, val); + if (err) { + v4l2_err(client, "%s error exit, write failed\n", __func__); + return -EINVAL; + } + + return 0; +} + +static int __mt9m114_flush_reg_array(struct i2c_client *client, + struct mt9m114_write_ctrl *ctrl) +{ + struct i2c_msg msg; + const int num_msg = 1; + int ret; + int retry = 0; + __be16 *data16 = (void *)&ctrl->buffer.addr; + + if (ctrl->index == 0) + return 0; + +again: + msg.addr = client->addr; + msg.flags = 0; + msg.len = 2 + ctrl->index; + *data16 = cpu_to_be16(ctrl->buffer.addr); + msg.buf = (u8 *)&ctrl->buffer; + + ret = i2c_transfer(client->adapter, &msg, num_msg); + if (ret != num_msg) { + if (++retry <= I2C_RETRY_COUNT) { + dev_dbg(&client->dev, "retrying... %d\n", retry); + msleep(20); + goto again; + } + dev_err(&client->dev, "%s: i2c transfer error\n", __func__); + return -EIO; + } + + ctrl->index = 0; + + /* + * REVISIT: Previously we had a delay after writing data to sensor. + * But it was removed as our tests have shown it is not necessary + * anymore. + */ + + return 0; +} + +static int __mt9m114_buf_reg_array(struct i2c_client *client, + struct mt9m114_write_ctrl *ctrl, + const struct misensor_reg *next) +{ + __be16 *data16; + __be32 *data32; + int err; + + /* Insufficient buffer? Let's flush and get more free space. */ + if (ctrl->index + next->length >= MT9M114_MAX_WRITE_BUF_SIZE) { + err = __mt9m114_flush_reg_array(client, ctrl); + if (err) + return err; + } + + switch (next->length) { + case MISENSOR_8BIT: + ctrl->buffer.data[ctrl->index] = (u8)next->val; + break; + case MISENSOR_16BIT: + data16 = (__be16 *)&ctrl->buffer.data[ctrl->index]; + *data16 = cpu_to_be16((u16)next->val); + break; + case MISENSOR_32BIT: + data32 = (__be32 *)&ctrl->buffer.data[ctrl->index]; + *data32 = cpu_to_be32(next->val); + break; + default: + return -EINVAL; + } + + /* When first item is added, we need to store its starting address */ + if (ctrl->index == 0) + ctrl->buffer.addr = next->reg; + + ctrl->index += next->length; + + return 0; +} + +static int +__mt9m114_write_reg_is_consecutive(struct i2c_client *client, + struct mt9m114_write_ctrl *ctrl, + const struct misensor_reg *next) +{ + if (ctrl->index == 0) + return 1; + + return ctrl->buffer.addr + ctrl->index == next->reg; +} + +/* + * mt9m114_write_reg_array - Initializes a list of mt9m114 registers + * @client: i2c driver client structure + * @reglist: list of registers to be written + * @poll: completion polling requirement + * This function initializes a list of registers. When consecutive addresses + * are found in a row on the list, this function creates a buffer and sends + * consecutive data in a single i2c_transfer(). + * + * __mt9m114_flush_reg_array, __mt9m114_buf_reg_array() and + * __mt9m114_write_reg_is_consecutive() are internal functions to + * mt9m114_write_reg_array() and should be not used anywhere else. + * + */ +static int mt9m114_write_reg_array(struct i2c_client *client, + const struct misensor_reg *reglist, + int poll) +{ + const struct misensor_reg *next = reglist; + struct mt9m114_write_ctrl ctrl; + int err; + + if (poll == PRE_POLLING) { + err = mt9m114_wait_state(client, MT9M114_WAIT_STAT_TIMEOUT); + if (err) + return err; + } + + ctrl.index = 0; + for (; next->length != MISENSOR_TOK_TERM; next++) { + switch (next->length & MISENSOR_TOK_MASK) { + case MISENSOR_TOK_DELAY: + err = __mt9m114_flush_reg_array(client, &ctrl); + if (err) + return err; + msleep(next->val); + break; + case MISENSOR_TOK_RMW: + err = __mt9m114_flush_reg_array(client, &ctrl); + err |= misensor_rmw_reg(client, + next->length & + ~MISENSOR_TOK_RMW, + next->reg, next->val, + next->val2); + if (err) { + dev_err(&client->dev, "%s read err. aborted\n", + __func__); + return -EINVAL; + } + break; + default: + /* + * If next address is not consecutive, data needs to be + * flushed before proceed. + */ + if (!__mt9m114_write_reg_is_consecutive(client, &ctrl, + next)) { + err = __mt9m114_flush_reg_array(client, &ctrl); + if (err) + return err; + } + err = __mt9m114_buf_reg_array(client, &ctrl, next); + if (err) { + v4l2_err(client, "%s: write error, aborted\n", + __func__); + return err; + } + break; + } + } + + err = __mt9m114_flush_reg_array(client, &ctrl); + if (err) + return err; + + if (poll == POST_POLLING) + return mt9m114_wait_state(client, MT9M114_WAIT_STAT_TIMEOUT); + + return 0; +} + +static int mt9m114_wait_state(struct i2c_client *client, int timeout) +{ + int ret; + unsigned int val; + + while (timeout-- > 0) { + ret = mt9m114_read_reg(client, MISENSOR_16BIT, 0x0080, &val); + if (ret) + return ret; + if ((val & 0x2) == 0) + return 0; + msleep(20); + } + + return -EINVAL; +} + +static int mt9m114_set_suspend(struct v4l2_subdev *sd) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + + return mt9m114_write_reg_array(client, + mt9m114_standby_reg, POST_POLLING); +} + +static int mt9m114_init_common(struct v4l2_subdev *sd) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + + return mt9m114_write_reg_array(client, mt9m114_common, PRE_POLLING); +} + +static int power_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret; + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + if (flag) { + ret = dev->platform_data->v2p8_ctrl(sd, 1); + if (ret == 0) { + ret = dev->platform_data->v1p8_ctrl(sd, 1); + if (ret) + ret = dev->platform_data->v2p8_ctrl(sd, 0); + } + } else { + ret = dev->platform_data->v2p8_ctrl(sd, 0); + ret = dev->platform_data->v1p8_ctrl(sd, 0); + } + return ret; +} + +static int gpio_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret; + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + /* + * Note: current modules wire only one GPIO signal (RESET#), + * but the schematic wires up two to the connector. BIOS + * versions have been unfortunately inconsistent with which + * ACPI index RESET# is on, so hit both + */ + + if (flag) { + ret = dev->platform_data->gpio0_ctrl(sd, 0); + ret = dev->platform_data->gpio1_ctrl(sd, 0); + msleep(60); + ret |= dev->platform_data->gpio0_ctrl(sd, 1); + ret |= dev->platform_data->gpio1_ctrl(sd, 1); + } else { + ret = dev->platform_data->gpio0_ctrl(sd, 0); + ret = dev->platform_data->gpio1_ctrl(sd, 0); + } + return ret; +} + +static int power_up(struct v4l2_subdev *sd) +{ + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + if (!dev->platform_data) { + dev_err(&client->dev, "no camera_sensor_platform_data"); + return -ENODEV; + } + + /* power control */ + ret = power_ctrl(sd, 1); + if (ret) + goto fail_power; + + /* flis clock control */ + ret = dev->platform_data->flisclk_ctrl(sd, 1); + if (ret) + goto fail_clk; + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 1); + if (ret) + dev_err(&client->dev, "gpio failed 1\n"); + /* + * according to DS, 44ms is needed between power up and first i2c + * commend + */ + msleep(50); + + return 0; + +fail_clk: + dev->platform_data->flisclk_ctrl(sd, 0); +fail_power: + power_ctrl(sd, 0); + dev_err(&client->dev, "sensor power-up failed\n"); + + return ret; +} + +static int power_down(struct v4l2_subdev *sd) +{ + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + if (!dev->platform_data) { + dev_err(&client->dev, "no camera_sensor_platform_data"); + return -ENODEV; + } + + ret = dev->platform_data->flisclk_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "flisclk failed\n"); + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "gpio failed 1\n"); + + /* power control */ + ret = power_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "vprog failed.\n"); + + /* according to DS, 20ms is needed after power down */ + msleep(20); + + return ret; +} + +static int mt9m114_s_power(struct v4l2_subdev *sd, int power) +{ + if (power == 0) + return power_down(sd); + + if (power_up(sd)) + return -EINVAL; + + return mt9m114_init_common(sd); +} + +static int mt9m114_res2size(struct v4l2_subdev *sd, int *h_size, int *v_size) +{ + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + unsigned short hsize; + unsigned short vsize; + + switch (dev->res) { + case MT9M114_RES_736P: + hsize = MT9M114_RES_736P_SIZE_H; + vsize = MT9M114_RES_736P_SIZE_V; + break; + case MT9M114_RES_864P: + hsize = MT9M114_RES_864P_SIZE_H; + vsize = MT9M114_RES_864P_SIZE_V; + break; + case MT9M114_RES_960P: + hsize = MT9M114_RES_960P_SIZE_H; + vsize = MT9M114_RES_960P_SIZE_V; + break; + default: + v4l2_err(sd, "%s: Resolution 0x%08x unknown\n", __func__, + dev->res); + return -EINVAL; + } + + if (h_size) + *h_size = hsize; + if (v_size) + *v_size = vsize; + + return 0; +} + +static int mt9m114_get_intg_factor(struct i2c_client *client, + struct camera_mipi_info *info, + const struct mt9m114_res_struct *res) +{ + struct atomisp_sensor_mode_data *buf; + u32 reg_val; + int ret; + + if (!info) + return -EINVAL; + + buf = &info->data; + + ret = mt9m114_read_reg(client, MISENSOR_32BIT, + REG_PIXEL_CLK, ®_val); + if (ret) + return ret; + buf->vt_pix_clk_freq_mhz = reg_val; + + /* get integration time */ + buf->coarse_integration_time_min = MT9M114_COARSE_INTG_TIME_MIN; + buf->coarse_integration_time_max_margin = + MT9M114_COARSE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_min = MT9M114_FINE_INTG_TIME_MIN; + buf->fine_integration_time_max_margin = + MT9M114_FINE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_def = MT9M114_FINE_INTG_TIME_MIN; + + buf->frame_length_lines = res->lines_per_frame; + buf->line_length_pck = res->pixels_per_line; + buf->read_mode = res->bin_mode; + + /* get the cropping and output resolution to ISP for this mode. */ + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_H_START, ®_val); + if (ret) + return ret; + buf->crop_horizontal_start = reg_val; + + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_V_START, ®_val); + if (ret) + return ret; + buf->crop_vertical_start = reg_val; + + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_H_END, ®_val); + if (ret) + return ret; + buf->crop_horizontal_end = reg_val; + + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_V_END, ®_val); + if (ret) + return ret; + buf->crop_vertical_end = reg_val; + + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_WIDTH, ®_val); + if (ret) + return ret; + buf->output_width = reg_val; + + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_HEIGHT, ®_val); + if (ret) + return ret; + buf->output_height = reg_val; + + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_TIMING_HTS, ®_val); + if (ret) + return ret; + buf->line_length_pck = reg_val; + + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_TIMING_VTS, ®_val); + if (ret) + return ret; + buf->frame_length_lines = reg_val; + + buf->binning_factor_x = res->bin_factor_x ? + res->bin_factor_x : 1; + buf->binning_factor_y = res->bin_factor_y ? + res->bin_factor_y : 1; + return 0; +} + +static int mt9m114_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + int width, height; + int ret; + + if (format->pad) + return -EINVAL; + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; + + ret = mt9m114_res2size(sd, &width, &height); + if (ret) + return ret; + fmt->width = width; + fmt->height = height; + + return 0; +} + +static int mt9m114_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct i2c_client *c = v4l2_get_subdevdata(sd); + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + struct mt9m114_res_struct *res; + u32 width = fmt->width; + u32 height = fmt->height; + struct camera_mipi_info *mt9m114_info = NULL; + + int ret; + + if (format->pad) + return -EINVAL; + dev->streamon = 0; + dev->first_exp = MT9M114_DEFAULT_FIRST_EXP; + + mt9m114_info = v4l2_get_subdev_hostdata(sd); + if (!mt9m114_info) + return -EINVAL; + + res = v4l2_find_nearest_size(mt9m114_res, + ARRAY_SIZE(mt9m114_res), width, + height, fmt->width, fmt->height); + if (!res) + res = &mt9m114_res[N_RES - 1]; + + fmt->width = res->width; + fmt->height = res->height; + + if (format->which == V4L2_SUBDEV_FORMAT_TRY) { + sd_state->pads->try_fmt = *fmt; + return 0; + } + + switch (res->res) { + case MT9M114_RES_736P: + ret = mt9m114_write_reg_array(c, mt9m114_736P_init, NO_POLLING); + ret += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, + MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET); + break; + case MT9M114_RES_864P: + ret = mt9m114_write_reg_array(c, mt9m114_864P_init, NO_POLLING); + ret += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, + MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET); + break; + case MT9M114_RES_960P: + ret = mt9m114_write_reg_array(c, mt9m114_976P_init, NO_POLLING); + /* set sensor read_mode to Normal */ + ret += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, + MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET); + break; + default: + v4l2_err(sd, "set resolution: %d failed!\n", res->res); + return -EINVAL; + } + + if (ret) + return -EINVAL; + + ret = mt9m114_write_reg_array(c, mt9m114_chgstat_reg, POST_POLLING); + if (ret < 0) + return ret; + + if (mt9m114_set_suspend(sd)) + return -EINVAL; + + if (dev->res != res->res) { + int index; + + /* Switch to different size */ + if (width <= 640) { + dev->nctx = 0x00; /* Set for context A */ + } else { + /* + * Context B is used for resolutions larger than 640x480 + * Using YUV for Context B. + */ + dev->nctx = 0x01; /* set for context B */ + } + + /* + * Marked current sensor res as being "used" + * + * REVISIT: We don't need to use an "used" field on each mode + * list entry to know which mode is selected. If this + * information is really necessary, how about to use a single + * variable on sensor dev struct? + */ + for (index = 0; index < N_RES; index++) { + if ((width == mt9m114_res[index].width) && + (height == mt9m114_res[index].height)) { + mt9m114_res[index].used = true; + continue; + } + mt9m114_res[index].used = false; + } + } + ret = mt9m114_get_intg_factor(c, mt9m114_info, + &mt9m114_res[res->res]); + if (ret) { + dev_err(&c->dev, "failed to get integration_factor\n"); + return -EINVAL; + } + /* + * mt9m114 - we don't poll for context switch + * because it does not happen with streaming disabled. + */ + dev->res = res->res; + + fmt->width = width; + fmt->height = height; + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; + return 0; +} + +/* TODO: Update to SOC functions, remove exposure and gain */ +static int mt9m114_g_focal(struct v4l2_subdev *sd, s32 *val) +{ + *val = (MT9M114_FOCAL_LENGTH_NUM << 16) | MT9M114_FOCAL_LENGTH_DEM; + return 0; +} + +static int mt9m114_g_fnumber(struct v4l2_subdev *sd, s32 *val) +{ + /* const f number for mt9m114 */ + *val = (MT9M114_F_NUMBER_DEFAULT_NUM << 16) | MT9M114_F_NUMBER_DEM; + return 0; +} + +static int mt9m114_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) +{ + *val = (MT9M114_F_NUMBER_DEFAULT_NUM << 24) | + (MT9M114_F_NUMBER_DEM << 16) | + (MT9M114_F_NUMBER_DEFAULT_NUM << 8) | MT9M114_F_NUMBER_DEM; + return 0; +} + +/* Horizontal flip the image. */ +static int mt9m114_g_hflip(struct v4l2_subdev *sd, s32 *val) +{ + struct i2c_client *c = v4l2_get_subdevdata(sd); + int ret; + u32 data; + + ret = mt9m114_read_reg(c, MISENSOR_16BIT, + (u32)MISENSOR_READ_MODE, &data); + if (ret) + return ret; + *val = !!(data & MISENSOR_HFLIP_MASK); + + return 0; +} + +static int mt9m114_g_vflip(struct v4l2_subdev *sd, s32 *val) +{ + struct i2c_client *c = v4l2_get_subdevdata(sd); + int ret; + u32 data; + + ret = mt9m114_read_reg(c, MISENSOR_16BIT, + (u32)MISENSOR_READ_MODE, &data); + if (ret) + return ret; + *val = !!(data & MISENSOR_VFLIP_MASK); + + return 0; +} + +static long mt9m114_s_exposure(struct v4l2_subdev *sd, + struct atomisp_exposure *exposure) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + int ret = 0; + unsigned int coarse_integration = 0; + unsigned int f_lines = 0; + unsigned int frame_len_lines = 0; /* ExposureTime.FrameLengthLines; */ + unsigned int analog_gain, digital_gain; + u32 analog_gain_to_write = 0; + + dev_dbg(&client->dev, "%s(0x%X 0x%X 0x%X)\n", __func__, + exposure->integration_time[0], exposure->gain[0], + exposure->gain[1]); + + coarse_integration = exposure->integration_time[0]; + /* + * fine_integration = ExposureTime.FineIntegrationTime; + * frame_len_lines = ExposureTime.FrameLengthLines; + */ + f_lines = mt9m114_res[dev->res].lines_per_frame; + analog_gain = exposure->gain[0]; + digital_gain = exposure->gain[1]; + if (!dev->streamon) { + /*Save the first exposure values while stream is off*/ + dev->first_exp = coarse_integration; + dev->first_gain = analog_gain; + dev->first_diggain = digital_gain; + } + /* digital_gain = 0x400 * (((u16) digital_gain) >> 8) + */ + /* ((unsigned int)(0x400 * (((u16) digital_gain) & 0xFF)) >>8); */ + + /* set frame length */ + if (f_lines < coarse_integration + 6) + f_lines = coarse_integration + 6; + if (f_lines < frame_len_lines) + f_lines = frame_len_lines; + ret = mt9m114_write_reg(client, MISENSOR_16BIT, 0x300A, f_lines); + if (ret) { + v4l2_err(client, "%s: fail to set f_lines\n", __func__); + return -EINVAL; + } + + /* set coarse integration */ + /* + * 3A provide real exposure time. + * should not translate to any value here. + */ + ret = mt9m114_write_reg(client, MISENSOR_16BIT, + REG_EXPO_COARSE, (u16)(coarse_integration)); + if (ret) { + v4l2_err(client, "%s: fail to set exposure time\n", __func__); + return -EINVAL; + } + + /* + * set analog/digital gain + switch(analog_gain) + { + case 0: + analog_gain_to_write = 0x0; + break; + case 1: + analog_gain_to_write = 0x20; + break; + case 2: + analog_gain_to_write = 0x60; + break; + case 4: + analog_gain_to_write = 0xA0; + break; + case 8: + analog_gain_to_write = 0xE0; + break; + default: + analog_gain_to_write = 0x20; + break; + } + */ + if (digital_gain >= 16 || digital_gain <= 1) + digital_gain = 1; + /* + * analog_gain_to_write = (u16)((digital_gain << 12) + * | analog_gain_to_write); + */ + analog_gain_to_write = (u16)((digital_gain << 12) | (u16)analog_gain); + ret = mt9m114_write_reg(client, MISENSOR_16BIT, + REG_GAIN, analog_gain_to_write); + if (ret) { + v4l2_err(client, "%s: fail to set analog_gain_to_write\n", + __func__); + return -EINVAL; + } + + return ret; +} + +static long mt9m114_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) +{ + switch (cmd) { + case ATOMISP_IOC_S_EXPOSURE: + return mt9m114_s_exposure(sd, arg); + default: + return -EINVAL; + } + + return 0; +} + +/* + * This returns the exposure time being used. This should only be used + * for filling in EXIF data, not for actual image processing. + */ +static int mt9m114_g_exposure(struct v4l2_subdev *sd, s32 *value) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u32 coarse; + int ret; + + /* the fine integration time is currently not calculated */ + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_EXPO_COARSE, &coarse); + if (ret) + return ret; + + *value = coarse; + return 0; +} + +/* + * This function will return the sensor supported max exposure zone number. + * the sensor which supports max exposure zone number is 1. + */ +static int mt9m114_g_exposure_zone_num(struct v4l2_subdev *sd, s32 *val) +{ + *val = 1; + + return 0; +} + +/* + * set exposure metering, average/center_weighted/spot/matrix. + */ +static int mt9m114_s_exposure_metering(struct v4l2_subdev *sd, s32 val) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + switch (val) { + case V4L2_EXPOSURE_METERING_SPOT: + ret = mt9m114_write_reg_array(client, mt9m114_exp_average, + NO_POLLING); + if (ret) { + dev_err(&client->dev, "write exp_average reg err.\n"); + return ret; + } + break; + case V4L2_EXPOSURE_METERING_CENTER_WEIGHTED: + default: + ret = mt9m114_write_reg_array(client, mt9m114_exp_center, + NO_POLLING); + if (ret) { + dev_err(&client->dev, "write exp_default reg err"); + return ret; + } + } + + return 0; +} + +/* + * This function is for touch exposure feature. + */ +static int mt9m114_s_exposure_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_selection *sel) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct misensor_reg exp_reg; + int width, height; + int grid_width, grid_height; + int grid_left, grid_top, grid_right, grid_bottom; + int win_left, win_top, win_right, win_bottom; + int i, j; + int ret; + + if (sel->which != V4L2_SUBDEV_FORMAT_TRY && + sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) + return -EINVAL; + + grid_left = sel->r.left; + grid_top = sel->r.top; + grid_right = sel->r.left + sel->r.width - 1; + grid_bottom = sel->r.top + sel->r.height - 1; + + ret = mt9m114_res2size(sd, &width, &height); + if (ret) + return ret; + + grid_width = width / 5; + grid_height = height / 5; + + if (grid_width && grid_height) { + win_left = grid_left / grid_width; + win_top = grid_top / grid_height; + win_right = grid_right / grid_width; + win_bottom = grid_bottom / grid_height; + } else { + dev_err(&client->dev, "Incorrect exp grid.\n"); + return -EINVAL; + } + + win_left = clamp_t(int, win_left, 0, 4); + win_top = clamp_t(int, win_top, 0, 4); + win_right = clamp_t(int, win_right, 0, 4); + win_bottom = clamp_t(int, win_bottom, 0, 4); + + ret = mt9m114_write_reg_array(client, mt9m114_exp_average, NO_POLLING); + if (ret) { + dev_err(&client->dev, "write exp_average reg err.\n"); + return ret; + } + + for (i = win_top; i <= win_bottom; i++) { + for (j = win_left; j <= win_right; j++) { + exp_reg = mt9m114_exp_win[i][j]; + + ret = mt9m114_write_reg(client, exp_reg.length, + exp_reg.reg, exp_reg.val); + if (ret) { + dev_err(&client->dev, "write exp_reg err.\n"); + return ret; + } + } + } + + return 0; +} + +static int mt9m114_g_bin_factor_x(struct v4l2_subdev *sd, s32 *val) +{ + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + + *val = mt9m114_res[dev->res].bin_factor_x; + + return 0; +} + +static int mt9m114_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val) +{ + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + + *val = mt9m114_res[dev->res].bin_factor_y; + + return 0; +} + +static int mt9m114_s_ev(struct v4l2_subdev *sd, s32 val) +{ + struct i2c_client *c = v4l2_get_subdevdata(sd); + s32 luma = 0x37; + int err; + + /* + * EV value only support -2 to 2 + * 0: 0x37, 1:0x47, 2:0x57, -1:0x27, -2:0x17 + */ + if (val < -2 || val > 2) + return -EINVAL; + luma += 0x10 * val; + dev_dbg(&c->dev, "%s val:%d luma:0x%x\n", __func__, val, luma); + err = mt9m114_write_reg(c, MISENSOR_16BIT, 0x098E, 0xC87A); + if (err) { + dev_err(&c->dev, "%s logic addr access error\n", __func__); + return err; + } + err = mt9m114_write_reg(c, MISENSOR_8BIT, 0xC87A, (u32)luma); + if (err) { + dev_err(&c->dev, "%s write target_average_luma failed\n", + __func__); + return err; + } + udelay(10); + + return 0; +} + +static int mt9m114_g_ev(struct v4l2_subdev *sd, s32 *val) +{ + struct i2c_client *c = v4l2_get_subdevdata(sd); + int err; + u32 luma; + + err = mt9m114_write_reg(c, MISENSOR_16BIT, 0x098E, 0xC87A); + if (err) { + dev_err(&c->dev, "%s logic addr access error\n", __func__); + return err; + } + err = mt9m114_read_reg(c, MISENSOR_8BIT, 0xC87A, &luma); + if (err) { + dev_err(&c->dev, "%s read target_average_luma failed\n", + __func__); + return err; + } + luma -= 0x17; + luma /= 0x10; + *val = (s32)luma - 2; + dev_dbg(&c->dev, "%s val:%d\n", __func__, *val); + + return 0; +} + +/* + * Fake interface + * mt9m114 now can not support 3a_lock + */ +static int mt9m114_s_3a_lock(struct v4l2_subdev *sd, s32 val) +{ + aaalock = val; + return 0; +} + +static int mt9m114_g_3a_lock(struct v4l2_subdev *sd, s32 *val) +{ + if (aaalock) + return V4L2_LOCK_EXPOSURE | V4L2_LOCK_WHITE_BALANCE + | V4L2_LOCK_FOCUS; + return 0; +} + +static int mt9m114_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct mt9m114_device *dev = + container_of(ctrl->handler, struct mt9m114_device, ctrl_handler); + struct i2c_client *client = v4l2_get_subdevdata(&dev->sd); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_VFLIP: + dev_dbg(&client->dev, "%s: CID_VFLIP:%d.\n", + __func__, ctrl->val); + ret = mt9m114_t_vflip(&dev->sd, ctrl->val); + break; + case V4L2_CID_HFLIP: + dev_dbg(&client->dev, "%s: CID_HFLIP:%d.\n", + __func__, ctrl->val); + ret = mt9m114_t_hflip(&dev->sd, ctrl->val); + break; + case V4L2_CID_EXPOSURE_METERING: + ret = mt9m114_s_exposure_metering(&dev->sd, ctrl->val); + break; + case V4L2_CID_EXPOSURE: + ret = mt9m114_s_ev(&dev->sd, ctrl->val); + break; + case V4L2_CID_3A_LOCK: + ret = mt9m114_s_3a_lock(&dev->sd, ctrl->val); + break; + default: + ret = -EINVAL; + } + return ret; +} + +static int mt9m114_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct mt9m114_device *dev = + container_of(ctrl->handler, struct mt9m114_device, ctrl_handler); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_VFLIP: + ret = mt9m114_g_vflip(&dev->sd, &ctrl->val); + break; + case V4L2_CID_HFLIP: + ret = mt9m114_g_hflip(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FOCAL_ABSOLUTE: + ret = mt9m114_g_focal(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_ABSOLUTE: + ret = mt9m114_g_fnumber(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_RANGE: + ret = mt9m114_g_fnumber_range(&dev->sd, &ctrl->val); + break; + case V4L2_CID_EXPOSURE_ABSOLUTE: + ret = mt9m114_g_exposure(&dev->sd, &ctrl->val); + break; + case V4L2_CID_EXPOSURE_ZONE_NUM: + ret = mt9m114_g_exposure_zone_num(&dev->sd, &ctrl->val); + break; + case V4L2_CID_BIN_FACTOR_HORZ: + ret = mt9m114_g_bin_factor_x(&dev->sd, &ctrl->val); + break; + case V4L2_CID_BIN_FACTOR_VERT: + ret = mt9m114_g_bin_factor_y(&dev->sd, &ctrl->val); + break; + case V4L2_CID_EXPOSURE: + ret = mt9m114_g_ev(&dev->sd, &ctrl->val); + break; + case V4L2_CID_3A_LOCK: + ret = mt9m114_g_3a_lock(&dev->sd, &ctrl->val); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static const struct v4l2_ctrl_ops ctrl_ops = { + .s_ctrl = mt9m114_s_ctrl, + .g_volatile_ctrl = mt9m114_g_volatile_ctrl +}; + +static struct v4l2_ctrl_config mt9m114_controls[] = { + { + .ops = &ctrl_ops, + .id = V4L2_CID_VFLIP, + .name = "Image v-Flip", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_HFLIP, + .name = "Image h-Flip", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .name = "focal length", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = MT9M114_FOCAL_LENGTH_DEFAULT, + .max = MT9M114_FOCAL_LENGTH_DEFAULT, + .step = 1, + .def = MT9M114_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .name = "f-number", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = MT9M114_F_NUMBER_DEFAULT, + .max = MT9M114_F_NUMBER_DEFAULT, + .step = 1, + .def = MT9M114_F_NUMBER_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .name = "f-number range", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = MT9M114_F_NUMBER_RANGE, + .max = MT9M114_F_NUMBER_RANGE, + .step = 1, + .def = MT9M114_F_NUMBER_RANGE, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .name = "exposure", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = 0xffff, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ZONE_NUM, + .name = "one-time exposure zone number", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = 0xffff, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_METERING, + .name = "metering", + .type = V4L2_CTRL_TYPE_MENU, + .min = 0, + .max = 3, + .step = 0, + .def = 1, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_HORZ, + .name = "horizontal binning factor", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = MT9M114_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_VERT, + .name = "vertical binning factor", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = MT9M114_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE, + .name = "exposure biasx", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = -2, + .max = 2, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_3A_LOCK, + .name = "3a lock", + .type = V4L2_CTRL_TYPE_BITMASK, + .min = 0, + .max = V4L2_LOCK_EXPOSURE | V4L2_LOCK_WHITE_BALANCE | V4L2_LOCK_FOCUS, + .step = 1, + .def = 0, + .flags = 0, + }, +}; + +static int mt9m114_detect(struct mt9m114_device *dev, struct i2c_client *client) +{ + struct i2c_adapter *adapter = client->adapter; + u32 model; + int ret; + + if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) { + dev_err(&client->dev, "%s: i2c error", __func__); + return -ENODEV; + } + ret = mt9m114_read_reg(client, MISENSOR_16BIT, MT9M114_PID, &model); + if (ret) + return ret; + dev->real_model_id = model; + + if (model != MT9M114_MOD_ID) { + dev_err(&client->dev, "%s: failed: client->addr = %x\n", + __func__, client->addr); + return -ENODEV; + } + + return 0; +} + +static int +mt9m114_s_config(struct v4l2_subdev *sd, int irq, void *platform_data) +{ + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + if (!platform_data) + return -ENODEV; + + dev->platform_data = + (struct camera_sensor_platform_data *)platform_data; + + ret = power_up(sd); + if (ret) { + v4l2_err(client, "mt9m114 power-up err"); + return ret; + } + + /* config & detect sensor */ + ret = mt9m114_detect(dev, client); + if (ret) { + v4l2_err(client, "mt9m114_detect err s_config.\n"); + goto fail_detect; + } + + ret = dev->platform_data->csi_cfg(sd, 1); + if (ret) + goto fail_csi_cfg; + + ret = mt9m114_set_suspend(sd); + if (ret) { + v4l2_err(client, "mt9m114 suspend err"); + return ret; + } + + ret = power_down(sd); + if (ret) { + v4l2_err(client, "mt9m114 power down err"); + return ret; + } + + return ret; + +fail_csi_cfg: + dev->platform_data->csi_cfg(sd, 0); +fail_detect: + power_down(sd); + dev_err(&client->dev, "sensor power-gating failed\n"); + return ret; +} + +/* Horizontal flip the image. */ +static int mt9m114_t_hflip(struct v4l2_subdev *sd, int value) +{ + struct i2c_client *c = v4l2_get_subdevdata(sd); + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + int err; + /* set for direct mode */ + err = mt9m114_write_reg(c, MISENSOR_16BIT, 0x098E, 0xC850); + if (value) { + /* enable H flip ctx A */ + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC850, 0x01, 0x01); + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC851, 0x01, 0x01); + /* ctx B */ + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC888, 0x01, 0x01); + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC889, 0x01, 0x01); + + err += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, + MISENSOR_HFLIP_MASK, MISENSOR_FLIP_EN); + + dev->bpat = MT9M114_BPAT_GRGRBGBG; + } else { + /* disable H flip ctx A */ + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC850, 0x01, 0x00); + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC851, 0x01, 0x00); + /* ctx B */ + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC888, 0x01, 0x00); + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC889, 0x01, 0x00); + + err += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, + MISENSOR_HFLIP_MASK, MISENSOR_FLIP_DIS); + + dev->bpat = MT9M114_BPAT_BGBGGRGR; + } + + err += mt9m114_write_reg(c, MISENSOR_8BIT, 0x8404, 0x06); + udelay(10); + + return !!err; +} + +/* Vertically flip the image */ +static int mt9m114_t_vflip(struct v4l2_subdev *sd, int value) +{ + struct i2c_client *c = v4l2_get_subdevdata(sd); + int err; + /* set for direct mode */ + err = mt9m114_write_reg(c, MISENSOR_16BIT, 0x098E, 0xC850); + if (value >= 1) { + /* enable H flip - ctx A */ + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC850, 0x02, 0x01); + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC851, 0x02, 0x01); + /* ctx B */ + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC888, 0x02, 0x01); + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC889, 0x02, 0x01); + + err += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, + MISENSOR_VFLIP_MASK, MISENSOR_FLIP_EN); + } else { + /* disable H flip - ctx A */ + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC850, 0x02, 0x00); + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC851, 0x02, 0x00); + /* ctx B */ + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC888, 0x02, 0x00); + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC889, 0x02, 0x00); + + err += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, + MISENSOR_VFLIP_MASK, MISENSOR_FLIP_DIS); + } + + err += mt9m114_write_reg(c, MISENSOR_8BIT, 0x8404, 0x06); + udelay(10); + + return !!err; +} + +static int mt9m114_g_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *interval) +{ + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + + interval->interval.numerator = 1; + interval->interval.denominator = mt9m114_res[dev->res].fps; + + return 0; +} + +static int mt9m114_s_stream(struct v4l2_subdev *sd, int enable) +{ + int ret; + struct i2c_client *c = v4l2_get_subdevdata(sd); + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + struct atomisp_exposure exposure; + + if (enable) { + ret = mt9m114_write_reg_array(c, mt9m114_chgstat_reg, + POST_POLLING); + if (ret < 0) + return ret; + + if (dev->first_exp > MT9M114_MAX_FIRST_EXP) { + exposure.integration_time[0] = dev->first_exp; + exposure.gain[0] = dev->first_gain; + exposure.gain[1] = dev->first_diggain; + mt9m114_s_exposure(sd, &exposure); + } + dev->streamon = 1; + + } else { + dev->streamon = 0; + ret = mt9m114_set_suspend(sd); + } + + return ret; +} + +static int mt9m114_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index) + return -EINVAL; + code->code = MEDIA_BUS_FMT_SGRBG10_1X10; + + return 0; +} + +static int mt9m114_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_frame_size_enum *fse) +{ + unsigned int index = fse->index; + + if (index >= N_RES) + return -EINVAL; + + fse->min_width = mt9m114_res[index].width; + fse->min_height = mt9m114_res[index].height; + fse->max_width = mt9m114_res[index].width; + fse->max_height = mt9m114_res[index].height; + + return 0; +} + +static int mt9m114_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) +{ + int index; + struct mt9m114_device *snr = to_mt9m114_sensor(sd); + + if (!frames) + return -EINVAL; + + for (index = 0; index < N_RES; index++) { + if (mt9m114_res[index].res == snr->res) + break; + } + + if (index >= N_RES) + return -EINVAL; + + *frames = mt9m114_res[index].skip_frames; + + return 0; +} + +static const struct v4l2_subdev_video_ops mt9m114_video_ops = { + .s_stream = mt9m114_s_stream, + .g_frame_interval = mt9m114_g_frame_interval, +}; + +static const struct v4l2_subdev_sensor_ops mt9m114_sensor_ops = { + .g_skip_frames = mt9m114_g_skip_frames, +}; + +static const struct v4l2_subdev_core_ops mt9m114_core_ops = { + .s_power = mt9m114_s_power, + .ioctl = mt9m114_ioctl, +}; + +/* REVISIT: Do we need pad operations? */ +static const struct v4l2_subdev_pad_ops mt9m114_pad_ops = { + .enum_mbus_code = mt9m114_enum_mbus_code, + .enum_frame_size = mt9m114_enum_frame_size, + .get_fmt = mt9m114_get_fmt, + .set_fmt = mt9m114_set_fmt, + .set_selection = mt9m114_s_exposure_selection, +}; + +static const struct v4l2_subdev_ops mt9m114_ops = { + .core = &mt9m114_core_ops, + .video = &mt9m114_video_ops, + .pad = &mt9m114_pad_ops, + .sensor = &mt9m114_sensor_ops, +}; + +static void mt9m114_remove(struct i2c_client *client) +{ + struct mt9m114_device *dev; + struct v4l2_subdev *sd = i2c_get_clientdata(client); + + dev = container_of(sd, struct mt9m114_device, sd); + dev->platform_data->csi_cfg(sd, 0); + v4l2_device_unregister_subdev(sd); + media_entity_cleanup(&dev->sd.entity); + v4l2_ctrl_handler_free(&dev->ctrl_handler); + kfree(dev); +} + +static int mt9m114_probe(struct i2c_client *client) +{ + struct mt9m114_device *dev; + int ret = 0; + unsigned int i; + void *pdata; + + /* Setup sensor configuration structure */ + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + v4l2_i2c_subdev_init(&dev->sd, client, &mt9m114_ops); + pdata = gmin_camera_platform_data(&dev->sd, + ATOMISP_INPUT_FORMAT_RAW_10, + atomisp_bayer_order_grbg); + if (pdata) + ret = mt9m114_s_config(&dev->sd, client->irq, pdata); + if (!pdata || ret) { + v4l2_device_unregister_subdev(&dev->sd); + kfree(dev); + return ret; + } + + ret = atomisp_register_i2c_module(&dev->sd, pdata, RAW_CAMERA); + if (ret) { + v4l2_device_unregister_subdev(&dev->sd); + kfree(dev); + /* Coverity CID 298095 - return on error */ + return ret; + } + + /* TODO add format code here */ + dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + dev->pad.flags = MEDIA_PAD_FL_SOURCE; + dev->format.code = MEDIA_BUS_FMT_SGRBG10_1X10; + dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; + + ret = + v4l2_ctrl_handler_init(&dev->ctrl_handler, + ARRAY_SIZE(mt9m114_controls)); + if (ret) { + mt9m114_remove(client); + return ret; + } + + for (i = 0; i < ARRAY_SIZE(mt9m114_controls); i++) + v4l2_ctrl_new_custom(&dev->ctrl_handler, &mt9m114_controls[i], + NULL); + + if (dev->ctrl_handler.error) { + mt9m114_remove(client); + return dev->ctrl_handler.error; + } + + /* Use same lock for controls as for everything else. */ + dev->ctrl_handler.lock = &dev->input_lock; + dev->sd.ctrl_handler = &dev->ctrl_handler; + + /* REVISIT: Do we need media controller? */ + ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad); + if (ret) { + mt9m114_remove(client); + return ret; + } + return 0; +} + +static const struct acpi_device_id mt9m114_acpi_match[] = { + { "INT33F0" }, + { "CRMT1040" }, + {}, +}; +MODULE_DEVICE_TABLE(acpi, mt9m114_acpi_match); + +static struct i2c_driver mt9m114_driver = { + .driver = { + .name = "mt9m114", + .acpi_match_table = mt9m114_acpi_match, + }, + .probe_new = mt9m114_probe, + .remove = mt9m114_remove, +}; +module_i2c_driver(mt9m114_driver); + +MODULE_AUTHOR("Shuguang Gong <Shuguang.gong@intel.com>"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c new file mode 100644 index 000000000..fa1de45b7 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c @@ -0,0 +1,1242 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Support for OmniVision OV2680 1080p HD camera sensor. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <asm/unaligned.h> + +#include <linux/module.h> +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/mm.h> +#include <linux/string.h> +#include <linux/errno.h> +#include <linux/init.h> +#include <linux/kmod.h> +#include <linux/device.h> +#include <linux/delay.h> +#include <linux/slab.h> +#include <linux/i2c.h> +#include <linux/moduleparam.h> +#include <media/v4l2-device.h> +#include <linux/io.h> +#include <linux/acpi.h> +#include "../include/linux/atomisp_gmin_platform.h" + +#include "ov2680.h" + +static int h_flag; +static int v_flag; +static enum atomisp_bayer_order ov2680_bayer_order_mapping[] = { + atomisp_bayer_order_bggr, + atomisp_bayer_order_grbg, + atomisp_bayer_order_gbrg, + atomisp_bayer_order_rggb, +}; + +/* i2c read/write stuff */ +static int ov2680_read_reg(struct i2c_client *client, + int len, u16 reg, u32 *val) +{ + struct i2c_msg msgs[2]; + u8 addr_buf[2] = { reg >> 8, reg & 0xff }; + u8 data_buf[4] = { 0, }; + int ret; + + if (len > 4) + return -EINVAL; + + msgs[0].addr = client->addr; + msgs[0].flags = 0; + msgs[0].len = ARRAY_SIZE(addr_buf); + msgs[0].buf = addr_buf; + + msgs[1].addr = client->addr; + msgs[1].flags = I2C_M_RD; + msgs[1].len = len; + msgs[1].buf = &data_buf[4 - len]; + + ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); + if (ret != ARRAY_SIZE(msgs)) { + dev_err(&client->dev, "read error: reg=0x%4x: %d\n", reg, ret); + return -EIO; + } + + *val = get_unaligned_be32(data_buf); + + return 0; +} + +static int ov2680_write_reg(struct i2c_client *client, unsigned int len, + u16 reg, u16 val) +{ + u8 buf[6]; + int ret; + + if (len == 2) + put_unaligned_be16(val, buf + 2); + else if (len == 1) + buf[2] = val; + else + return -EINVAL; + + put_unaligned_be16(reg, buf); + + ret = i2c_master_send(client, buf, len + 2); + if (ret != len + 2) { + dev_err(&client->dev, "write error %d reg 0x%04x, val 0x%02x: buf sent: %*ph\n", + ret, reg, val, len + 2, &buf); + return -EIO; + } + + return 0; +} + +static int ov2680_write_reg_array(struct i2c_client *client, + const struct ov2680_reg *reglist) +{ + const struct ov2680_reg *next = reglist; + int ret; + + for (; next->reg != 0; next++) { + ret = ov2680_write_reg(client, 1, next->reg, next->val); + if (ret) + return ret; + } + + return 0; +} + +static int ov2680_g_focal(struct v4l2_subdev *sd, s32 *val) +{ + *val = (OV2680_FOCAL_LENGTH_NUM << 16) | OV2680_FOCAL_LENGTH_DEM; + return 0; +} + +static int ov2680_g_fnumber(struct v4l2_subdev *sd, s32 *val) +{ + /* const f number for ov2680 */ + + *val = (OV2680_F_NUMBER_DEFAULT_NUM << 16) | OV2680_F_NUMBER_DEM; + return 0; +} + +static int ov2680_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) +{ + *val = (OV2680_F_NUMBER_DEFAULT_NUM << 24) | + (OV2680_F_NUMBER_DEM << 16) | + (OV2680_F_NUMBER_DEFAULT_NUM << 8) | OV2680_F_NUMBER_DEM; + return 0; +} + +static int ov2680_g_bin_factor_x(struct v4l2_subdev *sd, s32 *val) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + + dev_dbg(&client->dev, "++++ov2680_g_bin_factor_x\n"); + *val = dev->res->bin_factor_x; + + return 0; +} + +static int ov2680_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + + *val = dev->res->bin_factor_y; + dev_dbg(&client->dev, "++++ov2680_g_bin_factor_y\n"); + return 0; +} + +static int ov2680_get_intg_factor(struct i2c_client *client, + struct camera_mipi_info *info, + const struct ov2680_resolution *res) +{ + struct atomisp_sensor_mode_data *buf = &info->data; + unsigned int pix_clk_freq_hz; + u32 reg_val; + int ret; + + dev_dbg(&client->dev, "++++ov2680_get_intg_factor\n"); + if (!info) + return -EINVAL; + + /* pixel clock */ + pix_clk_freq_hz = res->pix_clk_freq * 1000000; + + buf->vt_pix_clk_freq_mhz = pix_clk_freq_hz; + + /* get integration time */ + buf->coarse_integration_time_min = OV2680_COARSE_INTG_TIME_MIN; + buf->coarse_integration_time_max_margin = + OV2680_COARSE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_min = OV2680_FINE_INTG_TIME_MIN; + buf->fine_integration_time_max_margin = + OV2680_FINE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_def = OV2680_FINE_INTG_TIME_MIN; + buf->frame_length_lines = res->lines_per_frame; + buf->line_length_pck = res->pixels_per_line; + buf->read_mode = res->bin_mode; + + /* get the cropping and output resolution to ISP for this mode. */ + ret = ov2680_read_reg(client, 2, + OV2680_HORIZONTAL_START_H, ®_val); + if (ret) + return ret; + buf->crop_horizontal_start = reg_val; + + ret = ov2680_read_reg(client, 2, + OV2680_VERTICAL_START_H, ®_val); + if (ret) + return ret; + buf->crop_vertical_start = reg_val; + + ret = ov2680_read_reg(client, 2, + OV2680_HORIZONTAL_END_H, ®_val); + if (ret) + return ret; + buf->crop_horizontal_end = reg_val; + + ret = ov2680_read_reg(client, 2, + OV2680_VERTICAL_END_H, ®_val); + if (ret) + return ret; + buf->crop_vertical_end = reg_val; + + ret = ov2680_read_reg(client, 2, + OV2680_HORIZONTAL_OUTPUT_SIZE_H, ®_val); + if (ret) + return ret; + buf->output_width = reg_val; + + ret = ov2680_read_reg(client, 2, + OV2680_VERTICAL_OUTPUT_SIZE_H, ®_val); + if (ret) + return ret; + buf->output_height = reg_val; + + buf->binning_factor_x = res->bin_factor_x ? + (res->bin_factor_x * 2) : 1; + buf->binning_factor_y = res->bin_factor_y ? + (res->bin_factor_y * 2) : 1; + return 0; +} + +static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, + int gain, int digitgain) + +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov2680_device *dev = to_ov2680_sensor(sd); + u16 vts; + int ret, exp_val; + + dev_dbg(&client->dev, + "+++++++__ov2680_set_exposure coarse_itg %d, gain %d, digitgain %d++\n", + coarse_itg, gain, digitgain); + + vts = dev->res->lines_per_frame; + + /* group hold */ + ret = ov2680_write_reg(client, 1, + OV2680_GROUP_ACCESS, 0x00); + if (ret) { + dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", + __func__, OV2680_GROUP_ACCESS); + return ret; + } + + /* Increase the VTS to match exposure + MARGIN */ + if (coarse_itg > vts - OV2680_INTEGRATION_TIME_MARGIN) + vts = (u16)coarse_itg + OV2680_INTEGRATION_TIME_MARGIN; + + ret = ov2680_write_reg(client, 2, OV2680_TIMING_VTS_H, vts); + if (ret) { + dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", + __func__, OV2680_TIMING_VTS_H); + return ret; + } + + /* set exposure */ + + /* Lower four bit should be 0*/ + exp_val = coarse_itg << 4; + ret = ov2680_write_reg(client, 1, + OV2680_EXPOSURE_L, exp_val & 0xFF); + if (ret) { + dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", + __func__, OV2680_EXPOSURE_L); + return ret; + } + + ret = ov2680_write_reg(client, 1, + OV2680_EXPOSURE_M, (exp_val >> 8) & 0xFF); + if (ret) { + dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", + __func__, OV2680_EXPOSURE_M); + return ret; + } + + ret = ov2680_write_reg(client, 1, + OV2680_EXPOSURE_H, (exp_val >> 16) & 0x0F); + if (ret) { + dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", + __func__, OV2680_EXPOSURE_H); + return ret; + } + + /* Analog gain */ + ret = ov2680_write_reg(client, 2, OV2680_AGC_H, gain); + if (ret) { + dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", + __func__, OV2680_AGC_H); + return ret; + } + /* Digital gain */ + if (digitgain) { + ret = ov2680_write_reg(client, 2, + OV2680_MWB_RED_GAIN_H, digitgain); + if (ret) { + dev_err(&client->dev, + "%s: write 0x%02x: error, aborted\n", + __func__, OV2680_MWB_RED_GAIN_H); + return ret; + } + + ret = ov2680_write_reg(client, 2, + OV2680_MWB_GREEN_GAIN_H, digitgain); + if (ret) { + dev_err(&client->dev, + "%s: write 0x%02x: error, aborted\n", + __func__, OV2680_MWB_RED_GAIN_H); + return ret; + } + + ret = ov2680_write_reg(client, 2, + OV2680_MWB_BLUE_GAIN_H, digitgain); + if (ret) { + dev_err(&client->dev, + "%s: write 0x%02x: error, aborted\n", + __func__, OV2680_MWB_RED_GAIN_H); + return ret; + } + } + + /* End group */ + ret = ov2680_write_reg(client, 1, + OV2680_GROUP_ACCESS, 0x10); + if (ret) + return ret; + + /* Delay launch group */ + ret = ov2680_write_reg(client, 1, + OV2680_GROUP_ACCESS, 0xa0); + if (ret) + return ret; + return ret; +} + +static int ov2680_set_exposure(struct v4l2_subdev *sd, int exposure, + int gain, int digitgain) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + int ret = 0; + + mutex_lock(&dev->input_lock); + + dev->exposure = exposure; + dev->gain = gain; + dev->digitgain = digitgain; + + if (dev->power_on) + ret = __ov2680_set_exposure(sd, exposure, gain, digitgain); + + mutex_unlock(&dev->input_lock); + + return ret; +} + +static long ov2680_s_exposure(struct v4l2_subdev *sd, + struct atomisp_exposure *exposure) +{ + u16 coarse_itg = exposure->integration_time[0]; + u16 analog_gain = exposure->gain[0]; + u16 digital_gain = exposure->gain[1]; + + /* we should not accept the invalid value below */ + if (analog_gain == 0) { + struct i2c_client *client = v4l2_get_subdevdata(sd); + + v4l2_err(client, "%s: invalid value\n", __func__); + return -EINVAL; + } + + return ov2680_set_exposure(sd, coarse_itg, analog_gain, digital_gain); +} + +static long ov2680_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) +{ + switch (cmd) { + case ATOMISP_IOC_S_EXPOSURE: + return ov2680_s_exposure(sd, arg); + + default: + return -EINVAL; + } + return 0; +} + +/* + * This returns the exposure time being used. This should only be used + * for filling in EXIF data, not for actual image processing. + */ +static int ov2680_q_exposure(struct v4l2_subdev *sd, s32 *value) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u32 reg_val; + int ret; + + /* get exposure */ + ret = ov2680_read_reg(client, 3, OV2680_EXPOSURE_H, ®_val); + if (ret) + return ret; + + /* Lower four bits are not part of the exposure val (always 0) */ + *value = reg_val >> 4; + return 0; +} + +static int ov2680_v_flip(struct v4l2_subdev *sd, s32 value) +{ + struct camera_mipi_info *ov2680_info = NULL; + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + u32 val; + u8 index; + + dev_dbg(&client->dev, "@%s: value:%d\n", __func__, value); + ret = ov2680_read_reg(client, 1, OV2680_FLIP_REG, &val); + if (ret) + return ret; + if (value) + val |= OV2680_FLIP_MIRROR_BIT_ENABLE; + else + val &= ~OV2680_FLIP_MIRROR_BIT_ENABLE; + + ret = ov2680_write_reg(client, 1, + OV2680_FLIP_REG, val); + if (ret) + return ret; + index = (v_flag > 0 ? OV2680_FLIP_BIT : 0) | (h_flag > 0 ? OV2680_MIRROR_BIT : + 0); + ov2680_info = v4l2_get_subdev_hostdata(sd); + if (ov2680_info) { + ov2680_info->raw_bayer_order = ov2680_bayer_order_mapping[index]; + } + return ret; +} + +static int ov2680_h_flip(struct v4l2_subdev *sd, s32 value) +{ + struct camera_mipi_info *ov2680_info = NULL; + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + u32 val; + u8 index; + + dev_dbg(&client->dev, "@%s: value:%d\n", __func__, value); + + ret = ov2680_read_reg(client, 1, OV2680_MIRROR_REG, &val); + if (ret) + return ret; + if (value) + val |= OV2680_FLIP_MIRROR_BIT_ENABLE; + else + val &= ~OV2680_FLIP_MIRROR_BIT_ENABLE; + + ret = ov2680_write_reg(client, 1, + OV2680_MIRROR_REG, val); + if (ret) + return ret; + index = (v_flag > 0 ? OV2680_FLIP_BIT : 0) | (h_flag > 0 ? OV2680_MIRROR_BIT : + 0); + ov2680_info = v4l2_get_subdev_hostdata(sd); + if (ov2680_info) { + ov2680_info->raw_bayer_order = ov2680_bayer_order_mapping[index]; + } + return ret; +} + +static int ov2680_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct ov2680_device *dev = + container_of(ctrl->handler, struct ov2680_device, ctrl_handler); + struct i2c_client *client = v4l2_get_subdevdata(&dev->sd); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_VFLIP: + dev_dbg(&client->dev, "%s: CID_VFLIP:%d.\n", + __func__, ctrl->val); + ret = ov2680_v_flip(&dev->sd, ctrl->val); + break; + case V4L2_CID_HFLIP: + dev_dbg(&client->dev, "%s: CID_HFLIP:%d.\n", + __func__, ctrl->val); + ret = ov2680_h_flip(&dev->sd, ctrl->val); + break; + default: + ret = -EINVAL; + } + return ret; +} + +static int ov2680_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct ov2680_device *dev = + container_of(ctrl->handler, struct ov2680_device, ctrl_handler); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_EXPOSURE_ABSOLUTE: + ret = ov2680_q_exposure(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FOCAL_ABSOLUTE: + ret = ov2680_g_focal(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_ABSOLUTE: + ret = ov2680_g_fnumber(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_RANGE: + ret = ov2680_g_fnumber_range(&dev->sd, &ctrl->val); + break; + case V4L2_CID_BIN_FACTOR_HORZ: + ret = ov2680_g_bin_factor_x(&dev->sd, &ctrl->val); + break; + case V4L2_CID_BIN_FACTOR_VERT: + ret = ov2680_g_bin_factor_y(&dev->sd, &ctrl->val); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static const struct v4l2_ctrl_ops ctrl_ops = { + .s_ctrl = ov2680_s_ctrl, + .g_volatile_ctrl = ov2680_g_volatile_ctrl +}; + +static const struct v4l2_ctrl_config ov2680_controls[] = { + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "exposure", + .min = 0x0, + .max = 0xffff, + .step = 0x01, + .def = 0x00, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focal length", + .min = OV2680_FOCAL_LENGTH_DEFAULT, + .max = OV2680_FOCAL_LENGTH_DEFAULT, + .step = 0x01, + .def = OV2680_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number", + .min = OV2680_F_NUMBER_DEFAULT, + .max = OV2680_F_NUMBER_DEFAULT, + .step = 0x01, + .def = OV2680_F_NUMBER_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number range", + .min = OV2680_F_NUMBER_RANGE, + .max = OV2680_F_NUMBER_RANGE, + .step = 0x01, + .def = OV2680_F_NUMBER_RANGE, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_HORZ, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "horizontal binning factor", + .min = 0, + .max = OV2680_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_VERT, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "vertical binning factor", + .min = 0, + .max = OV2680_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_VFLIP, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Flip", + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_HFLIP, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Mirror", + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, +}; + +static int ov2680_init_registers(struct v4l2_subdev *sd) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + ret = ov2680_write_reg(client, 1, OV2680_SW_RESET, 0x01); + ret |= ov2680_write_reg_array(client, ov2680_global_setting); + + return ret; +} + +static int power_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret = 0; + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + dev_dbg(&client->dev, "%s: %s", __func__, flag ? "on" : "off"); + + if (flag) { + ret |= dev->platform_data->v1p8_ctrl(sd, 1); + ret |= dev->platform_data->v2p8_ctrl(sd, 1); + usleep_range(10000, 15000); + } + + if (!flag || ret) { + ret |= dev->platform_data->v1p8_ctrl(sd, 0); + ret |= dev->platform_data->v2p8_ctrl(sd, 0); + } + return ret; +} + +static int gpio_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret; + struct ov2680_device *dev = to_ov2680_sensor(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + /* + * The OV2680 documents only one GPIO input (#XSHUTDN), but + * existing integrations often wire two (reset/power_down) + * because that is the way other sensors work. There is no + * way to tell how it is wired internally, so existing + * firmwares expose both and we drive them symmetrically. + */ + if (flag) { + ret = dev->platform_data->gpio0_ctrl(sd, 1); + usleep_range(10000, 15000); + /* Ignore return from second gpio, it may not be there */ + dev->platform_data->gpio1_ctrl(sd, 1); + usleep_range(10000, 15000); + } else { + dev->platform_data->gpio1_ctrl(sd, 0); + ret = dev->platform_data->gpio0_ctrl(sd, 0); + } + return ret; +} + +static int power_up(struct v4l2_subdev *sd) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + + if (dev->power_on) + return 0; /* Already on */ + + /* power control */ + ret = power_ctrl(sd, 1); + if (ret) + goto fail_power; + + /* according to DS, at least 5ms is needed between DOVDD and PWDN */ + usleep_range(5000, 6000); + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 1); + if (ret) { + ret = gpio_ctrl(sd, 1); + if (ret) + goto fail_power; + } + + /* flis clock control */ + ret = dev->platform_data->flisclk_ctrl(sd, 1); + if (ret) + goto fail_clk; + + /* according to DS, 20ms is needed between PWDN and i2c access */ + msleep(20); + + ret = ov2680_init_registers(sd); + if (ret) + goto fail_init_registers; + + ret = __ov2680_set_exposure(sd, dev->exposure, dev->gain, dev->digitgain); + if (ret) + goto fail_init_registers; + + dev->power_on = true; + return 0; + +fail_init_registers: + dev->platform_data->flisclk_ctrl(sd, 0); +fail_clk: + gpio_ctrl(sd, 0); +fail_power: + power_ctrl(sd, 0); + dev_err(&client->dev, "sensor power-up failed\n"); + + return ret; +} + +static int power_down(struct v4l2_subdev *sd) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + h_flag = 0; + v_flag = 0; + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + + if (!dev->power_on) + return 0; /* Already off */ + + ret = dev->platform_data->flisclk_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "flisclk failed\n"); + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 0); + if (ret) { + ret = gpio_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "gpio failed 2\n"); + } + + /* power control */ + ret = power_ctrl(sd, 0); + if (ret) { + dev_err(&client->dev, "vprog failed.\n"); + return ret; + } + + dev->power_on = false; + return 0; +} + +static int ov2680_s_power(struct v4l2_subdev *sd, int on) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + int ret; + + mutex_lock(&dev->input_lock); + + if (on == 0) { + ret = power_down(sd); + } else { + ret = power_up(sd); + } + + mutex_unlock(&dev->input_lock); + + return ret; +} + +static int ov2680_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct camera_mipi_info *ov2680_info = NULL; + struct ov2680_resolution *res; + int vts, ret = 0; + + dev_dbg(&client->dev, "%s: %s: pad: %d, fmt: %p\n", + __func__, + (format->which == V4L2_SUBDEV_FORMAT_TRY) ? "try" : "set", + format->pad, fmt); + + if (format->pad) + return -EINVAL; + + if (!fmt) + return -EINVAL; + + ov2680_info = v4l2_get_subdev_hostdata(sd); + if (!ov2680_info) + return -EINVAL; + + res = v4l2_find_nearest_size(ov2680_res_preview, + ARRAY_SIZE(ov2680_res_preview), width, + height, fmt->width, fmt->height); + if (!res) + res = &ov2680_res_preview[N_RES_PREVIEW - 1]; + + fmt->width = res->width; + fmt->height = res->height; + + fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; + if (format->which == V4L2_SUBDEV_FORMAT_TRY) { + sd_state->pads->try_fmt = *fmt; + return 0; + } + + dev_dbg(&client->dev, "%s: %dx%d\n", + __func__, fmt->width, fmt->height); + + mutex_lock(&dev->input_lock); + + /* s_power has not been called yet for std v4l2 clients (camorama) */ + power_up(sd); + ret = ov2680_write_reg_array(client, dev->res->regs); + if (ret) { + dev_err(&client->dev, + "ov2680 write resolution register err: %d\n", ret); + goto err; + } + + vts = dev->res->lines_per_frame; + + /* If necessary increase the VTS to match exposure + MARGIN */ + if (dev->exposure > vts - OV2680_INTEGRATION_TIME_MARGIN) + vts = dev->exposure + OV2680_INTEGRATION_TIME_MARGIN; + + ret = ov2680_write_reg(client, 2, OV2680_TIMING_VTS_H, vts); + if (ret) { + dev_err(&client->dev, "ov2680 write vts err: %d\n", ret); + goto err; + } + + ret = ov2680_get_intg_factor(client, ov2680_info, res); + if (ret) { + dev_err(&client->dev, "failed to get integration factor\n"); + goto err; + } + + /* + * recall flip functions to avoid flip registers + * were overridden by default setting + */ + if (h_flag) + ov2680_h_flip(sd, h_flag); + if (v_flag) + ov2680_v_flip(sd, v_flag); + + dev->res = res; +err: + mutex_unlock(&dev->input_lock); + return ret; +} + +static int ov2680_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct ov2680_device *dev = to_ov2680_sensor(sd); + + if (format->pad) + return -EINVAL; + + if (!fmt) + return -EINVAL; + + fmt->width = dev->res->width; + fmt->height = dev->res->height; + fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; + + return 0; +} + +static int ov2680_detect(struct i2c_client *client) +{ + struct i2c_adapter *adapter = client->adapter; + u32 high, low; + int ret; + u16 id; + u8 revision; + + if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) + return -ENODEV; + + ret = ov2680_read_reg(client, 1, + OV2680_SC_CMMN_CHIP_ID_H, &high); + if (ret) { + dev_err(&client->dev, "sensor_id_high = 0x%x\n", high); + return -ENODEV; + } + ret = ov2680_read_reg(client, 1, + OV2680_SC_CMMN_CHIP_ID_L, &low); + id = ((((u16)high) << 8) | (u16)low); + + if (id != OV2680_ID) { + dev_err(&client->dev, "sensor ID error 0x%x\n", id); + return -ENODEV; + } + + ret = ov2680_read_reg(client, 1, + OV2680_SC_CMMN_SUB_ID, &high); + revision = (u8)high & 0x0f; + + dev_info(&client->dev, "sensor_revision id = 0x%x, rev= %d\n", + id, revision); + + return 0; +} + +static int ov2680_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + mutex_lock(&dev->input_lock); + if (enable) + dev_dbg(&client->dev, "ov2680_s_stream one\n"); + else + dev_dbg(&client->dev, "ov2680_s_stream off\n"); + + ret = ov2680_write_reg(client, 1, OV2680_SW_STREAM, + enable ? OV2680_START_STREAMING : + OV2680_STOP_STREAMING); + + //otp valid at stream on state + //if(!dev->otp_data) + // dev->otp_data = ov2680_otp_read(sd); + + mutex_unlock(&dev->input_lock); + + return ret; +} + +static int ov2680_s_config(struct v4l2_subdev *sd, + int irq, void *platform_data) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + if (!platform_data) + return -ENODEV; + + dev->platform_data = + (struct camera_sensor_platform_data *)platform_data; + + mutex_lock(&dev->input_lock); + + ret = power_up(sd); + if (ret) { + dev_err(&client->dev, "ov2680 power-up err.\n"); + goto fail_power_on; + } + + ret = dev->platform_data->csi_cfg(sd, 1); + if (ret) + goto fail_csi_cfg; + + /* config & detect sensor */ + ret = ov2680_detect(client); + if (ret) { + dev_err(&client->dev, "ov2680_detect err s_config.\n"); + goto fail_csi_cfg; + } + + /* turn off sensor, after probed */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "ov2680 power-off err.\n"); + goto fail_csi_cfg; + } + mutex_unlock(&dev->input_lock); + + return 0; + +fail_csi_cfg: + dev->platform_data->csi_cfg(sd, 0); +fail_power_on: + power_down(sd); + dev_err(&client->dev, "sensor power-gating failed\n"); + mutex_unlock(&dev->input_lock); + return ret; +} + +static int ov2680_g_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *interval) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + + interval->interval.numerator = 1; + interval->interval.denominator = dev->res->fps; + + return 0; +} + +static int ov2680_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index >= MAX_FMTS) + return -EINVAL; + + code->code = MEDIA_BUS_FMT_SBGGR10_1X10; + return 0; +} + +static int ov2680_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_frame_size_enum *fse) +{ + int index = fse->index; + + if (index >= N_RES_PREVIEW) + return -EINVAL; + + fse->min_width = ov2680_res_preview[index].width; + fse->min_height = ov2680_res_preview[index].height; + fse->max_width = ov2680_res_preview[index].width; + fse->max_height = ov2680_res_preview[index].height; + + return 0; +} + +static int ov2680_enum_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_frame_interval_enum *fie) +{ + struct v4l2_fract fract; + + if (fie->index >= N_RES_PREVIEW || + fie->width > ov2680_res_preview[0].width || + fie->height > ov2680_res_preview[0].height || + fie->which > V4L2_SUBDEV_FORMAT_ACTIVE) + return -EINVAL; + + fract.denominator = ov2680_res_preview[fie->index].fps; + fract.numerator = 1; + + fie->interval = fract; + + return 0; +} + +static int ov2680_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + + mutex_lock(&dev->input_lock); + *frames = dev->res->skip_frames; + mutex_unlock(&dev->input_lock); + + return 0; +} + +static const struct v4l2_subdev_video_ops ov2680_video_ops = { + .s_stream = ov2680_s_stream, + .g_frame_interval = ov2680_g_frame_interval, +}; + +static const struct v4l2_subdev_sensor_ops ov2680_sensor_ops = { + .g_skip_frames = ov2680_g_skip_frames, +}; + +static const struct v4l2_subdev_core_ops ov2680_core_ops = { + .s_power = ov2680_s_power, + .ioctl = ov2680_ioctl, +}; + +static const struct v4l2_subdev_pad_ops ov2680_pad_ops = { + .enum_mbus_code = ov2680_enum_mbus_code, + .enum_frame_size = ov2680_enum_frame_size, + .enum_frame_interval = ov2680_enum_frame_interval, + .get_fmt = ov2680_get_fmt, + .set_fmt = ov2680_set_fmt, +}; + +static const struct v4l2_subdev_ops ov2680_ops = { + .core = &ov2680_core_ops, + .video = &ov2680_video_ops, + .pad = &ov2680_pad_ops, + .sensor = &ov2680_sensor_ops, +}; + +static void ov2680_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov2680_device *dev = to_ov2680_sensor(sd); + + dev_dbg(&client->dev, "ov2680_remove...\n"); + + dev->platform_data->csi_cfg(sd, 0); + + v4l2_device_unregister_subdev(sd); + media_entity_cleanup(&dev->sd.entity); + v4l2_ctrl_handler_free(&dev->ctrl_handler); + kfree(dev); +} + +static int ov2680_probe(struct i2c_client *client) +{ + struct ov2680_device *dev; + int ret; + void *pdata; + unsigned int i; + + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + mutex_init(&dev->input_lock); + + dev->res = &ov2680_res_preview[0]; + dev->exposure = dev->res->lines_per_frame - OV2680_INTEGRATION_TIME_MARGIN; + dev->gain = 250; /* 0-2047 */ + v4l2_i2c_subdev_init(&dev->sd, client, &ov2680_ops); + + pdata = gmin_camera_platform_data(&dev->sd, + ATOMISP_INPUT_FORMAT_RAW_10, + atomisp_bayer_order_bggr); + if (!pdata) { + ret = -EINVAL; + goto out_free; + } + + ret = ov2680_s_config(&dev->sd, client->irq, pdata); + if (ret) + goto out_free; + + ret = atomisp_register_i2c_module(&dev->sd, pdata, RAW_CAMERA); + if (ret) + goto out_free; + + dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + dev->pad.flags = MEDIA_PAD_FL_SOURCE; + dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; + ret = + v4l2_ctrl_handler_init(&dev->ctrl_handler, + ARRAY_SIZE(ov2680_controls)); + if (ret) { + ov2680_remove(client); + return ret; + } + + for (i = 0; i < ARRAY_SIZE(ov2680_controls); i++) + v4l2_ctrl_new_custom(&dev->ctrl_handler, &ov2680_controls[i], + NULL); + + if (dev->ctrl_handler.error) { + ov2680_remove(client); + return dev->ctrl_handler.error; + } + + /* Use same lock for controls as for everything else. */ + dev->ctrl_handler.lock = &dev->input_lock; + dev->sd.ctrl_handler = &dev->ctrl_handler; + + ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad); + if (ret) { + ov2680_remove(client); + dev_dbg(&client->dev, "+++ remove ov2680\n"); + } + return ret; +out_free: + dev_dbg(&client->dev, "+++ out free\n"); + v4l2_device_unregister_subdev(&dev->sd); + kfree(dev); + return ret; +} + +static const struct acpi_device_id ov2680_acpi_match[] = { + {"XXOV2680"}, + {"OVTI2680"}, + {}, +}; +MODULE_DEVICE_TABLE(acpi, ov2680_acpi_match); + +static struct i2c_driver ov2680_driver = { + .driver = { + .name = "ov2680", + .acpi_match_table = ov2680_acpi_match, + }, + .probe_new = ov2680_probe, + .remove = ov2680_remove, +}; +module_i2c_driver(ov2680_driver); + +MODULE_AUTHOR("Jacky Wang <Jacky_wang@ovt.com>"); +MODULE_DESCRIPTION("A low-level driver for OmniVision 2680 sensors"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c new file mode 100644 index 000000000..887b6f99f --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c @@ -0,0 +1,1194 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Support for OmniVision OV2722 1080p HD camera sensor. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/module.h> +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/mm.h> +#include <linux/string.h> +#include <linux/errno.h> +#include <linux/init.h> +#include <linux/kmod.h> +#include <linux/device.h> +#include <linux/delay.h> +#include <linux/slab.h> +#include <linux/i2c.h> +#include <linux/moduleparam.h> +#include <media/v4l2-device.h> +#include "../include/linux/atomisp_gmin_platform.h" +#include <linux/acpi.h> +#include <linux/io.h> + +#include "ov2722.h" + +/* i2c read/write stuff */ +static int ov2722_read_reg(struct i2c_client *client, + u16 data_length, u16 reg, u16 *val) +{ + int err; + struct i2c_msg msg[2]; + unsigned char data[6]; + + if (!client->adapter) { + dev_err(&client->dev, "%s error, no client->adapter\n", + __func__); + return -ENODEV; + } + + if (data_length != OV2722_8BIT && data_length != OV2722_16BIT && + data_length != OV2722_32BIT) { + dev_err(&client->dev, "%s error, invalid data length\n", + __func__); + return -EINVAL; + } + + memset(msg, 0, sizeof(msg)); + + msg[0].addr = client->addr; + msg[0].flags = 0; + msg[0].len = I2C_MSG_LENGTH; + msg[0].buf = data; + + /* high byte goes out first */ + data[0] = (u8)(reg >> 8); + data[1] = (u8)(reg & 0xff); + + msg[1].addr = client->addr; + msg[1].len = data_length; + msg[1].flags = I2C_M_RD; + msg[1].buf = data; + + err = i2c_transfer(client->adapter, msg, 2); + if (err != 2) { + if (err >= 0) + err = -EIO; + dev_err(&client->dev, + "read from offset 0x%x error %d", reg, err); + return err; + } + + *val = 0; + /* high byte comes first */ + if (data_length == OV2722_8BIT) + *val = (u8)data[0]; + else if (data_length == OV2722_16BIT) + *val = be16_to_cpu(*(__be16 *)&data[0]); + else + *val = be32_to_cpu(*(__be32 *)&data[0]); + + return 0; +} + +static int ov2722_i2c_write(struct i2c_client *client, u16 len, u8 *data) +{ + struct i2c_msg msg; + const int num_msg = 1; + int ret; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = len; + msg.buf = data; + ret = i2c_transfer(client->adapter, &msg, 1); + + return ret == num_msg ? 0 : -EIO; +} + +static int ov2722_write_reg(struct i2c_client *client, u16 data_length, + u16 reg, u16 val) +{ + int ret; + unsigned char data[4] = {0}; + __be16 *wreg = (__be16 *)data; + const u16 len = data_length + sizeof(u16); /* 16-bit address + data */ + + if (data_length != OV2722_8BIT && data_length != OV2722_16BIT) { + dev_err(&client->dev, + "%s error, invalid data_length\n", __func__); + return -EINVAL; + } + + /* high byte goes out first */ + *wreg = cpu_to_be16(reg); + + if (data_length == OV2722_8BIT) { + data[2] = (u8)(val); + } else { + /* OV2722_16BIT */ + __be16 *wdata = (__be16 *)&data[2]; + + *wdata = cpu_to_be16(val); + } + + ret = ov2722_i2c_write(client, len, data); + if (ret) + dev_err(&client->dev, + "write error: wrote 0x%x to offset 0x%x error %d", + val, reg, ret); + + return ret; +} + +/* + * ov2722_write_reg_array - Initializes a list of OV2722 registers + * @client: i2c driver client structure + * @reglist: list of registers to be written + * + * This function initializes a list of registers. When consecutive addresses + * are found in a row on the list, this function creates a buffer and sends + * consecutive data in a single i2c_transfer(). + * + * __ov2722_flush_reg_array, __ov2722_buf_reg_array() and + * __ov2722_write_reg_is_consecutive() are internal functions to + * ov2722_write_reg_array_fast() and should be not used anywhere else. + * + */ + +static int __ov2722_flush_reg_array(struct i2c_client *client, + struct ov2722_write_ctrl *ctrl) +{ + u16 size; + __be16 *data16 = (void *)&ctrl->buffer.addr; + + if (ctrl->index == 0) + return 0; + + size = sizeof(u16) + ctrl->index; /* 16-bit address + data */ + *data16 = cpu_to_be16(ctrl->buffer.addr); + ctrl->index = 0; + + return ov2722_i2c_write(client, size, (u8 *)&ctrl->buffer); +} + +static int __ov2722_buf_reg_array(struct i2c_client *client, + struct ov2722_write_ctrl *ctrl, + const struct ov2722_reg *next) +{ + int size; + __be16 *data16; + + switch (next->type) { + case OV2722_8BIT: + size = 1; + ctrl->buffer.data[ctrl->index] = (u8)next->val; + break; + case OV2722_16BIT: + size = 2; + data16 = (void *)&ctrl->buffer.data[ctrl->index]; + *data16 = cpu_to_be16((u16)next->val); + break; + default: + return -EINVAL; + } + + /* When first item is added, we need to store its starting address */ + if (ctrl->index == 0) + ctrl->buffer.addr = next->reg; + + ctrl->index += size; + + /* + * Buffer cannot guarantee free space for u32? Better flush it to avoid + * possible lack of memory for next item. + */ + if (ctrl->index + sizeof(u16) >= OV2722_MAX_WRITE_BUF_SIZE) + return __ov2722_flush_reg_array(client, ctrl); + + return 0; +} + +static int __ov2722_write_reg_is_consecutive(struct i2c_client *client, + struct ov2722_write_ctrl *ctrl, + const struct ov2722_reg *next) +{ + if (ctrl->index == 0) + return 1; + + return ctrl->buffer.addr + ctrl->index == next->reg; +} + +static int ov2722_write_reg_array(struct i2c_client *client, + const struct ov2722_reg *reglist) +{ + const struct ov2722_reg *next = reglist; + struct ov2722_write_ctrl ctrl; + int err; + + ctrl.index = 0; + for (; next->type != OV2722_TOK_TERM; next++) { + switch (next->type & OV2722_TOK_MASK) { + case OV2722_TOK_DELAY: + err = __ov2722_flush_reg_array(client, &ctrl); + if (err) + return err; + msleep(next->val); + break; + default: + /* + * If next address is not consecutive, data needs to be + * flushed before proceed. + */ + if (!__ov2722_write_reg_is_consecutive(client, &ctrl, + next)) { + err = __ov2722_flush_reg_array(client, &ctrl); + if (err) + return err; + } + err = __ov2722_buf_reg_array(client, &ctrl, next); + if (err) { + dev_err(&client->dev, "%s: write error, aborted\n", + __func__); + return err; + } + break; + } + } + + return __ov2722_flush_reg_array(client, &ctrl); +} + +static int ov2722_g_focal(struct v4l2_subdev *sd, s32 *val) +{ + *val = (OV2722_FOCAL_LENGTH_NUM << 16) | OV2722_FOCAL_LENGTH_DEM; + return 0; +} + +static int ov2722_g_fnumber(struct v4l2_subdev *sd, s32 *val) +{ + /*const f number for imx*/ + *val = (OV2722_F_NUMBER_DEFAULT_NUM << 16) | OV2722_F_NUMBER_DEM; + return 0; +} + +static int ov2722_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) +{ + *val = (OV2722_F_NUMBER_DEFAULT_NUM << 24) | + (OV2722_F_NUMBER_DEM << 16) | + (OV2722_F_NUMBER_DEFAULT_NUM << 8) | OV2722_F_NUMBER_DEM; + return 0; +} + +static int ov2722_get_intg_factor(struct i2c_client *client, + struct camera_mipi_info *info, + const struct ov2722_resolution *res) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov2722_device *dev = NULL; + struct atomisp_sensor_mode_data *buf = &info->data; + const unsigned int ext_clk_freq_hz = 19200000; + const unsigned int pll_invariant_div = 10; + unsigned int pix_clk_freq_hz; + u16 pre_pll_clk_div; + u16 pll_multiplier; + u16 op_pix_clk_div; + u16 reg_val; + int ret; + + if (!info) + return -EINVAL; + + dev = to_ov2722_sensor(sd); + + /* pixel clock calculattion */ + ret = ov2722_read_reg(client, OV2722_8BIT, + OV2722_SC_CMMN_PLL_CTRL3, &pre_pll_clk_div); + if (ret) + return ret; + + ret = ov2722_read_reg(client, OV2722_8BIT, + OV2722_SC_CMMN_PLL_MULTIPLIER, &pll_multiplier); + if (ret) + return ret; + + ret = ov2722_read_reg(client, OV2722_8BIT, + OV2722_SC_CMMN_PLL_DEBUG_OPT, &op_pix_clk_div); + if (ret) + return ret; + + pre_pll_clk_div = (pre_pll_clk_div & 0x70) >> 4; + if (!pre_pll_clk_div) + return -EINVAL; + + pll_multiplier = pll_multiplier & 0x7f; + op_pix_clk_div = op_pix_clk_div & 0x03; + pix_clk_freq_hz = ext_clk_freq_hz / pre_pll_clk_div * pll_multiplier + * op_pix_clk_div / pll_invariant_div; + + dev->vt_pix_clk_freq_mhz = pix_clk_freq_hz; + buf->vt_pix_clk_freq_mhz = pix_clk_freq_hz; + + /* get integration time */ + buf->coarse_integration_time_min = OV2722_COARSE_INTG_TIME_MIN; + buf->coarse_integration_time_max_margin = + OV2722_COARSE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_min = OV2722_FINE_INTG_TIME_MIN; + buf->fine_integration_time_max_margin = + OV2722_FINE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_def = OV2722_FINE_INTG_TIME_MIN; + buf->frame_length_lines = res->lines_per_frame; + buf->line_length_pck = res->pixels_per_line; + buf->read_mode = res->bin_mode; + + /* get the cropping and output resolution to ISP for this mode. */ + ret = ov2722_read_reg(client, OV2722_16BIT, + OV2722_H_CROP_START_H, ®_val); + if (ret) + return ret; + buf->crop_horizontal_start = reg_val; + + ret = ov2722_read_reg(client, OV2722_16BIT, + OV2722_V_CROP_START_H, ®_val); + if (ret) + return ret; + buf->crop_vertical_start = reg_val; + + ret = ov2722_read_reg(client, OV2722_16BIT, + OV2722_H_CROP_END_H, ®_val); + if (ret) + return ret; + buf->crop_horizontal_end = reg_val; + + ret = ov2722_read_reg(client, OV2722_16BIT, + OV2722_V_CROP_END_H, ®_val); + if (ret) + return ret; + buf->crop_vertical_end = reg_val; + + ret = ov2722_read_reg(client, OV2722_16BIT, + OV2722_H_OUTSIZE_H, ®_val); + if (ret) + return ret; + buf->output_width = reg_val; + + ret = ov2722_read_reg(client, OV2722_16BIT, + OV2722_V_OUTSIZE_H, ®_val); + if (ret) + return ret; + buf->output_height = reg_val; + + buf->binning_factor_x = res->bin_factor_x ? + res->bin_factor_x : 1; + buf->binning_factor_y = res->bin_factor_y ? + res->bin_factor_y : 1; + return 0; +} + +static long __ov2722_set_exposure(struct v4l2_subdev *sd, int coarse_itg, + int gain, int digitgain) + +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov2722_device *dev = to_ov2722_sensor(sd); + u16 hts, vts; + int ret; + + dev_dbg(&client->dev, "set_exposure without group hold\n"); + + /* clear VTS_DIFF on manual mode */ + ret = ov2722_write_reg(client, OV2722_16BIT, OV2722_VTS_DIFF_H, 0); + if (ret) + return ret; + + hts = dev->pixels_per_line; + vts = dev->lines_per_frame; + + if ((coarse_itg + OV2722_COARSE_INTG_TIME_MAX_MARGIN) > vts) + vts = coarse_itg + OV2722_COARSE_INTG_TIME_MAX_MARGIN; + + coarse_itg <<= 4; + digitgain <<= 2; + + ret = ov2722_write_reg(client, OV2722_16BIT, + OV2722_VTS_H, vts); + if (ret) + return ret; + + ret = ov2722_write_reg(client, OV2722_16BIT, + OV2722_HTS_H, hts); + if (ret) + return ret; + + /* set exposure */ + ret = ov2722_write_reg(client, OV2722_8BIT, + OV2722_AEC_PK_EXPO_L, + coarse_itg & 0xff); + if (ret) + return ret; + + ret = ov2722_write_reg(client, OV2722_16BIT, + OV2722_AEC_PK_EXPO_H, + (coarse_itg >> 8) & 0xfff); + if (ret) + return ret; + + /* set analog gain */ + ret = ov2722_write_reg(client, OV2722_16BIT, + OV2722_AGC_ADJ_H, gain); + if (ret) + return ret; + + /* set digital gain */ + ret = ov2722_write_reg(client, OV2722_16BIT, + OV2722_MWB_GAIN_R_H, digitgain); + if (ret) + return ret; + + ret = ov2722_write_reg(client, OV2722_16BIT, + OV2722_MWB_GAIN_G_H, digitgain); + if (ret) + return ret; + + ret = ov2722_write_reg(client, OV2722_16BIT, + OV2722_MWB_GAIN_B_H, digitgain); + + return ret; +} + +static int ov2722_set_exposure(struct v4l2_subdev *sd, int exposure, + int gain, int digitgain) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + int ret; + + mutex_lock(&dev->input_lock); + ret = __ov2722_set_exposure(sd, exposure, gain, digitgain); + mutex_unlock(&dev->input_lock); + + return ret; +} + +static long ov2722_s_exposure(struct v4l2_subdev *sd, + struct atomisp_exposure *exposure) +{ + int exp = exposure->integration_time[0]; + int gain = exposure->gain[0]; + int digitgain = exposure->gain[1]; + + /* we should not accept the invalid value below. */ + if (gain == 0) { + struct i2c_client *client = v4l2_get_subdevdata(sd); + + v4l2_err(client, "%s: invalid value\n", __func__); + return -EINVAL; + } + + return ov2722_set_exposure(sd, exp, gain, digitgain); +} + +static long ov2722_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) +{ + switch (cmd) { + case ATOMISP_IOC_S_EXPOSURE: + return ov2722_s_exposure(sd, arg); + default: + return -EINVAL; + } + return 0; +} + +/* This returns the exposure time being used. This should only be used + * for filling in EXIF data, not for actual image processing. + */ +static int ov2722_q_exposure(struct v4l2_subdev *sd, s32 *value) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u16 reg_v, reg_v2; + int ret; + + /* get exposure */ + ret = ov2722_read_reg(client, OV2722_8BIT, + OV2722_AEC_PK_EXPO_L, + ®_v); + if (ret) + goto err; + + ret = ov2722_read_reg(client, OV2722_8BIT, + OV2722_AEC_PK_EXPO_M, + ®_v2); + if (ret) + goto err; + + reg_v += reg_v2 << 8; + ret = ov2722_read_reg(client, OV2722_8BIT, + OV2722_AEC_PK_EXPO_H, + ®_v2); + if (ret) + goto err; + + *value = reg_v + (((u32)reg_v2 << 16)); +err: + return ret; +} + +static int ov2722_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct ov2722_device *dev = + container_of(ctrl->handler, struct ov2722_device, ctrl_handler); + int ret = 0; + unsigned int val; + + switch (ctrl->id) { + case V4L2_CID_EXPOSURE_ABSOLUTE: + ret = ov2722_q_exposure(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FOCAL_ABSOLUTE: + ret = ov2722_g_focal(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_ABSOLUTE: + ret = ov2722_g_fnumber(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_RANGE: + ret = ov2722_g_fnumber_range(&dev->sd, &ctrl->val); + break; + case V4L2_CID_LINK_FREQ: + val = dev->res->mipi_freq; + if (val == 0) + return -EINVAL; + + ctrl->val = val * 1000; /* To Hz */ + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static const struct v4l2_ctrl_ops ctrl_ops = { + .g_volatile_ctrl = ov2722_g_volatile_ctrl +}; + +static const struct v4l2_ctrl_config ov2722_controls[] = { + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "exposure", + .min = 0x0, + .max = 0xffff, + .step = 0x01, + .def = 0x00, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focal length", + .min = OV2722_FOCAL_LENGTH_DEFAULT, + .max = OV2722_FOCAL_LENGTH_DEFAULT, + .step = 0x01, + .def = OV2722_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number", + .min = OV2722_F_NUMBER_DEFAULT, + .max = OV2722_F_NUMBER_DEFAULT, + .step = 0x01, + .def = OV2722_F_NUMBER_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number range", + .min = OV2722_F_NUMBER_RANGE, + .max = OV2722_F_NUMBER_RANGE, + .step = 0x01, + .def = OV2722_F_NUMBER_RANGE, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_LINK_FREQ, + .name = "Link Frequency", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 1, + .max = 1500000 * 1000, + .step = 1, + .def = 1, + .flags = V4L2_CTRL_FLAG_VOLATILE | V4L2_CTRL_FLAG_READ_ONLY, + }, +}; + +static int ov2722_init(struct v4l2_subdev *sd) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + + mutex_lock(&dev->input_lock); + + /* restore settings */ + ov2722_res = ov2722_res_preview; + N_RES = N_RES_PREVIEW; + + mutex_unlock(&dev->input_lock); + + return 0; +} + +static int power_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret = -1; + struct ov2722_device *dev = to_ov2722_sensor(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + if (flag) { + ret = dev->platform_data->v1p8_ctrl(sd, 1); + if (ret == 0) { + ret = dev->platform_data->v2p8_ctrl(sd, 1); + if (ret) + dev->platform_data->v1p8_ctrl(sd, 0); + } + } else { + ret = dev->platform_data->v1p8_ctrl(sd, 0); + ret |= dev->platform_data->v2p8_ctrl(sd, 0); + } + + return ret; +} + +static int gpio_ctrl(struct v4l2_subdev *sd, bool flag) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + int ret = -1; + + if (!dev || !dev->platform_data) + return -ENODEV; + + /* Note: the GPIO order is asymmetric: always RESET# + * before PWDN# when turning it on or off. + */ + ret = dev->platform_data->gpio0_ctrl(sd, flag); + /* + *ov2722 PWDN# active high when pull down,opposite to the convention + */ + ret |= dev->platform_data->gpio1_ctrl(sd, !flag); + return ret; +} + +static int power_up(struct v4l2_subdev *sd) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + + /* power control */ + ret = power_ctrl(sd, 1); + if (ret) + goto fail_power; + + /* according to DS, at least 5ms is needed between DOVDD and PWDN */ + usleep_range(5000, 6000); + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 1); + if (ret) { + ret = gpio_ctrl(sd, 0); + if (ret) + goto fail_power; + } + + /* flis clock control */ + ret = dev->platform_data->flisclk_ctrl(sd, 1); + if (ret) + goto fail_clk; + + /* according to DS, 20ms is needed between PWDN and i2c access */ + msleep(20); + + return 0; + +fail_clk: + gpio_ctrl(sd, 0); +fail_power: + power_ctrl(sd, 0); + dev_err(&client->dev, "sensor power-up failed\n"); + + return ret; +} + +static int power_down(struct v4l2_subdev *sd) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + + ret = dev->platform_data->flisclk_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "flisclk failed\n"); + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 0); + if (ret) { + ret = gpio_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "gpio failed 2\n"); + } + + /* power control */ + ret = power_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "vprog failed.\n"); + + return ret; +} + +static int ov2722_s_power(struct v4l2_subdev *sd, int on) +{ + int ret; + + if (on == 0) + return power_down(sd); + + ret = power_up(sd); + if (!ret) + return ov2722_init(sd); + + return ret; +} + +/* TODO: remove it. */ +static int startup(struct v4l2_subdev *sd) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + ret = ov2722_write_reg(client, OV2722_8BIT, + OV2722_SW_RESET, 0x01); + if (ret) { + dev_err(&client->dev, "ov2722 reset err.\n"); + return ret; + } + + ret = ov2722_write_reg_array(client, dev->res->regs); + if (ret) { + dev_err(&client->dev, "ov2722 write register err.\n"); + return ret; + } + + return ret; +} + +static int ov2722_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct ov2722_device *dev = to_ov2722_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov2722_resolution *res; + struct camera_mipi_info *ov2722_info = NULL; + int ret = 0; + + if (format->pad) + return -EINVAL; + if (!fmt) + return -EINVAL; + ov2722_info = v4l2_get_subdev_hostdata(sd); + if (!ov2722_info) + return -EINVAL; + + mutex_lock(&dev->input_lock); + res = v4l2_find_nearest_size(ov2722_res_preview, + ARRAY_SIZE(ov2722_res_preview), width, + height, fmt->width, fmt->height); + if (!res) + res = &ov2722_res_preview[N_RES - 1]; + + fmt->width = res->width; + fmt->height = res->height; + dev->res = res; + + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; + if (format->which == V4L2_SUBDEV_FORMAT_TRY) { + sd_state->pads->try_fmt = *fmt; + mutex_unlock(&dev->input_lock); + return 0; + } + + + dev->pixels_per_line = dev->res->pixels_per_line; + dev->lines_per_frame = dev->res->lines_per_frame; + + ret = startup(sd); + if (ret) { + int i = 0; + + dev_err(&client->dev, "ov2722 startup err, retry to power up\n"); + for (i = 0; i < OV2722_POWER_UP_RETRY_NUM; i++) { + dev_err(&client->dev, + "ov2722 retry to power up %d/%d times, result: ", + i + 1, OV2722_POWER_UP_RETRY_NUM); + power_down(sd); + ret = power_up(sd); + if (ret) { + dev_err(&client->dev, "power up failed, continue\n"); + continue; + } + ret = startup(sd); + if (ret) { + dev_err(&client->dev, " startup FAILED!\n"); + } else { + dev_err(&client->dev, " startup SUCCESS!\n"); + break; + } + } + if (ret) { + dev_err(&client->dev, "ov2722 startup err\n"); + goto err; + } + } + + ret = ov2722_get_intg_factor(client, ov2722_info, dev->res); + if (ret) + dev_err(&client->dev, "failed to get integration_factor\n"); + +err: + mutex_unlock(&dev->input_lock); + return ret; +} + +static int ov2722_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct ov2722_device *dev = to_ov2722_sensor(sd); + + if (format->pad) + return -EINVAL; + if (!fmt) + return -EINVAL; + + fmt->width = dev->res->width; + fmt->height = dev->res->height; + fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; + + return 0; +} + +static int ov2722_detect(struct i2c_client *client) +{ + struct i2c_adapter *adapter = client->adapter; + u16 high = 0, low = 0; + u16 id; + u8 revision; + + if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) + return -ENODEV; + + ov2722_read_reg(client, OV2722_8BIT, + OV2722_SC_CMMN_CHIP_ID_H, &high); + ov2722_read_reg(client, OV2722_8BIT, + OV2722_SC_CMMN_CHIP_ID_L, &low); + id = (high << 8) | low; + + if ((id != OV2722_ID) && (id != OV2720_ID)) { + dev_err(&client->dev, "sensor ID error\n"); + return -ENODEV; + } + + high = 0; + ov2722_read_reg(client, OV2722_8BIT, + OV2722_SC_CMMN_SUB_ID, &high); + revision = (u8)high & 0x0f; + + dev_dbg(&client->dev, "sensor_revision = 0x%x\n", revision); + dev_dbg(&client->dev, "detect ov2722 success\n"); + return 0; +} + +static int ov2722_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + mutex_lock(&dev->input_lock); + + ret = ov2722_write_reg(client, OV2722_8BIT, OV2722_SW_STREAM, + enable ? OV2722_START_STREAMING : + OV2722_STOP_STREAMING); + + mutex_unlock(&dev->input_lock); + return ret; +} + +static int ov2722_s_config(struct v4l2_subdev *sd, + int irq, void *platform_data) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + if (!platform_data) + return -ENODEV; + + dev->platform_data = + (struct camera_sensor_platform_data *)platform_data; + + mutex_lock(&dev->input_lock); + + /* power off the module, then power on it in future + * as first power on by board may not fulfill the + * power on sequqence needed by the module + */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "ov2722 power-off err.\n"); + goto fail_power_off; + } + + ret = power_up(sd); + if (ret) { + dev_err(&client->dev, "ov2722 power-up err.\n"); + goto fail_power_on; + } + + ret = dev->platform_data->csi_cfg(sd, 1); + if (ret) + goto fail_csi_cfg; + + /* config & detect sensor */ + ret = ov2722_detect(client); + if (ret) { + dev_err(&client->dev, "ov2722_detect err s_config.\n"); + goto fail_csi_cfg; + } + + /* turn off sensor, after probed */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "ov2722 power-off err.\n"); + goto fail_csi_cfg; + } + mutex_unlock(&dev->input_lock); + + return 0; + +fail_csi_cfg: + dev->platform_data->csi_cfg(sd, 0); +fail_power_on: + power_down(sd); + dev_err(&client->dev, "sensor power-gating failed\n"); +fail_power_off: + mutex_unlock(&dev->input_lock); + return ret; +} + +static int ov2722_g_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *interval) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + + interval->interval.numerator = 1; + interval->interval.denominator = dev->res->fps; + + return 0; +} + +static int ov2722_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index >= MAX_FMTS) + return -EINVAL; + + code->code = MEDIA_BUS_FMT_SBGGR10_1X10; + return 0; +} + +static int ov2722_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_frame_size_enum *fse) +{ + int index = fse->index; + + if (index >= N_RES) + return -EINVAL; + + fse->min_width = ov2722_res[index].width; + fse->min_height = ov2722_res[index].height; + fse->max_width = ov2722_res[index].width; + fse->max_height = ov2722_res[index].height; + + return 0; +} + +static int ov2722_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + + mutex_lock(&dev->input_lock); + *frames = dev->res->skip_frames; + mutex_unlock(&dev->input_lock); + + return 0; +} + +static const struct v4l2_subdev_sensor_ops ov2722_sensor_ops = { + .g_skip_frames = ov2722_g_skip_frames, +}; + +static const struct v4l2_subdev_video_ops ov2722_video_ops = { + .s_stream = ov2722_s_stream, + .g_frame_interval = ov2722_g_frame_interval, +}; + +static const struct v4l2_subdev_core_ops ov2722_core_ops = { + .s_power = ov2722_s_power, + .ioctl = ov2722_ioctl, +}; + +static const struct v4l2_subdev_pad_ops ov2722_pad_ops = { + .enum_mbus_code = ov2722_enum_mbus_code, + .enum_frame_size = ov2722_enum_frame_size, + .get_fmt = ov2722_get_fmt, + .set_fmt = ov2722_set_fmt, +}; + +static const struct v4l2_subdev_ops ov2722_ops = { + .core = &ov2722_core_ops, + .video = &ov2722_video_ops, + .pad = &ov2722_pad_ops, + .sensor = &ov2722_sensor_ops, +}; + +static void ov2722_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov2722_device *dev = to_ov2722_sensor(sd); + + dev->platform_data->csi_cfg(sd, 0); + v4l2_ctrl_handler_free(&dev->ctrl_handler); + v4l2_device_unregister_subdev(sd); + + atomisp_gmin_remove_subdev(sd); + + media_entity_cleanup(&dev->sd.entity); + kfree(dev); +} + +static int __ov2722_init_ctrl_handler(struct ov2722_device *dev) +{ + struct v4l2_ctrl_handler *hdl; + unsigned int i; + + hdl = &dev->ctrl_handler; + v4l2_ctrl_handler_init(&dev->ctrl_handler, ARRAY_SIZE(ov2722_controls)); + for (i = 0; i < ARRAY_SIZE(ov2722_controls); i++) + v4l2_ctrl_new_custom(&dev->ctrl_handler, &ov2722_controls[i], + NULL); + + dev->link_freq = v4l2_ctrl_find(&dev->ctrl_handler, V4L2_CID_LINK_FREQ); + + if (dev->ctrl_handler.error || !dev->link_freq) + return dev->ctrl_handler.error; + + dev->sd.ctrl_handler = hdl; + + return 0; +} + +static int ov2722_probe(struct i2c_client *client) +{ + struct ov2722_device *dev; + void *ovpdev; + int ret; + + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + mutex_init(&dev->input_lock); + + dev->res = &ov2722_res_preview[0]; + v4l2_i2c_subdev_init(&dev->sd, client, &ov2722_ops); + + ovpdev = gmin_camera_platform_data(&dev->sd, + ATOMISP_INPUT_FORMAT_RAW_10, + atomisp_bayer_order_grbg); + + ret = ov2722_s_config(&dev->sd, client->irq, ovpdev); + if (ret) + goto out_free; + + ret = __ov2722_init_ctrl_handler(dev); + if (ret) + goto out_ctrl_handler_free; + + dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + dev->pad.flags = MEDIA_PAD_FL_SOURCE; + dev->format.code = MEDIA_BUS_FMT_SBGGR10_1X10; + dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; + + ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad); + if (ret) + ov2722_remove(client); + + return atomisp_register_i2c_module(&dev->sd, ovpdev, RAW_CAMERA); + +out_ctrl_handler_free: + v4l2_ctrl_handler_free(&dev->ctrl_handler); + +out_free: + v4l2_device_unregister_subdev(&dev->sd); + kfree(dev); + return ret; +} + +static const struct acpi_device_id ov2722_acpi_match[] = { + { "INT33FB" }, + {}, +}; +MODULE_DEVICE_TABLE(acpi, ov2722_acpi_match); + +static struct i2c_driver ov2722_driver = { + .driver = { + .name = "ov2722", + .acpi_match_table = ov2722_acpi_match, + }, + .probe_new = ov2722_probe, + .remove = ov2722_remove, +}; +module_i2c_driver(ov2722_driver); + +MODULE_AUTHOR("Wei Liu <wei.liu@intel.com>"); +MODULE_DESCRIPTION("A low-level driver for OmniVision 2722 sensors"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/atomisp/i2c/gc0310.h b/drivers/staging/media/atomisp/i2c/gc0310.h new file mode 100644 index 000000000..db643ebc3 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/gc0310.h @@ -0,0 +1,404 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Support for GalaxyCore GC0310 VGA camera sensor. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __GC0310_H__ +#define __GC0310_H__ +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/i2c.h> +#include <linux/acpi.h> +#include <linux/delay.h> +#include <linux/videodev2.h> +#include <linux/spinlock.h> +#include <media/v4l2-subdev.h> +#include <media/v4l2-device.h> +#include <media/v4l2-ctrls.h> +#include <linux/v4l2-mediabus.h> +#include <media/media-entity.h> + +#include "../include/linux/atomisp_platform.h" + +/* Defines for register writes and register array processing */ +#define I2C_MSG_LENGTH 1 +#define I2C_RETRY_COUNT 5 + +#define GC0310_FOCAL_LENGTH_NUM 278 /*2.78mm*/ +#define GC0310_FOCAL_LENGTH_DEM 100 +#define GC0310_F_NUMBER_DEFAULT_NUM 26 +#define GC0310_F_NUMBER_DEM 10 + +#define MAX_FMTS 1 + +/* + * focal length bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define GC0310_FOCAL_LENGTH_DEFAULT 0x1160064 + +/* + * current f-number bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define GC0310_F_NUMBER_DEFAULT 0x1a000a + +/* + * f-number range bits definition: + * bits 31-24: max f-number numerator + * bits 23-16: max f-number denominator + * bits 15-8: min f-number numerator + * bits 7-0: min f-number denominator + */ +#define GC0310_F_NUMBER_RANGE 0x1a0a1a0a +#define GC0310_ID 0xa310 + +#define GC0310_RESET_RELATED 0xFE +#define GC0310_REGISTER_PAGE_0 0x0 +#define GC0310_REGISTER_PAGE_3 0x3 + +#define GC0310_FINE_INTG_TIME_MIN 0 +#define GC0310_FINE_INTG_TIME_MAX_MARGIN 0 +#define GC0310_COARSE_INTG_TIME_MIN 1 +#define GC0310_COARSE_INTG_TIME_MAX_MARGIN 6 + +/* + * GC0310 System control registers + */ +#define GC0310_SW_STREAM 0x10 + +#define GC0310_SC_CMMN_CHIP_ID_H 0xf0 +#define GC0310_SC_CMMN_CHIP_ID_L 0xf1 + +#define GC0310_AEC_PK_EXPO_H 0x03 +#define GC0310_AEC_PK_EXPO_L 0x04 +#define GC0310_AGC_ADJ 0x48 +#define GC0310_DGC_ADJ 0x71 +#if 0 +#define GC0310_GROUP_ACCESS 0x3208 +#endif + +#define GC0310_H_CROP_START_H 0x09 +#define GC0310_H_CROP_START_L 0x0A +#define GC0310_V_CROP_START_H 0x0B +#define GC0310_V_CROP_START_L 0x0C +#define GC0310_H_OUTSIZE_H 0x0F +#define GC0310_H_OUTSIZE_L 0x10 +#define GC0310_V_OUTSIZE_H 0x0D +#define GC0310_V_OUTSIZE_L 0x0E +#define GC0310_H_BLANKING_H 0x05 +#define GC0310_H_BLANKING_L 0x06 +#define GC0310_V_BLANKING_H 0x07 +#define GC0310_V_BLANKING_L 0x08 +#define GC0310_SH_DELAY 0x11 + +#define GC0310_START_STREAMING 0x94 /* 8-bit enable */ +#define GC0310_STOP_STREAMING 0x0 /* 8-bit disable */ + +#define GC0310_BIN_FACTOR_MAX 3 + +struct regval_list { + u16 reg_num; + u8 value; +}; + +struct gc0310_resolution { + u8 *desc; + const struct gc0310_reg *regs; + int res; + int width; + int height; + int fps; + int pix_clk_freq; + u32 skip_frames; + u16 pixels_per_line; + u16 lines_per_frame; + u8 bin_factor_x; + u8 bin_factor_y; + u8 bin_mode; + bool used; +}; + +struct gc0310_format { + u8 *desc; + u32 pixelformat; + struct gc0310_reg *regs; +}; + +/* + * gc0310 device structure. + */ +struct gc0310_device { + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_mbus_framefmt format; + struct mutex input_lock; + struct v4l2_ctrl_handler ctrl_handler; + + struct camera_sensor_platform_data *platform_data; + int vt_pix_clk_freq_mhz; + struct gc0310_resolution *res; + u8 type; +}; + +enum gc0310_tok_type { + GC0310_8BIT = 0x0001, + GC0310_TOK_TERM = 0xf000, /* terminating token for reg list */ + GC0310_TOK_DELAY = 0xfe00, /* delay token for reg list */ + GC0310_TOK_MASK = 0xfff0 +}; + +/** + * struct gc0310_reg - MI sensor register format + * @type: type of the register + * @reg: 16-bit offset to register + * @val: 8/16/32-bit register value + * + * Define a structure for sensor register initialization values + */ +struct gc0310_reg { + enum gc0310_tok_type type; + u8 reg; + u8 val; /* @set value for read/mod/write, @mask */ +}; + +#define to_gc0310_sensor(x) container_of(x, struct gc0310_device, sd) + +#define GC0310_MAX_WRITE_BUF_SIZE 30 + +struct gc0310_write_buffer { + u8 addr; + u8 data[GC0310_MAX_WRITE_BUF_SIZE]; +}; + +struct gc0310_write_ctrl { + int index; + struct gc0310_write_buffer buffer; +}; + +/* + * Register settings for various resolution + */ +static const struct gc0310_reg gc0310_reset_register[] = { +///////////////////////////////////////////////// +///////////////// system reg ///////////////// +///////////////////////////////////////////////// + {GC0310_8BIT, 0xfe, 0xf0}, + {GC0310_8BIT, 0xfe, 0xf0}, + {GC0310_8BIT, 0xfe, 0x00}, + + {GC0310_8BIT, 0xfc, 0x0e}, //4e + {GC0310_8BIT, 0xfc, 0x0e}, //16//4e // [0]apwd [6]regf_clk_gate + {GC0310_8BIT, 0xf2, 0x80}, //sync output + {GC0310_8BIT, 0xf3, 0x00}, //1f//01 data output + {GC0310_8BIT, 0xf7, 0x33}, //f9 + {GC0310_8BIT, 0xf8, 0x05}, //00 + {GC0310_8BIT, 0xf9, 0x0e}, // 0x8e //0f + {GC0310_8BIT, 0xfa, 0x11}, + +///////////////////////////////////////////////// +/////////////////// MIPI //////////////////// +///////////////////////////////////////////////// + {GC0310_8BIT, 0xfe, 0x03}, + {GC0310_8BIT, 0x01, 0x03}, ///mipi 1lane + {GC0310_8BIT, 0x02, 0x22}, // 0x33 + {GC0310_8BIT, 0x03, 0x94}, + {GC0310_8BIT, 0x04, 0x01}, // fifo_prog + {GC0310_8BIT, 0x05, 0x00}, //fifo_prog + {GC0310_8BIT, 0x06, 0x80}, //b0 //YUV ISP data + {GC0310_8BIT, 0x11, 0x2a},//1e //LDI set YUV422 + {GC0310_8BIT, 0x12, 0x90},//00 //04 //00 //04//00 //LWC[7:0] // + {GC0310_8BIT, 0x13, 0x02},//05 //05 //LWC[15:8] + {GC0310_8BIT, 0x15, 0x12}, // 0x10 //DPHYY_MODE read_ready + {GC0310_8BIT, 0x17, 0x01}, + {GC0310_8BIT, 0x40, 0x08}, + {GC0310_8BIT, 0x41, 0x00}, + {GC0310_8BIT, 0x42, 0x00}, + {GC0310_8BIT, 0x43, 0x00}, + {GC0310_8BIT, 0x21, 0x02}, // 0x01 + {GC0310_8BIT, 0x22, 0x02}, // 0x01 + {GC0310_8BIT, 0x23, 0x01}, // 0x05 //Nor:0x05 DOU:0x06 + {GC0310_8BIT, 0x29, 0x00}, + {GC0310_8BIT, 0x2A, 0x25}, // 0x05 //data zero 0x7a de + {GC0310_8BIT, 0x2B, 0x02}, + + {GC0310_8BIT, 0xfe, 0x00}, + +///////////////////////////////////////////////// +///////////////// CISCTL reg ///////////////// +///////////////////////////////////////////////// + {GC0310_8BIT, 0x00, 0x2f}, //2f//0f//02//01 + {GC0310_8BIT, 0x01, 0x0f}, //06 + {GC0310_8BIT, 0x02, 0x04}, + {GC0310_8BIT, 0x4f, 0x00}, //AEC 0FF + {GC0310_8BIT, 0x03, 0x01}, // 0x03 //04 + {GC0310_8BIT, 0x04, 0xc0}, // 0xe8 //58 + {GC0310_8BIT, 0x05, 0x00}, + {GC0310_8BIT, 0x06, 0xb2}, // 0x0a //HB + {GC0310_8BIT, 0x07, 0x00}, + {GC0310_8BIT, 0x08, 0x0c}, // 0x89 //VB + {GC0310_8BIT, 0x09, 0x00}, //row start + {GC0310_8BIT, 0x0a, 0x00}, // + {GC0310_8BIT, 0x0b, 0x00}, //col start + {GC0310_8BIT, 0x0c, 0x00}, + {GC0310_8BIT, 0x0d, 0x01}, //height + {GC0310_8BIT, 0x0e, 0xf2}, // 0xf7 //height + {GC0310_8BIT, 0x0f, 0x02}, //width + {GC0310_8BIT, 0x10, 0x94}, // 0xa0 //height + {GC0310_8BIT, 0x17, 0x14}, + {GC0310_8BIT, 0x18, 0x1a}, //0a//[4]double reset + {GC0310_8BIT, 0x19, 0x14}, //AD pipeline + {GC0310_8BIT, 0x1b, 0x48}, + {GC0310_8BIT, 0x1e, 0x6b}, //3b//col bias + {GC0310_8BIT, 0x1f, 0x28}, //20//00//08//txlow + {GC0310_8BIT, 0x20, 0x89}, //88//0c//[3:2]DA15 + {GC0310_8BIT, 0x21, 0x49}, //48//[3] txhigh + {GC0310_8BIT, 0x22, 0xb0}, + {GC0310_8BIT, 0x23, 0x04}, //[1:0]vcm_r + {GC0310_8BIT, 0x24, 0x16}, //15 + {GC0310_8BIT, 0x34, 0x20}, //[6:4] rsg high//range + +///////////////////////////////////////////////// +//////////////////// BLK //////////////////// +///////////////////////////////////////////////// + {GC0310_8BIT, 0x26, 0x23}, //[1]dark_current_en [0]offset_en + {GC0310_8BIT, 0x28, 0xff}, //BLK_limie_value + {GC0310_8BIT, 0x29, 0x00}, //global offset + {GC0310_8BIT, 0x33, 0x18}, //offset_ratio + {GC0310_8BIT, 0x37, 0x20}, //dark_current_ratio + {GC0310_8BIT, 0x2a, 0x00}, + {GC0310_8BIT, 0x2b, 0x00}, + {GC0310_8BIT, 0x2c, 0x00}, + {GC0310_8BIT, 0x2d, 0x00}, + {GC0310_8BIT, 0x2e, 0x00}, + {GC0310_8BIT, 0x2f, 0x00}, + {GC0310_8BIT, 0x30, 0x00}, + {GC0310_8BIT, 0x31, 0x00}, + {GC0310_8BIT, 0x47, 0x80}, //a7 + {GC0310_8BIT, 0x4e, 0x66}, //select_row + {GC0310_8BIT, 0xa8, 0x02}, //win_width_dark, same with crop_win_width + {GC0310_8BIT, 0xa9, 0x80}, + +///////////////////////////////////////////////// +////////////////// ISP reg /////////////////// +///////////////////////////////////////////////// + {GC0310_8BIT, 0x40, 0x06}, // 0xff //ff //48 + {GC0310_8BIT, 0x41, 0x00}, // 0x21 //00//[0]curve_en + {GC0310_8BIT, 0x42, 0x04}, // 0xcf //0a//[1]awn_en + {GC0310_8BIT, 0x44, 0x18}, // 0x18 //02 + {GC0310_8BIT, 0x46, 0x02}, // 0x03 //sync + {GC0310_8BIT, 0x49, 0x03}, + {GC0310_8BIT, 0x4c, 0x20}, //00[5]pretect exp + {GC0310_8BIT, 0x50, 0x01}, //crop enable + {GC0310_8BIT, 0x51, 0x00}, + {GC0310_8BIT, 0x52, 0x00}, + {GC0310_8BIT, 0x53, 0x00}, + {GC0310_8BIT, 0x54, 0x01}, + {GC0310_8BIT, 0x55, 0x01}, //crop window height + {GC0310_8BIT, 0x56, 0xf0}, + {GC0310_8BIT, 0x57, 0x02}, //crop window width + {GC0310_8BIT, 0x58, 0x90}, + +///////////////////////////////////////////////// +/////////////////// GAIN //////////////////// +///////////////////////////////////////////////// + {GC0310_8BIT, 0x70, 0x70}, //70 //80//global gain + {GC0310_8BIT, 0x71, 0x20}, // pregain gain + {GC0310_8BIT, 0x72, 0x40}, // post gain + {GC0310_8BIT, 0x5a, 0x84}, //84//analog gain 0 + {GC0310_8BIT, 0x5b, 0xc9}, //c9 + {GC0310_8BIT, 0x5c, 0xed}, //ed//not use pga gain highest level + {GC0310_8BIT, 0x77, 0x40}, // R gain 0x74 //awb gain + {GC0310_8BIT, 0x78, 0x40}, // G gain + {GC0310_8BIT, 0x79, 0x40}, // B gain 0x5f + + {GC0310_8BIT, 0x48, 0x00}, + {GC0310_8BIT, 0xfe, 0x01}, + {GC0310_8BIT, 0x0a, 0x45}, //[7]col gain mode + + {GC0310_8BIT, 0x3e, 0x40}, + {GC0310_8BIT, 0x3f, 0x5c}, + {GC0310_8BIT, 0x40, 0x7b}, + {GC0310_8BIT, 0x41, 0xbd}, + {GC0310_8BIT, 0x42, 0xf6}, + {GC0310_8BIT, 0x43, 0x63}, + {GC0310_8BIT, 0x03, 0x60}, + {GC0310_8BIT, 0x44, 0x03}, + +///////////////////////////////////////////////// +///////////////// dark sun ////////////////// +///////////////////////////////////////////////// + {GC0310_8BIT, 0xfe, 0x01}, + {GC0310_8BIT, 0x45, 0xa4}, // 0xf7 + {GC0310_8BIT, 0x46, 0xf0}, // 0xff //f0//sun value th + {GC0310_8BIT, 0x48, 0x03}, //sun mode + {GC0310_8BIT, 0x4f, 0x60}, //sun_clamp + {GC0310_8BIT, 0xfe, 0x00}, + + {GC0310_TOK_TERM, 0, 0}, +}; + +static struct gc0310_reg const gc0310_VGA_30fps[] = { + {GC0310_8BIT, 0xfe, 0x00}, + {GC0310_8BIT, 0x0d, 0x01}, //height + {GC0310_8BIT, 0x0e, 0xf2}, // 0xf7 //height + {GC0310_8BIT, 0x0f, 0x02}, //width + {GC0310_8BIT, 0x10, 0x94}, // 0xa0 //height + + {GC0310_8BIT, 0x50, 0x01}, //crop enable + {GC0310_8BIT, 0x51, 0x00}, + {GC0310_8BIT, 0x52, 0x00}, + {GC0310_8BIT, 0x53, 0x00}, + {GC0310_8BIT, 0x54, 0x01}, + {GC0310_8BIT, 0x55, 0x01}, //crop window height + {GC0310_8BIT, 0x56, 0xf0}, + {GC0310_8BIT, 0x57, 0x02}, //crop window width + {GC0310_8BIT, 0x58, 0x90}, + + {GC0310_8BIT, 0xfe, 0x03}, + {GC0310_8BIT, 0x12, 0x90},//00 //04 //00 //04//00 //LWC[7:0] // + {GC0310_8BIT, 0x13, 0x02},//05 //05 //LWC[15:8] + + {GC0310_8BIT, 0xfe, 0x00}, + + {GC0310_TOK_TERM, 0, 0}, +}; + +static struct gc0310_resolution gc0310_res_preview[] = { + { + .desc = "gc0310_VGA_30fps", + .width = 656, // 648, + .height = 496, // 488, + .fps = 30, + //.pix_clk_freq = 73, + .used = 0, +#if 0 + .pixels_per_line = 0x0314, + .lines_per_frame = 0x0213, +#endif + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 2, + .regs = gc0310_VGA_30fps, + }, +}; + +#define N_RES_PREVIEW (ARRAY_SIZE(gc0310_res_preview)) + +static struct gc0310_resolution *gc0310_res = gc0310_res_preview; +static unsigned long N_RES = N_RES_PREVIEW; +#endif diff --git a/drivers/staging/media/atomisp/i2c/gc2235.h b/drivers/staging/media/atomisp/i2c/gc2235.h new file mode 100644 index 000000000..806be5dff --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/gc2235.h @@ -0,0 +1,680 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Support for GalaxyCore GC2235 2M camera sensor. + * + * Copyright (c) 2014 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. + * + */ + +#ifndef __GC2235_H__ +#define __GC2235_H__ +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/i2c.h> +#include <linux/delay.h> +#include <linux/videodev2.h> +#include <linux/spinlock.h> +#include <media/v4l2-subdev.h> +#include <media/v4l2-device.h> +#include <media/v4l2-ctrls.h> +#include <linux/v4l2-mediabus.h> +#include <media/media-entity.h> + +#include "../include/linux/atomisp_platform.h" + +/* + * FIXME: non-preview resolutions are currently broken + */ +#define ENABLE_NON_PREVIEW 0 + +/* Defines for register writes and register array processing */ +#define I2C_MSG_LENGTH 0x2 +#define I2C_RETRY_COUNT 5 + +#define GC2235_FOCAL_LENGTH_NUM 278 /*2.78mm*/ +#define GC2235_FOCAL_LENGTH_DEM 100 +#define GC2235_F_NUMBER_DEFAULT_NUM 26 +#define GC2235_F_NUMBER_DEM 10 + +#define MAX_FMTS 1 + +/* + * focal length bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define GC2235_FOCAL_LENGTH_DEFAULT 0x1160064 + +/* + * current f-number bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define GC2235_F_NUMBER_DEFAULT 0x1a000a + +/* + * f-number range bits definition: + * bits 31-24: max f-number numerator + * bits 23-16: max f-number denominator + * bits 15-8: min f-number numerator + * bits 7-0: min f-number denominator + */ +#define GC2235_F_NUMBER_RANGE 0x1a0a1a0a +#define GC2235_ID 0x2235 + +#define GC2235_FINE_INTG_TIME_MIN 0 +#define GC2235_FINE_INTG_TIME_MAX_MARGIN 0 +#define GC2235_COARSE_INTG_TIME_MIN 1 +#define GC2235_COARSE_INTG_TIME_MAX_MARGIN 6 + +/* + * GC2235 System control registers + */ +/* + * GC2235 System control registers + */ +#define GC2235_SENSOR_ID_H 0xF0 +#define GC2235_SENSOR_ID_L 0xF1 +#define GC2235_RESET_RELATED 0xFE +#define GC2235_SW_RESET 0x8 +#define GC2235_MIPI_RESET 0x3 +#define GC2235_RESET_BIT 0x4 +#define GC2235_REGISTER_PAGE_0 0x0 +#define GC2235_REGISTER_PAGE_3 0x3 + +#define GC2235_V_CROP_START_H 0x91 +#define GC2235_V_CROP_START_L 0x92 +#define GC2235_H_CROP_START_H 0x93 +#define GC2235_H_CROP_START_L 0x94 +#define GC2235_V_OUTSIZE_H 0x95 +#define GC2235_V_OUTSIZE_L 0x96 +#define GC2235_H_OUTSIZE_H 0x97 +#define GC2235_H_OUTSIZE_L 0x98 + +#define GC2235_HB_H 0x5 +#define GC2235_HB_L 0x6 +#define GC2235_VB_H 0x7 +#define GC2235_VB_L 0x8 +#define GC2235_SH_DELAY_H 0x11 +#define GC2235_SH_DELAY_L 0x12 + +#define GC2235_CSI2_MODE 0x10 + +#define GC2235_EXPOSURE_H 0x3 +#define GC2235_EXPOSURE_L 0x4 +#define GC2235_GLOBAL_GAIN 0xB0 +#define GC2235_PRE_GAIN 0xB1 +#define GC2235_AWB_R_GAIN 0xB3 +#define GC2235_AWB_G_GAIN 0xB4 +#define GC2235_AWB_B_GAIN 0xB5 + +#define GC2235_START_STREAMING 0x91 +#define GC2235_STOP_STREAMING 0x0 + +struct regval_list { + u16 reg_num; + u8 value; +}; + +struct gc2235_resolution { + u8 *desc; + const struct gc2235_reg *regs; + int res; + int width; + int height; + int fps; + int pix_clk_freq; + u32 skip_frames; + u16 pixels_per_line; + u16 lines_per_frame; + u8 bin_factor_x; + u8 bin_factor_y; + u8 bin_mode; + bool used; +}; + +struct gc2235_format { + u8 *desc; + u32 pixelformat; + struct gc2235_reg *regs; +}; + +/* + * gc2235 device structure. + */ +struct gc2235_device { + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_mbus_framefmt format; + struct mutex input_lock; + struct v4l2_ctrl_handler ctrl_handler; + struct gc2235_resolution *res; + + struct camera_sensor_platform_data *platform_data; + int vt_pix_clk_freq_mhz; + u8 type; +}; + +enum gc2235_tok_type { + GC2235_8BIT = 0x0001, + GC2235_16BIT = 0x0002, + GC2235_32BIT = 0x0004, + GC2235_TOK_TERM = 0xf000, /* terminating token for reg list */ + GC2235_TOK_DELAY = 0xfe00, /* delay token for reg list */ + GC2235_TOK_MASK = 0xfff0 +}; + +/** + * struct gc2235_reg - MI sensor register format + * @type: type of the register + * @reg: 8-bit offset to register + * @val: 8/16/32-bit register value + * + * Define a structure for sensor register initialization values + */ +struct gc2235_reg { + enum gc2235_tok_type type; + u8 reg; + u32 val; /* @set value for read/mod/write, @mask */ +}; + +#define to_gc2235_sensor(x) container_of(x, struct gc2235_device, sd) + +#define GC2235_MAX_WRITE_BUF_SIZE 30 + +struct gc2235_write_buffer { + u8 addr; + u8 data[GC2235_MAX_WRITE_BUF_SIZE]; +}; + +struct gc2235_write_ctrl { + int index; + struct gc2235_write_buffer buffer; +}; + +static struct gc2235_reg const gc2235_stream_on[] = { + { GC2235_8BIT, 0xfe, 0x03}, /* switch to P3 */ + { GC2235_8BIT, 0x10, 0x91}, /* start mipi */ + { GC2235_8BIT, 0xfe, 0x00}, /* switch to P0 */ + { GC2235_TOK_TERM, 0, 0 } +}; + +static struct gc2235_reg const gc2235_stream_off[] = { + { GC2235_8BIT, 0xfe, 0x03}, /* switch to P3 */ + { GC2235_8BIT, 0x10, 0x01}, /* stop mipi */ + { GC2235_8BIT, 0xfe, 0x00}, /* switch to P0 */ + { GC2235_TOK_TERM, 0, 0 } +}; + +static struct gc2235_reg const gc2235_init_settings[] = { + /* System */ + { GC2235_8BIT, 0xfe, 0x80 }, + { GC2235_8BIT, 0xfe, 0x80 }, + { GC2235_8BIT, 0xfe, 0x80 }, + { GC2235_8BIT, 0xf2, 0x00 }, + { GC2235_8BIT, 0xf6, 0x00 }, + { GC2235_8BIT, 0xfc, 0x06 }, + { GC2235_8BIT, 0xf7, 0x15 }, + { GC2235_8BIT, 0xf8, 0x84 }, + { GC2235_8BIT, 0xf9, 0xfe }, + { GC2235_8BIT, 0xfa, 0x00 }, + { GC2235_8BIT, 0xfe, 0x00 }, + /* Analog & cisctl */ + { GC2235_8BIT, 0x03, 0x04 }, + { GC2235_8BIT, 0x04, 0x9E }, + { GC2235_8BIT, 0x05, 0x00 }, + { GC2235_8BIT, 0x06, 0xfd }, + { GC2235_8BIT, 0x07, 0x00 }, + { GC2235_8BIT, 0x08, 0x14 }, + { GC2235_8BIT, 0x0a, 0x02 }, /* row start */ + { GC2235_8BIT, 0x0c, 0x00 }, /* col start */ + { GC2235_8BIT, 0x0d, 0x04 }, /* win height 1232 */ + { GC2235_8BIT, 0x0e, 0xd0 }, + { GC2235_8BIT, 0x0f, 0x06 }, /* win width: 1616 */ + { GC2235_8BIT, 0x10, 0x60 }, + { GC2235_8BIT, 0x17, 0x15 }, /* mirror flip */ + { GC2235_8BIT, 0x18, 0x1a }, + { GC2235_8BIT, 0x19, 0x06 }, + { GC2235_8BIT, 0x1a, 0x01 }, + { GC2235_8BIT, 0x1b, 0x4d }, + { GC2235_8BIT, 0x1e, 0x88 }, + { GC2235_8BIT, 0x1f, 0x48 }, + { GC2235_8BIT, 0x20, 0x03 }, + { GC2235_8BIT, 0x21, 0x7f }, + { GC2235_8BIT, 0x22, 0x83 }, + { GC2235_8BIT, 0x23, 0x42 }, + { GC2235_8BIT, 0x24, 0x16 }, + { GC2235_8BIT, 0x26, 0x01 }, /*analog gain*/ + { GC2235_8BIT, 0x27, 0x30 }, + { GC2235_8BIT, 0x3f, 0x00 }, /* PRC */ + /* blk */ + { GC2235_8BIT, 0x40, 0xa3 }, + { GC2235_8BIT, 0x41, 0x82 }, + { GC2235_8BIT, 0x43, 0x20 }, + { GC2235_8BIT, 0x5e, 0x18 }, + { GC2235_8BIT, 0x5f, 0x18 }, + { GC2235_8BIT, 0x60, 0x18 }, + { GC2235_8BIT, 0x61, 0x18 }, + { GC2235_8BIT, 0x62, 0x18 }, + { GC2235_8BIT, 0x63, 0x18 }, + { GC2235_8BIT, 0x64, 0x18 }, + { GC2235_8BIT, 0x65, 0x18 }, + { GC2235_8BIT, 0x66, 0x20 }, + { GC2235_8BIT, 0x67, 0x20 }, + { GC2235_8BIT, 0x68, 0x20 }, + { GC2235_8BIT, 0x69, 0x20 }, + /* Gain */ + { GC2235_8BIT, 0xb2, 0x00 }, + { GC2235_8BIT, 0xb3, 0x40 }, + { GC2235_8BIT, 0xb4, 0x40 }, + { GC2235_8BIT, 0xb5, 0x40 }, + /* Dark sun */ + { GC2235_8BIT, 0xbc, 0x00 }, + + { GC2235_8BIT, 0xfe, 0x03 }, + { GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */ + { GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */ + { GC2235_TOK_TERM, 0, 0 } +}; + +/* + * Register settings for various resolution + */ +#if ENABLE_NON_PREVIEW +static struct gc2235_reg const gc2235_1296_736_30fps[] = { + { GC2235_8BIT, 0x8b, 0xa0 }, + { GC2235_8BIT, 0x8c, 0x02 }, + + { GC2235_8BIT, 0x07, 0x01 }, /* VBI */ + { GC2235_8BIT, 0x08, 0x44 }, + { GC2235_8BIT, 0x09, 0x00 }, /* row start */ + { GC2235_8BIT, 0x0a, 0xf0 }, + { GC2235_8BIT, 0x0b, 0x00 }, /* col start */ + { GC2235_8BIT, 0x0c, 0xa0 }, + { GC2235_8BIT, 0x0d, 0x02 }, /* win height 736 */ + { GC2235_8BIT, 0x0e, 0xf0 }, + { GC2235_8BIT, 0x0f, 0x05 }, /* win width: 1296 */ + { GC2235_8BIT, 0x10, 0x20 }, + + { GC2235_8BIT, 0x90, 0x01 }, + { GC2235_8BIT, 0x92, 0x08 }, + { GC2235_8BIT, 0x94, 0x08 }, + { GC2235_8BIT, 0x95, 0x02 }, /* crop win height 736 */ + { GC2235_8BIT, 0x96, 0xe0 }, + { GC2235_8BIT, 0x97, 0x05 }, /* crop win width 1296 */ + { GC2235_8BIT, 0x98, 0x10 }, + /* mimi init */ + { GC2235_8BIT, 0xfe, 0x03 }, /* switch to P3 */ + { GC2235_8BIT, 0x01, 0x07 }, + { GC2235_8BIT, 0x02, 0x11 }, + { GC2235_8BIT, 0x03, 0x11 }, + { GC2235_8BIT, 0x06, 0x80 }, + { GC2235_8BIT, 0x11, 0x2b }, + /* set mipi buffer */ + { GC2235_8BIT, 0x12, 0x54 }, /* val_low = (width * 10 / 8) & 0xFF */ + { GC2235_8BIT, 0x13, 0x06 }, /* val_high = (width * 10 / 8) >> 8 */ + + { GC2235_8BIT, 0x15, 0x12 }, /* DPHY mode*/ + { GC2235_8BIT, 0x04, 0x10 }, + { GC2235_8BIT, 0x05, 0x00 }, + { GC2235_8BIT, 0x17, 0x01 }, + + { GC2235_8BIT, 0x22, 0x01 }, + { GC2235_8BIT, 0x23, 0x05 }, + { GC2235_8BIT, 0x24, 0x10 }, + { GC2235_8BIT, 0x25, 0x10 }, + { GC2235_8BIT, 0x26, 0x02 }, + { GC2235_8BIT, 0x21, 0x10 }, + { GC2235_8BIT, 0x29, 0x01 }, + { GC2235_8BIT, 0x2a, 0x02 }, + { GC2235_8BIT, 0x2b, 0x02 }, + + { GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */ + { GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */ + { GC2235_TOK_TERM, 0, 0 } +}; + +static struct gc2235_reg const gc2235_960_640_30fps[] = { + { GC2235_8BIT, 0x8b, 0xa0 }, + { GC2235_8BIT, 0x8c, 0x02 }, + + { GC2235_8BIT, 0x07, 0x02 }, /* VBI */ + { GC2235_8BIT, 0x08, 0xA4 }, + { GC2235_8BIT, 0x09, 0x01 }, /* row start */ + { GC2235_8BIT, 0x0a, 0x18 }, + { GC2235_8BIT, 0x0b, 0x01 }, /* col start */ + { GC2235_8BIT, 0x0c, 0x40 }, + { GC2235_8BIT, 0x0d, 0x02 }, /* win height 656 */ + { GC2235_8BIT, 0x0e, 0x90 }, + { GC2235_8BIT, 0x0f, 0x03 }, /* win width: 976 */ + { GC2235_8BIT, 0x10, 0xd0 }, + + { GC2235_8BIT, 0x90, 0x01 }, + { GC2235_8BIT, 0x92, 0x02 }, + { GC2235_8BIT, 0x94, 0x06 }, + { GC2235_8BIT, 0x95, 0x02 }, /* crop win height 640 */ + { GC2235_8BIT, 0x96, 0x80 }, + { GC2235_8BIT, 0x97, 0x03 }, /* crop win width 960 */ + { GC2235_8BIT, 0x98, 0xc0 }, + /* mimp init */ + { GC2235_8BIT, 0xfe, 0x03 }, /* switch to P3 */ + { GC2235_8BIT, 0x01, 0x07 }, + { GC2235_8BIT, 0x02, 0x11 }, + { GC2235_8BIT, 0x03, 0x11 }, + { GC2235_8BIT, 0x06, 0x80 }, + { GC2235_8BIT, 0x11, 0x2b }, + /* set mipi buffer */ + { GC2235_8BIT, 0x12, 0xb0 }, /* val_low = (width * 10 / 8) & 0xFF */ + { GC2235_8BIT, 0x13, 0x04 }, /* val_high = (width * 10 / 8) >> 8 */ + + { GC2235_8BIT, 0x15, 0x12 }, /* DPHY mode*/ + { GC2235_8BIT, 0x04, 0x10 }, + { GC2235_8BIT, 0x05, 0x00 }, + { GC2235_8BIT, 0x17, 0x01 }, + { GC2235_8BIT, 0x22, 0x01 }, + { GC2235_8BIT, 0x23, 0x05 }, + { GC2235_8BIT, 0x24, 0x10 }, + { GC2235_8BIT, 0x25, 0x10 }, + { GC2235_8BIT, 0x26, 0x02 }, + { GC2235_8BIT, 0x21, 0x10 }, + { GC2235_8BIT, 0x29, 0x01 }, + { GC2235_8BIT, 0x2a, 0x02 }, + { GC2235_8BIT, 0x2b, 0x02 }, + { GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */ + { GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */ + { GC2235_TOK_TERM, 0, 0 } +}; +#endif + +static struct gc2235_reg const gc2235_1600_900_30fps[] = { + { GC2235_8BIT, 0x8b, 0xa0 }, + { GC2235_8BIT, 0x8c, 0x02 }, + + { GC2235_8BIT, 0x0d, 0x03 }, /* win height 932 */ + { GC2235_8BIT, 0x0e, 0xa4 }, + { GC2235_8BIT, 0x0f, 0x06 }, /* win width: 1632 */ + { GC2235_8BIT, 0x10, 0x50 }, + + { GC2235_8BIT, 0x90, 0x01 }, + { GC2235_8BIT, 0x92, 0x02 }, + { GC2235_8BIT, 0x94, 0x06 }, + { GC2235_8BIT, 0x95, 0x03 }, /* crop win height 900 */ + { GC2235_8BIT, 0x96, 0x84 }, + { GC2235_8BIT, 0x97, 0x06 }, /* crop win width 1600 */ + { GC2235_8BIT, 0x98, 0x40 }, + /* mimi init */ + { GC2235_8BIT, 0xfe, 0x03 }, /* switch to P3 */ + { GC2235_8BIT, 0x01, 0x07 }, + { GC2235_8BIT, 0x02, 0x11 }, + { GC2235_8BIT, 0x03, 0x11 }, + { GC2235_8BIT, 0x06, 0x80 }, + { GC2235_8BIT, 0x11, 0x2b }, + /* set mipi buffer */ + { GC2235_8BIT, 0x12, 0xd0 }, /* val_low = (width * 10 / 8) & 0xFF */ + { GC2235_8BIT, 0x13, 0x07 }, /* val_high = (width * 10 / 8) >> 8 */ + + { GC2235_8BIT, 0x15, 0x12 }, /* DPHY mode*/ + { GC2235_8BIT, 0x04, 0x10 }, + { GC2235_8BIT, 0x05, 0x00 }, + { GC2235_8BIT, 0x17, 0x01 }, + { GC2235_8BIT, 0x22, 0x01 }, + { GC2235_8BIT, 0x23, 0x05 }, + { GC2235_8BIT, 0x24, 0x10 }, + { GC2235_8BIT, 0x25, 0x10 }, + { GC2235_8BIT, 0x26, 0x02 }, + { GC2235_8BIT, 0x21, 0x10 }, + { GC2235_8BIT, 0x29, 0x01 }, + { GC2235_8BIT, 0x2a, 0x02 }, + { GC2235_8BIT, 0x2b, 0x02 }, + { GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */ + { GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */ + { GC2235_TOK_TERM, 0, 0 } +}; + +static struct gc2235_reg const gc2235_1616_1082_30fps[] = { + { GC2235_8BIT, 0x8b, 0xa0 }, + { GC2235_8BIT, 0x8c, 0x02 }, + + { GC2235_8BIT, 0x0d, 0x04 }, /* win height 1232 */ + { GC2235_8BIT, 0x0e, 0xd0 }, + { GC2235_8BIT, 0x0f, 0x06 }, /* win width: 1616 */ + { GC2235_8BIT, 0x10, 0x50 }, + + { GC2235_8BIT, 0x90, 0x01 }, + { GC2235_8BIT, 0x92, 0x4a }, + { GC2235_8BIT, 0x94, 0x00 }, + { GC2235_8BIT, 0x95, 0x04 }, /* crop win height 1082 */ + { GC2235_8BIT, 0x96, 0x3a }, + { GC2235_8BIT, 0x97, 0x06 }, /* crop win width 1616 */ + { GC2235_8BIT, 0x98, 0x50 }, + /* mimp init */ + { GC2235_8BIT, 0xfe, 0x03 }, /* switch to P3 */ + { GC2235_8BIT, 0x01, 0x07 }, + { GC2235_8BIT, 0x02, 0x11 }, + { GC2235_8BIT, 0x03, 0x11 }, + { GC2235_8BIT, 0x06, 0x80 }, + { GC2235_8BIT, 0x11, 0x2b }, + /* set mipi buffer */ + { GC2235_8BIT, 0x12, 0xe4 }, /* val_low = (width * 10 / 8) & 0xFF */ + { GC2235_8BIT, 0x13, 0x07 }, /* val_high = (width * 10 / 8) >> 8 */ + + { GC2235_8BIT, 0x15, 0x12 }, /* DPHY mode*/ + { GC2235_8BIT, 0x04, 0x10 }, + { GC2235_8BIT, 0x05, 0x00 }, + { GC2235_8BIT, 0x17, 0x01 }, + { GC2235_8BIT, 0x22, 0x01 }, + { GC2235_8BIT, 0x23, 0x05 }, + { GC2235_8BIT, 0x24, 0x10 }, + { GC2235_8BIT, 0x25, 0x10 }, + { GC2235_8BIT, 0x26, 0x02 }, + { GC2235_8BIT, 0x21, 0x10 }, + { GC2235_8BIT, 0x29, 0x01 }, + { GC2235_8BIT, 0x2a, 0x02 }, + { GC2235_8BIT, 0x2b, 0x02 }, + { GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */ + { GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */ + { GC2235_TOK_TERM, 0, 0 } +}; + +static struct gc2235_reg const gc2235_1616_1216_30fps[] = { + { GC2235_8BIT, 0x8b, 0xa0 }, + { GC2235_8BIT, 0x8c, 0x02 }, + + { GC2235_8BIT, 0x0d, 0x04 }, /* win height 1232 */ + { GC2235_8BIT, 0x0e, 0xd0 }, + { GC2235_8BIT, 0x0f, 0x06 }, /* win width: 1616 */ + { GC2235_8BIT, 0x10, 0x50 }, + + { GC2235_8BIT, 0x90, 0x01 }, + { GC2235_8BIT, 0x92, 0x02 }, + { GC2235_8BIT, 0x94, 0x00 }, + { GC2235_8BIT, 0x95, 0x04 }, /* crop win height 1216 */ + { GC2235_8BIT, 0x96, 0xc0 }, + { GC2235_8BIT, 0x97, 0x06 }, /* crop win width 1616 */ + { GC2235_8BIT, 0x98, 0x50 }, + /* mimi init */ + { GC2235_8BIT, 0xfe, 0x03 }, /* switch to P3 */ + { GC2235_8BIT, 0x01, 0x07 }, + { GC2235_8BIT, 0x02, 0x11 }, + { GC2235_8BIT, 0x03, 0x11 }, + { GC2235_8BIT, 0x06, 0x80 }, + { GC2235_8BIT, 0x11, 0x2b }, + /* set mipi buffer */ + { GC2235_8BIT, 0x12, 0xe4 }, /* val_low = (width * 10 / 8) & 0xFF */ + { GC2235_8BIT, 0x13, 0x07 }, /* val_high = (width * 10 / 8) >> 8 */ + { GC2235_8BIT, 0x15, 0x12 }, /* DPHY mode*/ + { GC2235_8BIT, 0x04, 0x10 }, + { GC2235_8BIT, 0x05, 0x00 }, + { GC2235_8BIT, 0x17, 0x01 }, + { GC2235_8BIT, 0x22, 0x01 }, + { GC2235_8BIT, 0x23, 0x05 }, + { GC2235_8BIT, 0x24, 0x10 }, + { GC2235_8BIT, 0x25, 0x10 }, + { GC2235_8BIT, 0x26, 0x02 }, + { GC2235_8BIT, 0x21, 0x10 }, + { GC2235_8BIT, 0x29, 0x01 }, + { GC2235_8BIT, 0x2a, 0x02 }, + { GC2235_8BIT, 0x2b, 0x02 }, + { GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */ + { GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */ + { GC2235_TOK_TERM, 0, 0 } +}; + +static struct gc2235_resolution gc2235_res_preview[] = { + { + .desc = "gc2235_1600_900_30fps", + .width = 1600, + .height = 900, + .pix_clk_freq = 30, + .fps = 30, + .used = 0, + .pixels_per_line = 2132, + .lines_per_frame = 1068, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = gc2235_1600_900_30fps, + }, + + { + .desc = "gc2235_1600_1066_30fps", + .width = 1616, + .height = 1082, + .pix_clk_freq = 30, + .fps = 30, + .used = 0, + .pixels_per_line = 2132, + .lines_per_frame = 1368, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = gc2235_1616_1082_30fps, + }, + { + .desc = "gc2235_1600_1200_30fps", + .width = 1616, + .height = 1216, + .pix_clk_freq = 30, + .fps = 30, + .used = 0, + .pixels_per_line = 2132, + .lines_per_frame = 1368, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = gc2235_1616_1216_30fps, + }, + +}; + +#define N_RES_PREVIEW (ARRAY_SIZE(gc2235_res_preview)) + +/* + * Disable non-preview configurations until the configuration selection is + * improved. + */ +#if ENABLE_NON_PREVIEW +static struct gc2235_resolution gc2235_res_still[] = { + { + .desc = "gc2235_1600_900_30fps", + .width = 1600, + .height = 900, + .pix_clk_freq = 30, + .fps = 30, + .used = 0, + .pixels_per_line = 2132, + .lines_per_frame = 1068, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = gc2235_1600_900_30fps, + }, + { + .desc = "gc2235_1600_1066_30fps", + .width = 1616, + .height = 1082, + .pix_clk_freq = 30, + .fps = 30, + .used = 0, + .pixels_per_line = 2132, + .lines_per_frame = 1368, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = gc2235_1616_1082_30fps, + }, + { + .desc = "gc2235_1600_1200_30fps", + .width = 1616, + .height = 1216, + .pix_clk_freq = 30, + .fps = 30, + .used = 0, + .pixels_per_line = 2132, + .lines_per_frame = 1368, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = gc2235_1616_1216_30fps, + }, + +}; + +#define N_RES_STILL (ARRAY_SIZE(gc2235_res_still)) + +static struct gc2235_resolution gc2235_res_video[] = { + { + .desc = "gc2235_1296_736_30fps", + .width = 1296, + .height = 736, + .pix_clk_freq = 30, + .fps = 30, + .used = 0, + .pixels_per_line = 1828, + .lines_per_frame = 888, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = gc2235_1296_736_30fps, + }, + { + .desc = "gc2235_960_640_30fps", + .width = 960, + .height = 640, + .pix_clk_freq = 30, + .fps = 30, + .used = 0, + .pixels_per_line = 1492, + .lines_per_frame = 792, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = gc2235_960_640_30fps, + }, + +}; + +#define N_RES_VIDEO (ARRAY_SIZE(gc2235_res_video)) +#endif + +static struct gc2235_resolution *gc2235_res = gc2235_res_preview; +static unsigned long N_RES = N_RES_PREVIEW; +#endif diff --git a/drivers/staging/media/atomisp/i2c/mt9m114.h b/drivers/staging/media/atomisp/i2c/mt9m114.h new file mode 100644 index 000000000..bcce18b65 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/mt9m114.h @@ -0,0 +1,1794 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Support for mt9m114 Camera Sensor. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __A1040_H__ +#define __A1040_H__ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/i2c.h> +#include <linux/delay.h> +#include <linux/videodev2.h> +#include <linux/spinlock.h> +#include <media/v4l2-subdev.h> +#include <media/v4l2-device.h> +#include <media/v4l2-ctrls.h> +#include <linux/v4l2-mediabus.h> +#include <media/media-entity.h> +#include "../include/linux/atomisp_platform.h" +#include "../include/linux/atomisp.h" + +#define V4L2_IDENT_MT9M114 8245 + +#define MT9P111_REV3 +#define FULLINISUPPORT + +/* #defines for register writes and register array processing */ +#define MISENSOR_8BIT 1 +#define MISENSOR_16BIT 2 +#define MISENSOR_32BIT 4 + +#define MISENSOR_FWBURST0 0x80 +#define MISENSOR_FWBURST1 0x81 +#define MISENSOR_FWBURST4 0x84 +#define MISENSOR_FWBURST 0x88 + +#define MISENSOR_TOK_TERM 0xf000 /* terminating token for reg list */ +#define MISENSOR_TOK_DELAY 0xfe00 /* delay token for reg list */ +#define MISENSOR_TOK_FWLOAD 0xfd00 /* token indicating load FW */ +#define MISENSOR_TOK_POLL 0xfc00 /* token indicating poll instruction */ +#define MISENSOR_TOK_RMW 0x0010 /* RMW operation */ +#define MISENSOR_TOK_MASK 0xfff0 +#define MISENSOR_AWB_STEADY BIT(0) /* awb steady */ +#define MISENSOR_AE_READY BIT(3) /* ae status ready */ + +/* mask to set sensor read_mode via misensor_rmw_reg */ +#define MISENSOR_R_MODE_MASK 0x0330 +/* mask to set sensor vert_flip and horz_mirror */ +#define MISENSOR_VFLIP_MASK 0x0002 +#define MISENSOR_HFLIP_MASK 0x0001 +#define MISENSOR_FLIP_EN 1 +#define MISENSOR_FLIP_DIS 0 + +/* bits set to set sensor read_mode via misensor_rmw_reg */ +#define MISENSOR_SKIPPING_SET 0x0011 +#define MISENSOR_SUMMING_SET 0x0033 +#define MISENSOR_NORMAL_SET 0x0000 + +/* sensor register that control sensor read-mode and mirror */ +#define MISENSOR_READ_MODE 0xC834 +/* sensor ae-track status register */ +#define MISENSOR_AE_TRACK_STATUS 0xA800 +/* sensor awb status register */ +#define MISENSOR_AWB_STATUS 0xAC00 +/* sensor coarse integration time register */ +#define MISENSOR_COARSE_INTEGRATION_TIME 0xC83C + +/* registers */ +#define REG_SW_RESET 0x301A +#define REG_SW_STREAM 0xDC00 +#define REG_SCCB_CTRL 0x3100 +#define REG_SC_CMMN_CHIP_ID 0x0000 +#define REG_V_START 0xc800 /* 16bits */ +#define REG_H_START 0xc802 /* 16bits */ +#define REG_V_END 0xc804 /* 16bits */ +#define REG_H_END 0xc806 /* 16bits */ +#define REG_PIXEL_CLK 0xc808 /* 32bits */ +#define REG_TIMING_VTS 0xc812 /* 16bits */ +#define REG_TIMING_HTS 0xc814 /* 16bits */ +#define REG_WIDTH 0xC868 /* 16bits */ +#define REG_HEIGHT 0xC86A /* 16bits */ +#define REG_EXPO_COARSE 0x3012 /* 16bits */ +#define REG_EXPO_FINE 0x3014 /* 16bits */ +#define REG_GAIN 0x305E +#define REG_ANALOGGAIN 0x305F +#define REG_ADDR_ACESSS 0x098E /* logical_address_access */ +#define REG_COMM_Register 0x0080 /* command_register */ + +#define SENSOR_DETECTED 1 +#define SENSOR_NOT_DETECTED 0 + +#define I2C_RETRY_COUNT 5 +#define MSG_LEN_OFFSET 2 + +#ifndef MIPI_CONTROL +#define MIPI_CONTROL 0x3400 /* MIPI_Control */ +#endif + +/* GPIO pin on Moorestown */ +#define GPIO_SCLK_25 44 +#define GPIO_STB_PIN 47 + +#define GPIO_STDBY_PIN 49 /* ab:new */ +#define GPIO_RESET_PIN 50 + +/* System control register for Aptina A-1040SOC*/ +#define MT9M114_PID 0x0 + +/* MT9P111_DEVICE_ID */ +#define MT9M114_MOD_ID 0x2481 + +#define MT9M114_FINE_INTG_TIME_MIN 0 +#define MT9M114_FINE_INTG_TIME_MAX_MARGIN 0 +#define MT9M114_COARSE_INTG_TIME_MIN 1 +#define MT9M114_COARSE_INTG_TIME_MAX_MARGIN 6 + +/* ulBPat; */ + +#define MT9M114_BPAT_RGRGGBGB BIT(0) +#define MT9M114_BPAT_GRGRBGBG BIT(1) +#define MT9M114_BPAT_GBGBRGRG BIT(2) +#define MT9M114_BPAT_BGBGGRGR BIT(3) + +#define MT9M114_FOCAL_LENGTH_NUM 208 /*2.08mm*/ +#define MT9M114_FOCAL_LENGTH_DEM 100 +#define MT9M114_F_NUMBER_DEFAULT_NUM 24 +#define MT9M114_F_NUMBER_DEM 10 +#define MT9M114_WAIT_STAT_TIMEOUT 100 +#define MT9M114_FLICKER_MODE_50HZ 1 +#define MT9M114_FLICKER_MODE_60HZ 2 +/* + * focal length bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define MT9M114_FOCAL_LENGTH_DEFAULT 0xD00064 + +/* + * current f-number bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define MT9M114_F_NUMBER_DEFAULT 0x18000a + +/* + * f-number range bits definition: + * bits 31-24: max f-number numerator + * bits 23-16: max f-number denominator + * bits 15-8: min f-number numerator + * bits 7-0: min f-number denominator + */ +#define MT9M114_F_NUMBER_RANGE 0x180a180a + +/* Supported resolutions */ +enum { + MT9M114_RES_736P, + MT9M114_RES_864P, + MT9M114_RES_960P, +}; + +#define MT9M114_RES_960P_SIZE_H 1296 +#define MT9M114_RES_960P_SIZE_V 976 +#define MT9M114_RES_720P_SIZE_H 1280 +#define MT9M114_RES_720P_SIZE_V 720 +#define MT9M114_RES_576P_SIZE_H 1024 +#define MT9M114_RES_576P_SIZE_V 576 +#define MT9M114_RES_480P_SIZE_H 768 +#define MT9M114_RES_480P_SIZE_V 480 +#define MT9M114_RES_VGA_SIZE_H 640 +#define MT9M114_RES_VGA_SIZE_V 480 +#define MT9M114_RES_QVGA_SIZE_H 320 +#define MT9M114_RES_QVGA_SIZE_V 240 +#define MT9M114_RES_QCIF_SIZE_H 176 +#define MT9M114_RES_QCIF_SIZE_V 144 + +#define MT9M114_RES_720_480p_768_SIZE_H 736 +#define MT9M114_RES_720_480p_768_SIZE_V 496 +#define MT9M114_RES_736P_SIZE_H 1296 +#define MT9M114_RES_736P_SIZE_V 736 +#define MT9M114_RES_864P_SIZE_H 1296 +#define MT9M114_RES_864P_SIZE_V 864 +#define MT9M114_RES_976P_SIZE_H 1296 +#define MT9M114_RES_976P_SIZE_V 976 + +#define MT9M114_BIN_FACTOR_MAX 3 + +#define MT9M114_DEFAULT_FIRST_EXP 0x10 +#define MT9M114_MAX_FIRST_EXP 0x302 + +/* completion status polling requirements, usage based on Aptina .INI Rev2 */ +enum poll_reg { + NO_POLLING, + PRE_POLLING, + POST_POLLING, +}; + +/* + * struct misensor_reg - MI sensor register format + * @length: length of the register + * @reg: 16-bit offset to register + * @val: 8/16/32-bit register value + * Define a structure for sensor register initialization values + */ +struct misensor_reg { + u32 length; + u32 reg; + u32 val; /* value or for read/mod/write, AND mask */ + u32 val2; /* optional; for rmw, OR mask */ +}; + +/* + * struct misensor_fwreg - Firmware burst command + * @type: FW burst or 8/16 bit register + * @addr: 16-bit offset to register or other values depending on type + * @valx: data value for burst (or other commands) + * + * Define a structure for sensor register initialization values + */ +struct misensor_fwreg { + u32 type; /* type of value, register or FW burst string */ + u32 addr; /* target address */ + u32 val0; + u32 val1; + u32 val2; + u32 val3; + u32 val4; + u32 val5; + u32 val6; + u32 val7; +}; + +struct regval_list { + u16 reg_num; + u8 value; +}; + +struct mt9m114_device { + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_mbus_framefmt format; + + struct camera_sensor_platform_data *platform_data; + struct mutex input_lock; /* serialize sensor's ioctl */ + struct v4l2_ctrl_handler ctrl_handler; + int real_model_id; + int nctx; + int power; + + unsigned int bus_width; + unsigned int mode; + unsigned int field_inv; + unsigned int field_sel; + unsigned int ycseq; + unsigned int conv422; + unsigned int bpat; + unsigned int hpol; + unsigned int vpol; + unsigned int edge; + unsigned int bls; + unsigned int gamma; + unsigned int cconv; + unsigned int res; + unsigned int dwn_sz; + unsigned int blc; + unsigned int agc; + unsigned int awb; + unsigned int aec; + /* extension SENSOR version 2 */ + unsigned int cie_profile; + + /* extension SENSOR version 3 */ + unsigned int flicker_freq; + + /* extension SENSOR version 4 */ + unsigned int smia_mode; + unsigned int mipi_mode; + + /* Add name here to load shared library */ + unsigned int type; + + /*Number of MIPI lanes*/ + unsigned int mipi_lanes; + /*WA for low light AE*/ + unsigned int first_exp; + unsigned int first_gain; + unsigned int first_diggain; + char name[32]; + + u8 lightfreq; + u8 streamon; +}; + +struct mt9m114_format_struct { + u8 *desc; + u32 pixelformat; + struct regval_list *regs; +}; + +struct mt9m114_res_struct { + u8 *desc; + int res; + int width; + int height; + int fps; + int skip_frames; + bool used; + struct regval_list *regs; + u16 pixels_per_line; + u16 lines_per_frame; + u8 bin_factor_x; + u8 bin_factor_y; + u8 bin_mode; +}; + +/* 2 bytes used for address: 256 bytes total */ +#define MT9M114_MAX_WRITE_BUF_SIZE 254 +struct mt9m114_write_buffer { + u16 addr; + u8 data[MT9M114_MAX_WRITE_BUF_SIZE]; +}; + +struct mt9m114_write_ctrl { + int index; + struct mt9m114_write_buffer buffer; +}; + +/* + * Modes supported by the mt9m114 driver. + * Please, keep them in ascending order. + */ +static struct mt9m114_res_struct mt9m114_res[] = { + { + .desc = "720P", + .res = MT9M114_RES_736P, + .width = 1296, + .height = 736, + .fps = 30, + .used = false, + .regs = NULL, + .skip_frames = 1, + + .pixels_per_line = 0x0640, + .lines_per_frame = 0x0307, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + }, + { + .desc = "848P", + .res = MT9M114_RES_864P, + .width = 1296, + .height = 864, + .fps = 30, + .used = false, + .regs = NULL, + .skip_frames = 1, + + .pixels_per_line = 0x0640, + .lines_per_frame = 0x03E8, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + }, + { + .desc = "960P", + .res = MT9M114_RES_960P, + .width = 1296, + .height = 976, + .fps = 30, + .used = false, + .regs = NULL, + .skip_frames = 1, + + .pixels_per_line = 0x0644, /* consistent with regs arrays */ + .lines_per_frame = 0x03E5, /* consistent with regs arrays */ + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + }, +}; + +#define N_RES (ARRAY_SIZE(mt9m114_res)) + +#if 0 /* Currently unused */ +static struct misensor_reg const mt9m114_exitstandby[] = { + {MISENSOR_16BIT, 0x098E, 0xDC00}, + /* exit-standby */ + {MISENSOR_8BIT, 0xDC00, 0x54}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} +}; +#endif + +static struct misensor_reg const mt9m114_exp_win[5][5] = { + { + {MISENSOR_8BIT, 0xA407, 0x64}, + {MISENSOR_8BIT, 0xA408, 0x64}, + {MISENSOR_8BIT, 0xA409, 0x64}, + {MISENSOR_8BIT, 0xA40A, 0x64}, + {MISENSOR_8BIT, 0xA40B, 0x64}, + }, + { + {MISENSOR_8BIT, 0xA40C, 0x64}, + {MISENSOR_8BIT, 0xA40D, 0x64}, + {MISENSOR_8BIT, 0xA40E, 0x64}, + {MISENSOR_8BIT, 0xA40F, 0x64}, + {MISENSOR_8BIT, 0xA410, 0x64}, + }, + { + {MISENSOR_8BIT, 0xA411, 0x64}, + {MISENSOR_8BIT, 0xA412, 0x64}, + {MISENSOR_8BIT, 0xA413, 0x64}, + {MISENSOR_8BIT, 0xA414, 0x64}, + {MISENSOR_8BIT, 0xA415, 0x64}, + }, + { + {MISENSOR_8BIT, 0xA416, 0x64}, + {MISENSOR_8BIT, 0xA417, 0x64}, + {MISENSOR_8BIT, 0xA418, 0x64}, + {MISENSOR_8BIT, 0xA419, 0x64}, + {MISENSOR_8BIT, 0xA41A, 0x64}, + }, + { + {MISENSOR_8BIT, 0xA41B, 0x64}, + {MISENSOR_8BIT, 0xA41C, 0x64}, + {MISENSOR_8BIT, 0xA41D, 0x64}, + {MISENSOR_8BIT, 0xA41E, 0x64}, + {MISENSOR_8BIT, 0xA41F, 0x64}, + }, +}; + +static struct misensor_reg const mt9m114_exp_average[] = { + {MISENSOR_8BIT, 0xA407, 0x00}, + {MISENSOR_8BIT, 0xA408, 0x00}, + {MISENSOR_8BIT, 0xA409, 0x00}, + {MISENSOR_8BIT, 0xA40A, 0x00}, + {MISENSOR_8BIT, 0xA40B, 0x00}, + {MISENSOR_8BIT, 0xA40C, 0x00}, + {MISENSOR_8BIT, 0xA40D, 0x00}, + {MISENSOR_8BIT, 0xA40E, 0x00}, + {MISENSOR_8BIT, 0xA40F, 0x00}, + {MISENSOR_8BIT, 0xA410, 0x00}, + {MISENSOR_8BIT, 0xA411, 0x00}, + {MISENSOR_8BIT, 0xA412, 0x00}, + {MISENSOR_8BIT, 0xA413, 0x00}, + {MISENSOR_8BIT, 0xA414, 0x00}, + {MISENSOR_8BIT, 0xA415, 0x00}, + {MISENSOR_8BIT, 0xA416, 0x00}, + {MISENSOR_8BIT, 0xA417, 0x00}, + {MISENSOR_8BIT, 0xA418, 0x00}, + {MISENSOR_8BIT, 0xA419, 0x00}, + {MISENSOR_8BIT, 0xA41A, 0x00}, + {MISENSOR_8BIT, 0xA41B, 0x00}, + {MISENSOR_8BIT, 0xA41C, 0x00}, + {MISENSOR_8BIT, 0xA41D, 0x00}, + {MISENSOR_8BIT, 0xA41E, 0x00}, + {MISENSOR_8BIT, 0xA41F, 0x00}, + {MISENSOR_TOK_TERM, 0, 0} +}; + +static struct misensor_reg const mt9m114_exp_center[] = { + {MISENSOR_8BIT, 0xA407, 0x19}, + {MISENSOR_8BIT, 0xA408, 0x19}, + {MISENSOR_8BIT, 0xA409, 0x19}, + {MISENSOR_8BIT, 0xA40A, 0x19}, + {MISENSOR_8BIT, 0xA40B, 0x19}, + {MISENSOR_8BIT, 0xA40C, 0x19}, + {MISENSOR_8BIT, 0xA40D, 0x4B}, + {MISENSOR_8BIT, 0xA40E, 0x4B}, + {MISENSOR_8BIT, 0xA40F, 0x4B}, + {MISENSOR_8BIT, 0xA410, 0x19}, + {MISENSOR_8BIT, 0xA411, 0x19}, + {MISENSOR_8BIT, 0xA412, 0x4B}, + {MISENSOR_8BIT, 0xA413, 0x64}, + {MISENSOR_8BIT, 0xA414, 0x4B}, + {MISENSOR_8BIT, 0xA415, 0x19}, + {MISENSOR_8BIT, 0xA416, 0x19}, + {MISENSOR_8BIT, 0xA417, 0x4B}, + {MISENSOR_8BIT, 0xA418, 0x4B}, + {MISENSOR_8BIT, 0xA419, 0x4B}, + {MISENSOR_8BIT, 0xA41A, 0x19}, + {MISENSOR_8BIT, 0xA41B, 0x19}, + {MISENSOR_8BIT, 0xA41C, 0x19}, + {MISENSOR_8BIT, 0xA41D, 0x19}, + {MISENSOR_8BIT, 0xA41E, 0x19}, + {MISENSOR_8BIT, 0xA41F, 0x19}, + {MISENSOR_TOK_TERM, 0, 0} +}; + +#if 0 /* Currently unused */ +static struct misensor_reg const mt9m114_suspend[] = { + {MISENSOR_16BIT, 0x098E, 0xDC00}, + {MISENSOR_8BIT, 0xDC00, 0x40}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} +}; + +static struct misensor_reg const mt9m114_streaming[] = { + {MISENSOR_16BIT, 0x098E, 0xDC00}, + {MISENSOR_8BIT, 0xDC00, 0x34}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} +}; +#endif + +static struct misensor_reg const mt9m114_standby_reg[] = { + {MISENSOR_16BIT, 0x098E, 0xDC00}, + {MISENSOR_8BIT, 0xDC00, 0x50}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} +}; + +#if 0 /* Currently unused */ +static struct misensor_reg const mt9m114_wakeup_reg[] = { + {MISENSOR_16BIT, 0x098E, 0xDC00}, + {MISENSOR_8BIT, 0xDC00, 0x54}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} +}; +#endif + +static struct misensor_reg const mt9m114_chgstat_reg[] = { + {MISENSOR_16BIT, 0x098E, 0xDC00}, + {MISENSOR_8BIT, 0xDC00, 0x28}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} +}; + +/* [1296x976_30fps] - Intel */ +#if 0 +static struct misensor_reg const mt9m114_960P_init[] = { + {MISENSOR_16BIT, 0x098E, 0x1000}, + {MISENSOR_8BIT, 0xC97E, 0x01}, /* cam_sysctl_pll_enable = 1 */ + {MISENSOR_16BIT, 0xC980, 0x0128}, /* cam_sysctl_pll_divider_m_n = 276 */ + {MISENSOR_16BIT, 0xC982, 0x0700}, /* cam_sysctl_pll_divider_p = 1792 */ + {MISENSOR_16BIT, 0xC800, 0x0000}, /* cam_sensor_cfg_y_addr_start = 0 */ + {MISENSOR_16BIT, 0xC802, 0x0000}, /* cam_sensor_cfg_x_addr_start = 0 */ + {MISENSOR_16BIT, 0xC804, 0x03CF}, /* cam_sensor_cfg_y_addr_end = 971 */ + {MISENSOR_16BIT, 0xC806, 0x050F}, /* cam_sensor_cfg_x_addr_end = 1291 */ + {MISENSOR_16BIT, 0xC808, 0x02DC}, /* cam_sensor_cfg_pixclk = 48000000 */ + {MISENSOR_16BIT, 0xC80A, 0x6C00}, + {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */ + /* cam_sensor_cfg_fine_integ_time_min = 219 */ + {MISENSOR_16BIT, 0xC80E, 0x00DB}, + /* cam_sensor_cfg_fine_integ_time_max = 1459 */ + {MISENSOR_16BIT, 0xC810, 0x05B3}, + /* cam_sensor_cfg_frame_length_lines = 1006 */ + {MISENSOR_16BIT, 0xC812, 0x03F6}, + /* cam_sensor_cfg_line_length_pck = 1590 */ + {MISENSOR_16BIT, 0xC814, 0x063E}, + /* cam_sensor_cfg_fine_correction = 96 */ + {MISENSOR_16BIT, 0xC816, 0x0060}, + /* cam_sensor_cfg_cpipe_last_row = 963 */ + {MISENSOR_16BIT, 0xC818, 0x03C3}, + {MISENSOR_16BIT, 0xC826, 0x0020}, /* cam_sensor_cfg_reg_0_data = 32 */ + {MISENSOR_16BIT, 0xC834, 0x0000}, /* cam_sensor_control_read_mode = 0 */ + {MISENSOR_16BIT, 0xC854, 0x0000}, /* cam_crop_window_xoffset = 0 */ + {MISENSOR_16BIT, 0xC856, 0x0000}, /* cam_crop_window_yoffset = 0 */ + {MISENSOR_16BIT, 0xC858, 0x0508}, /* cam_crop_window_width = 1280 */ + {MISENSOR_16BIT, 0xC85A, 0x03C8}, /* cam_crop_window_height = 960 */ + {MISENSOR_8BIT, 0xC85C, 0x03}, /* cam_crop_cropmode = 3 */ + {MISENSOR_16BIT, 0xC868, 0x0508}, /* cam_output_width = 1280 */ + {MISENSOR_16BIT, 0xC86A, 0x03C8}, /* cam_output_height = 960 */ + {MISENSOR_TOK_TERM, 0, 0}, +}; +#endif + +/* [1296x976_30fps_768Mbps] */ +static struct misensor_reg const mt9m114_976P_init[] = { + {MISENSOR_16BIT, 0x98E, 0x1000}, + {MISENSOR_8BIT, 0xC97E, 0x01}, /* cam_sysctl_pll_enable = 1 */ + {MISENSOR_16BIT, 0xC980, 0x0128}, /* cam_sysctl_pll_divider_m_n = 276 */ + {MISENSOR_16BIT, 0xC982, 0x0700}, /* cam_sysctl_pll_divider_p = 1792 */ + {MISENSOR_16BIT, 0xC800, 0x0000}, /* cam_sensor_cfg_y_addr_start = 0 */ + {MISENSOR_16BIT, 0xC802, 0x0000}, /* cam_sensor_cfg_x_addr_start = 0 */ + {MISENSOR_16BIT, 0xC804, 0x03CF}, /* cam_sensor_cfg_y_addr_end = 975 */ + {MISENSOR_16BIT, 0xC806, 0x050F}, /* cam_sensor_cfg_x_addr_end = 1295 */ + {MISENSOR_32BIT, 0xC808, 0x2DC6C00},/* cam_sensor_cfg_pixclk = 480000*/ + {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */ + /* cam_sensor_cfg_fine_integ_time_min = 219 */ + {MISENSOR_16BIT, 0xC80E, 0x00DB}, + /* 0x062E //cam_sensor_cfg_fine_integ_time_max = 1459 */ + {MISENSOR_16BIT, 0xC810, 0x05B3}, + /* 0x074C //cam_sensor_cfg_frame_length_lines = 1006 */ + {MISENSOR_16BIT, 0xC812, 0x03E5}, + /* 0x06B1 /cam_sensor_cfg_line_length_pck = 1590 */ + {MISENSOR_16BIT, 0xC814, 0x0644}, + /* cam_sensor_cfg_fine_correction = 96 */ + {MISENSOR_16BIT, 0xC816, 0x0060}, + /* cam_sensor_cfg_cpipe_last_row = 963 */ + {MISENSOR_16BIT, 0xC818, 0x03C3}, + {MISENSOR_16BIT, 0xC826, 0x0020}, /* cam_sensor_cfg_reg_0_data = 32 */ + {MISENSOR_16BIT, 0xC834, 0x0000}, /* cam_sensor_control_read_mode = 0 */ + {MISENSOR_16BIT, 0xC854, 0x0000}, /* cam_crop_window_xoffset = 0 */ + {MISENSOR_16BIT, 0xC856, 0x0000}, /* cam_crop_window_yoffset = 0 */ + {MISENSOR_16BIT, 0xC858, 0x0508}, /* cam_crop_window_width = 1288 */ + {MISENSOR_16BIT, 0xC85A, 0x03C8}, /* cam_crop_window_height = 968 */ + {MISENSOR_8BIT, 0xC85C, 0x03}, /* cam_crop_cropmode = 3 */ + {MISENSOR_16BIT, 0xC868, 0x0508}, /* cam_output_width = 1288 */ + {MISENSOR_16BIT, 0xC86A, 0x03C8}, /* cam_output_height = 968 */ + {MISENSOR_8BIT, 0xC878, 0x00}, /* 0x0E //cam_aet_aemode = 0 */ + {MISENSOR_TOK_TERM, 0, 0} +}; + +/* [1296x864_30fps] */ +static struct misensor_reg const mt9m114_864P_init[] = { + {MISENSOR_16BIT, 0x98E, 0x1000}, + {MISENSOR_8BIT, 0xC97E, 0x01}, /* cam_sysctl_pll_enable = 1 */ + {MISENSOR_16BIT, 0xC980, 0x0128}, /* cam_sysctl_pll_divider_m_n = 276 */ + {MISENSOR_16BIT, 0xC982, 0x0700}, /* cam_sysctl_pll_divider_p = 1792 */ + {MISENSOR_16BIT, 0xC800, 0x0038}, /* cam_sensor_cfg_y_addr_start = 56 */ + {MISENSOR_16BIT, 0xC802, 0x0000}, /* cam_sensor_cfg_x_addr_start = 0 */ + {MISENSOR_16BIT, 0xC804, 0x0397}, /* cam_sensor_cfg_y_addr_end = 919 */ + {MISENSOR_16BIT, 0xC806, 0x050F}, /* cam_sensor_cfg_x_addr_end = 1295 */ + /* cam_sensor_cfg_pixclk = 48000000 */ + {MISENSOR_32BIT, 0xC808, 0x2DC6C00}, + {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */ + /* cam_sensor_cfg_fine_integ_time_min = 219 */ + {MISENSOR_16BIT, 0xC80E, 0x00DB}, + /* cam_sensor_cfg_fine_integ_time_max = 1469 */ + {MISENSOR_16BIT, 0xC810, 0x05BD}, + /* cam_sensor_cfg_frame_length_lines = 1000 */ + {MISENSOR_16BIT, 0xC812, 0x03E8}, + /* cam_sensor_cfg_line_length_pck = 1600 */ + {MISENSOR_16BIT, 0xC814, 0x0640}, + /* cam_sensor_cfg_fine_correction = 96 */ + {MISENSOR_16BIT, 0xC816, 0x0060}, + /* cam_sensor_cfg_cpipe_last_row = 859 */ + {MISENSOR_16BIT, 0xC818, 0x035B}, + {MISENSOR_16BIT, 0xC826, 0x0020}, /* cam_sensor_cfg_reg_0_data = 32 */ + {MISENSOR_16BIT, 0xC834, 0x0000}, /* cam_sensor_control_read_mode = 0 */ + {MISENSOR_16BIT, 0xC854, 0x0000}, /* cam_crop_window_xoffset = 0 */ + {MISENSOR_16BIT, 0xC856, 0x0000}, /* cam_crop_window_yoffset = 0 */ + {MISENSOR_16BIT, 0xC858, 0x0508}, /* cam_crop_window_width = 1288 */ + {MISENSOR_16BIT, 0xC85A, 0x0358}, /* cam_crop_window_height = 856 */ + {MISENSOR_8BIT, 0xC85C, 0x03}, /* cam_crop_cropmode = 3 */ + {MISENSOR_16BIT, 0xC868, 0x0508}, /* cam_output_width = 1288 */ + {MISENSOR_16BIT, 0xC86A, 0x0358}, /* cam_output_height = 856 */ + {MISENSOR_8BIT, 0xC878, 0x00}, /* 0x0E //cam_aet_aemode = 0 */ + {MISENSOR_TOK_TERM, 0, 0} +}; + +/* [1296x736_30fps] */ +static struct misensor_reg const mt9m114_736P_init[] = { + {MISENSOR_16BIT, 0x98E, 0x1000}, + {MISENSOR_8BIT, 0xC97E, 0x01}, /* cam_sysctl_pll_enable = 1 */ + {MISENSOR_16BIT, 0xC980, 0x011F}, /* cam_sysctl_pll_divider_m_n = 287 */ + {MISENSOR_16BIT, 0xC982, 0x0700}, /* cam_sysctl_pll_divider_p = 1792 */ + {MISENSOR_16BIT, 0xC800, 0x0078}, /* cam_sensor_cfg_y_addr_start = 120*/ + {MISENSOR_16BIT, 0xC802, 0x0000}, /* cam_sensor_cfg_x_addr_start = 0 */ + {MISENSOR_16BIT, 0xC804, 0x0357}, /* cam_sensor_cfg_y_addr_end = 855 */ + {MISENSOR_16BIT, 0xC806, 0x050F}, /* cam_sensor_cfg_x_addr_end = 1295 */ + {MISENSOR_32BIT, 0xC808, 0x237A07F}, /* cam_sensor_cfg_pixclk=37199999*/ + {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */ + /* cam_sensor_cfg_fine_integ_time_min = 219 */ + {MISENSOR_16BIT, 0xC80E, 0x00DB}, + /* 0x062E //cam_sensor_cfg_fine_integ_time_max = 1469 */ + {MISENSOR_16BIT, 0xC810, 0x05BD}, + /* 0x074C //cam_sensor_cfg_frame_length_lines = 775 */ + {MISENSOR_16BIT, 0xC812, 0x0307}, + /* 0x06B1 /cam_sensor_cfg_line_length_pck = 1600 */ + {MISENSOR_16BIT, 0xC814, 0x0640}, + /* cam_sensor_cfg_fine_correction = 96 */ + {MISENSOR_16BIT, 0xC816, 0x0060}, + /* cam_sensor_cfg_cpipe_last_row = 731 */ + {MISENSOR_16BIT, 0xC818, 0x02DB}, + {MISENSOR_16BIT, 0xC826, 0x0020}, /* cam_sensor_cfg_reg_0_data = 32 */ + {MISENSOR_16BIT, 0xC834, 0x0000}, /* cam_sensor_control_read_mode = 0 */ + {MISENSOR_16BIT, 0xC854, 0x0000}, /* cam_crop_window_xoffset = 0 */ + {MISENSOR_16BIT, 0xC856, 0x0000}, /* cam_crop_window_yoffset = 0 */ + {MISENSOR_16BIT, 0xC858, 0x0508}, /* cam_crop_window_width = 1288 */ + {MISENSOR_16BIT, 0xC85A, 0x02D8}, /* cam_crop_window_height = 728 */ + {MISENSOR_8BIT, 0xC85C, 0x03}, /* cam_crop_cropmode = 3 */ + {MISENSOR_16BIT, 0xC868, 0x0508}, /* cam_output_width = 1288 */ + {MISENSOR_16BIT, 0xC86A, 0x02D8}, /* cam_output_height = 728 */ + {MISENSOR_8BIT, 0xC878, 0x00}, /* 0x0E //cam_aet_aemode = 0 */ + {MISENSOR_TOK_TERM, 0, 0} +}; + +/* [736x496_30fps_768Mbps] */ +#if 0 /* Currently unused */ +static struct misensor_reg const mt9m114_720_480P_init[] = { + {MISENSOR_16BIT, 0x98E, 0x1000}, + {MISENSOR_8BIT, 0xC97E, 0x01}, /* cam_sysctl_pll_enable = 1 */ + {MISENSOR_16BIT, 0xC980, 0x0128}, /* cam_sysctl_pll_divider_m_n = 276 */ + {MISENSOR_16BIT, 0xC982, 0x0700}, /* cam_sysctl_pll_divider_p = 1792 */ + {MISENSOR_16BIT, 0xC800, 0x00F0}, /* cam_sensor_cfg_y_addr_start = 240*/ + {MISENSOR_16BIT, 0xC802, 0x0118}, /* cam_sensor_cfg_x_addr_start = 280*/ + {MISENSOR_16BIT, 0xC804, 0x02DF}, /* cam_sensor_cfg_y_addr_end = 735 */ + {MISENSOR_16BIT, 0xC806, 0x03F7}, /* cam_sensor_cfg_x_addr_end = 1015 */ + /* cam_sensor_cfg_pixclk = 48000000 */ + {MISENSOR_32BIT, 0xC808, 0x2DC6C00}, + {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */ + /* cam_sensor_cfg_fine_integ_time_min = 219 */ + {MISENSOR_16BIT, 0xC80E, 0x00DB}, + /* 0x062E //cam_sensor_cfg_fine_integ_time_max = 1459 */ + {MISENSOR_16BIT, 0xC810, 0x05B3}, + /* 0x074C //cam_sensor_cfg_frame_length_lines = 997 */ + {MISENSOR_16BIT, 0xC812, 0x03E5}, + /* 0x06B1 /cam_sensor_cfg_line_length_pck = 1604 */ + {MISENSOR_16BIT, 0xC814, 0x0644}, + /* cam_sensor_cfg_fine_correction = 96 */ + {MISENSOR_16BIT, 0xC816, 0x0060}, + {MISENSOR_16BIT, 0xC818, 0x03C3}, /* cam_sensor_cfg_cpipe_last_row=963*/ + {MISENSOR_16BIT, 0xC826, 0x0020}, /* cam_sensor_cfg_reg_0_data = 32 */ + {MISENSOR_16BIT, 0xC834, 0x0000}, /* cam_sensor_control_read_mode = 0*/ + {MISENSOR_16BIT, 0xC854, 0x0000}, /* cam_crop_window_xoffset = 0 */ + {MISENSOR_16BIT, 0xC856, 0x0000}, /* cam_crop_window_yoffset = 0 */ + {MISENSOR_16BIT, 0xC858, 0x02D8}, /* cam_crop_window_width = 728 */ + {MISENSOR_16BIT, 0xC85A, 0x01E8}, /* cam_crop_window_height = 488 */ + {MISENSOR_8BIT, 0xC85C, 0x03}, /* cam_crop_cropmode = 3 */ + {MISENSOR_16BIT, 0xC868, 0x02D8}, /* cam_output_width = 728 */ + {MISENSOR_16BIT, 0xC86A, 0x01E8}, /* cam_output_height = 488 */ + {MISENSOR_8BIT, 0xC878, 0x00}, /* 0x0E //cam_aet_aemode = 0 */ + {MISENSOR_TOK_TERM, 0, 0} +}; +#endif + +static struct misensor_reg const mt9m114_common[] = { + /* reset */ + {MISENSOR_16BIT, 0x301A, 0x0234}, + /* LOAD = Step2-PLL_Timing //PLL and Timing */ + {MISENSOR_16BIT, 0x098E, 0x1000}, /* LOGICAL_ADDRESS_ACCESS */ + {MISENSOR_8BIT, 0xC97E, 0x01}, /* cam_sysctl_pll_enable = 1 */ + {MISENSOR_16BIT, 0xC980, 0x0128}, /* cam_sysctl_pll_divider_m_n = 276 */ + {MISENSOR_16BIT, 0xC982, 0x0700}, /* cam_sysctl_pll_divider_p = 1792 */ + {MISENSOR_16BIT, 0xC800, 0x0000}, /* cam_sensor_cfg_y_addr_start = 216*/ + {MISENSOR_16BIT, 0xC802, 0x0000}, /* cam_sensor_cfg_x_addr_start = 168*/ + {MISENSOR_16BIT, 0xC804, 0x03CD}, /* cam_sensor_cfg_y_addr_end = 761 */ + {MISENSOR_16BIT, 0xC806, 0x050D}, /* cam_sensor_cfg_x_addr_end = 1127 */ + {MISENSOR_16BIT, 0xC808, 0x02DC}, /* cam_sensor_cfg_pixclk = 24000000 */ + {MISENSOR_16BIT, 0xC80A, 0x6C00}, + {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */ + /* cam_sensor_cfg_fine_integ_time_min = 219 */ + {MISENSOR_16BIT, 0xC80E, 0x01C3}, + /* cam_sensor_cfg_fine_integ_time_max = 1149 */ + {MISENSOR_16BIT, 0xC810, 0x03F7}, + /* cam_sensor_cfg_frame_length_lines = 625 */ + {MISENSOR_16BIT, 0xC812, 0x0500}, + /* cam_sensor_cfg_line_length_pck = 1280 */ + {MISENSOR_16BIT, 0xC814, 0x04E2}, + /* cam_sensor_cfg_fine_correction = 96 */ + {MISENSOR_16BIT, 0xC816, 0x00E0}, + /* cam_sensor_cfg_cpipe_last_row = 541 */ + {MISENSOR_16BIT, 0xC818, 0x01E3}, + {MISENSOR_16BIT, 0xC826, 0x0020}, /* cam_sensor_cfg_reg_0_data = 32 */ + {MISENSOR_16BIT, 0xC834, 0x0330}, /* cam_sensor_control_read_mode = 0 */ + {MISENSOR_16BIT, 0xC854, 0x0000}, /* cam_crop_window_xoffset = 0 */ + {MISENSOR_16BIT, 0xC856, 0x0000}, /* cam_crop_window_yoffset = 0 */ + {MISENSOR_16BIT, 0xC858, 0x0280}, /* cam_crop_window_width = 952 */ + {MISENSOR_16BIT, 0xC85A, 0x01E0}, /* cam_crop_window_height = 538 */ + {MISENSOR_8BIT, 0xC85C, 0x03}, /* cam_crop_cropmode = 3 */ + {MISENSOR_16BIT, 0xC868, 0x0280}, /* cam_output_width = 952 */ + {MISENSOR_16BIT, 0xC86A, 0x01E0}, /* cam_output_height = 538 */ + /* + * LOAD = Step3-Recommended + * Patch, Errata and Sensor optimization Setting + */ + {MISENSOR_16BIT, 0x316A, 0x8270}, /* DAC_TXLO_ROW */ + {MISENSOR_16BIT, 0x316C, 0x8270}, /* DAC_TXLO */ + {MISENSOR_16BIT, 0x3ED0, 0x2305}, /* DAC_LD_4_5 */ + {MISENSOR_16BIT, 0x3ED2, 0x77CF}, /* DAC_LD_6_7 */ + {MISENSOR_16BIT, 0x316E, 0x8202}, /* DAC_ECL */ + {MISENSOR_16BIT, 0x3180, 0x87FF}, /* DELTA_DK_CONTROL */ + {MISENSOR_16BIT, 0x30D4, 0x6080}, /* COLUMN_CORRECTION */ + {MISENSOR_16BIT, 0xA802, 0x0008}, /* AE_TRACK_MODE */ + {MISENSOR_16BIT, 0x3E14, 0xFF39}, /* SAMP_COL_PUP2 */ + {MISENSOR_16BIT, 0x31E0, 0x0003}, /* PIX_DEF_ID */ + /* LOAD = Step8-Features //Ports, special features, etc. */ + {MISENSOR_16BIT, 0x098E, 0x0000}, /* LOGICAL_ADDRESS_ACCESS */ + {MISENSOR_16BIT, 0x001E, 0x0777}, /* PAD_SLEW */ + {MISENSOR_16BIT, 0x098E, 0x0000}, /* LOGICAL_ADDRESS_ACCESS */ + {MISENSOR_16BIT, 0xC984, 0x8001}, /* CAM_PORT_OUTPUT_CONTROL */ + {MISENSOR_16BIT, 0xC988, 0x0F00}, /* CAM_PORT_MIPI_TIMING_T_HS_ZERO */ + /* CAM_PORT_MIPI_TIMING_T_HS_EXIT_HS_TRAIL */ + {MISENSOR_16BIT, 0xC98A, 0x0B07}, + /* CAM_PORT_MIPI_TIMING_T_CLK_POST_CLK_PRE */ + {MISENSOR_16BIT, 0xC98C, 0x0D01}, + /* CAM_PORT_MIPI_TIMING_T_CLK_TRAIL_CLK_ZERO */ + {MISENSOR_16BIT, 0xC98E, 0x071D}, + {MISENSOR_16BIT, 0xC990, 0x0006}, /* CAM_PORT_MIPI_TIMING_T_LPX */ + {MISENSOR_16BIT, 0xC992, 0x0A0C}, /* CAM_PORT_MIPI_TIMING_INIT_TIMING */ + {MISENSOR_16BIT, 0x3C5A, 0x0009}, /* MIPI_DELAY_TRIM */ + {MISENSOR_16BIT, 0xC86C, 0x0210}, /* CAM_OUTPUT_FORMAT */ + {MISENSOR_16BIT, 0xA804, 0x0000}, /* AE_TRACK_ALGO */ + /* default exposure */ + {MISENSOR_16BIT, 0x3012, 0x0110}, /* COMMAND_REGISTER */ + {MISENSOR_TOK_TERM, 0, 0}, + +}; + +#if 0 /* Currently unused */ +static struct misensor_reg const mt9m114_antiflicker_50hz[] = { + {MISENSOR_16BIT, 0x098E, 0xC88B}, + {MISENSOR_8BIT, 0xC88B, 0x32}, + {MISENSOR_8BIT, 0xDC00, 0x28}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} +}; + +static struct misensor_reg const mt9m114_antiflicker_60hz[] = { + {MISENSOR_16BIT, 0x098E, 0xC88B}, + {MISENSOR_8BIT, 0xC88B, 0x3C}, + {MISENSOR_8BIT, 0xDC00, 0x28}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} +}; + +static struct misensor_reg const mt9m114_iq[] = { + /* [Step3-Recommended] [Sensor optimization] */ + {MISENSOR_16BIT, 0x316A, 0x8270}, + {MISENSOR_16BIT, 0x316C, 0x8270}, + {MISENSOR_16BIT, 0x3ED0, 0x2305}, + {MISENSOR_16BIT, 0x3ED2, 0x77CF}, + {MISENSOR_16BIT, 0x316E, 0x8202}, + {MISENSOR_16BIT, 0x3180, 0x87FF}, + {MISENSOR_16BIT, 0x30D4, 0x6080}, + {MISENSOR_16BIT, 0xA802, 0x0008}, + + /* This register is from vender to avoid low light color noise */ + {MISENSOR_16BIT, 0x31E0, 0x0001}, + + /* LOAD=Errata item 1 */ + {MISENSOR_16BIT, 0x3E14, 0xFF39}, + + /* LOAD=Errata item 2 */ + {MISENSOR_16BIT, 0x301A, 0x8234}, + + /* + * LOAD=Errata item 3 + * LOAD=Patch 0202; + * Feature Recommended; Black level correction fix + */ + {MISENSOR_16BIT, 0x0982, 0x0001}, + {MISENSOR_16BIT, 0x098A, 0x5000}, + {MISENSOR_16BIT, 0xD000, 0x70CF}, + {MISENSOR_16BIT, 0xD002, 0xFFFF}, + {MISENSOR_16BIT, 0xD004, 0xC5D4}, + {MISENSOR_16BIT, 0xD006, 0x903A}, + {MISENSOR_16BIT, 0xD008, 0x2144}, + {MISENSOR_16BIT, 0xD00A, 0x0C00}, + {MISENSOR_16BIT, 0xD00C, 0x2186}, + {MISENSOR_16BIT, 0xD00E, 0x0FF3}, + {MISENSOR_16BIT, 0xD010, 0xB844}, + {MISENSOR_16BIT, 0xD012, 0xB948}, + {MISENSOR_16BIT, 0xD014, 0xE082}, + {MISENSOR_16BIT, 0xD016, 0x20CC}, + {MISENSOR_16BIT, 0xD018, 0x80E2}, + {MISENSOR_16BIT, 0xD01A, 0x21CC}, + {MISENSOR_16BIT, 0xD01C, 0x80A2}, + {MISENSOR_16BIT, 0xD01E, 0x21CC}, + {MISENSOR_16BIT, 0xD020, 0x80E2}, + {MISENSOR_16BIT, 0xD022, 0xF404}, + {MISENSOR_16BIT, 0xD024, 0xD801}, + {MISENSOR_16BIT, 0xD026, 0xF003}, + {MISENSOR_16BIT, 0xD028, 0xD800}, + {MISENSOR_16BIT, 0xD02A, 0x7EE0}, + {MISENSOR_16BIT, 0xD02C, 0xC0F1}, + {MISENSOR_16BIT, 0xD02E, 0x08BA}, + + {MISENSOR_16BIT, 0xD030, 0x0600}, + {MISENSOR_16BIT, 0xD032, 0xC1A1}, + {MISENSOR_16BIT, 0xD034, 0x76CF}, + {MISENSOR_16BIT, 0xD036, 0xFFFF}, + {MISENSOR_16BIT, 0xD038, 0xC130}, + {MISENSOR_16BIT, 0xD03A, 0x6E04}, + {MISENSOR_16BIT, 0xD03C, 0xC040}, + {MISENSOR_16BIT, 0xD03E, 0x71CF}, + {MISENSOR_16BIT, 0xD040, 0xFFFF}, + {MISENSOR_16BIT, 0xD042, 0xC790}, + {MISENSOR_16BIT, 0xD044, 0x8103}, + {MISENSOR_16BIT, 0xD046, 0x77CF}, + {MISENSOR_16BIT, 0xD048, 0xFFFF}, + {MISENSOR_16BIT, 0xD04A, 0xC7C0}, + {MISENSOR_16BIT, 0xD04C, 0xE001}, + {MISENSOR_16BIT, 0xD04E, 0xA103}, + {MISENSOR_16BIT, 0xD050, 0xD800}, + {MISENSOR_16BIT, 0xD052, 0x0C6A}, + {MISENSOR_16BIT, 0xD054, 0x04E0}, + {MISENSOR_16BIT, 0xD056, 0xB89E}, + {MISENSOR_16BIT, 0xD058, 0x7508}, + {MISENSOR_16BIT, 0xD05A, 0x8E1C}, + {MISENSOR_16BIT, 0xD05C, 0x0809}, + {MISENSOR_16BIT, 0xD05E, 0x0191}, + + {MISENSOR_16BIT, 0xD060, 0xD801}, + {MISENSOR_16BIT, 0xD062, 0xAE1D}, + {MISENSOR_16BIT, 0xD064, 0xE580}, + {MISENSOR_16BIT, 0xD066, 0x20CA}, + {MISENSOR_16BIT, 0xD068, 0x0022}, + {MISENSOR_16BIT, 0xD06A, 0x20CF}, + {MISENSOR_16BIT, 0xD06C, 0x0522}, + {MISENSOR_16BIT, 0xD06E, 0x0C5C}, + {MISENSOR_16BIT, 0xD070, 0x04E2}, + {MISENSOR_16BIT, 0xD072, 0x21CA}, + {MISENSOR_16BIT, 0xD074, 0x0062}, + {MISENSOR_16BIT, 0xD076, 0xE580}, + {MISENSOR_16BIT, 0xD078, 0xD901}, + {MISENSOR_16BIT, 0xD07A, 0x79C0}, + {MISENSOR_16BIT, 0xD07C, 0xD800}, + {MISENSOR_16BIT, 0xD07E, 0x0BE6}, + {MISENSOR_16BIT, 0xD080, 0x04E0}, + {MISENSOR_16BIT, 0xD082, 0xB89E}, + {MISENSOR_16BIT, 0xD084, 0x70CF}, + {MISENSOR_16BIT, 0xD086, 0xFFFF}, + {MISENSOR_16BIT, 0xD088, 0xC8D4}, + {MISENSOR_16BIT, 0xD08A, 0x9002}, + {MISENSOR_16BIT, 0xD08C, 0x0857}, + {MISENSOR_16BIT, 0xD08E, 0x025E}, + + {MISENSOR_16BIT, 0xD090, 0xFFDC}, + {MISENSOR_16BIT, 0xD092, 0xE080}, + {MISENSOR_16BIT, 0xD094, 0x25CC}, + {MISENSOR_16BIT, 0xD096, 0x9022}, + {MISENSOR_16BIT, 0xD098, 0xF225}, + {MISENSOR_16BIT, 0xD09A, 0x1700}, + {MISENSOR_16BIT, 0xD09C, 0x108A}, + {MISENSOR_16BIT, 0xD09E, 0x73CF}, + {MISENSOR_16BIT, 0xD0A0, 0xFF00}, + {MISENSOR_16BIT, 0xD0A2, 0x3174}, + {MISENSOR_16BIT, 0xD0A4, 0x9307}, + {MISENSOR_16BIT, 0xD0A6, 0x2A04}, + {MISENSOR_16BIT, 0xD0A8, 0x103E}, + {MISENSOR_16BIT, 0xD0AA, 0x9328}, + {MISENSOR_16BIT, 0xD0AC, 0x2942}, + {MISENSOR_16BIT, 0xD0AE, 0x7140}, + {MISENSOR_16BIT, 0xD0B0, 0x2A04}, + {MISENSOR_16BIT, 0xD0B2, 0x107E}, + {MISENSOR_16BIT, 0xD0B4, 0x9349}, + {MISENSOR_16BIT, 0xD0B6, 0x2942}, + {MISENSOR_16BIT, 0xD0B8, 0x7141}, + {MISENSOR_16BIT, 0xD0BA, 0x2A04}, + {MISENSOR_16BIT, 0xD0BC, 0x10BE}, + {MISENSOR_16BIT, 0xD0BE, 0x934A}, + + {MISENSOR_16BIT, 0xD0C0, 0x2942}, + {MISENSOR_16BIT, 0xD0C2, 0x714B}, + {MISENSOR_16BIT, 0xD0C4, 0x2A04}, + {MISENSOR_16BIT, 0xD0C6, 0x10BE}, + {MISENSOR_16BIT, 0xD0C8, 0x130C}, + {MISENSOR_16BIT, 0xD0CA, 0x010A}, + {MISENSOR_16BIT, 0xD0CC, 0x2942}, + {MISENSOR_16BIT, 0xD0CE, 0x7142}, + {MISENSOR_16BIT, 0xD0D0, 0x2250}, + {MISENSOR_16BIT, 0xD0D2, 0x13CA}, + {MISENSOR_16BIT, 0xD0D4, 0x1B0C}, + {MISENSOR_16BIT, 0xD0D6, 0x0284}, + {MISENSOR_16BIT, 0xD0D8, 0xB307}, + {MISENSOR_16BIT, 0xD0DA, 0xB328}, + {MISENSOR_16BIT, 0xD0DC, 0x1B12}, + {MISENSOR_16BIT, 0xD0DE, 0x02C4}, + {MISENSOR_16BIT, 0xD0E0, 0xB34A}, + {MISENSOR_16BIT, 0xD0E2, 0xED88}, + {MISENSOR_16BIT, 0xD0E4, 0x71CF}, + {MISENSOR_16BIT, 0xD0E6, 0xFF00}, + {MISENSOR_16BIT, 0xD0E8, 0x3174}, + {MISENSOR_16BIT, 0xD0EA, 0x9106}, + {MISENSOR_16BIT, 0xD0EC, 0xB88F}, + {MISENSOR_16BIT, 0xD0EE, 0xB106}, + + {MISENSOR_16BIT, 0xD0F0, 0x210A}, + {MISENSOR_16BIT, 0xD0F2, 0x8340}, + {MISENSOR_16BIT, 0xD0F4, 0xC000}, + {MISENSOR_16BIT, 0xD0F6, 0x21CA}, + {MISENSOR_16BIT, 0xD0F8, 0x0062}, + {MISENSOR_16BIT, 0xD0FA, 0x20F0}, + {MISENSOR_16BIT, 0xD0FC, 0x0040}, + {MISENSOR_16BIT, 0xD0FE, 0x0B02}, + {MISENSOR_16BIT, 0xD100, 0x0320}, + {MISENSOR_16BIT, 0xD102, 0xD901}, + {MISENSOR_16BIT, 0xD104, 0x07F1}, + {MISENSOR_16BIT, 0xD106, 0x05E0}, + {MISENSOR_16BIT, 0xD108, 0xC0A1}, + {MISENSOR_16BIT, 0xD10A, 0x78E0}, + {MISENSOR_16BIT, 0xD10C, 0xC0F1}, + {MISENSOR_16BIT, 0xD10E, 0x71CF}, + {MISENSOR_16BIT, 0xD110, 0xFFFF}, + {MISENSOR_16BIT, 0xD112, 0xC7C0}, + {MISENSOR_16BIT, 0xD114, 0xD840}, + {MISENSOR_16BIT, 0xD116, 0xA900}, + {MISENSOR_16BIT, 0xD118, 0x71CF}, + {MISENSOR_16BIT, 0xD11A, 0xFFFF}, + {MISENSOR_16BIT, 0xD11C, 0xD02C}, + {MISENSOR_16BIT, 0xD11E, 0xD81E}, + + {MISENSOR_16BIT, 0xD120, 0x0A5A}, + {MISENSOR_16BIT, 0xD122, 0x04E0}, + {MISENSOR_16BIT, 0xD124, 0xDA00}, + {MISENSOR_16BIT, 0xD126, 0xD800}, + {MISENSOR_16BIT, 0xD128, 0xC0D1}, + {MISENSOR_16BIT, 0xD12A, 0x7EE0}, + + {MISENSOR_16BIT, 0x098E, 0x0000}, + {MISENSOR_16BIT, 0xE000, 0x010C}, + {MISENSOR_16BIT, 0xE002, 0x0202}, + {MISENSOR_16BIT, 0xE004, 0x4103}, + {MISENSOR_16BIT, 0xE006, 0x0202}, + {MISENSOR_16BIT, 0x0080, 0xFFF0}, + {MISENSOR_16BIT, 0x0080, 0xFFF1}, + + /* LOAD=Patch 0302; Feature Recommended; Adaptive Sensitivity */ + {MISENSOR_16BIT, 0x0982, 0x0001}, + {MISENSOR_16BIT, 0x098A, 0x512C}, + {MISENSOR_16BIT, 0xD12C, 0x70CF}, + {MISENSOR_16BIT, 0xD12E, 0xFFFF}, + {MISENSOR_16BIT, 0xD130, 0xC5D4}, + {MISENSOR_16BIT, 0xD132, 0x903A}, + {MISENSOR_16BIT, 0xD134, 0x2144}, + {MISENSOR_16BIT, 0xD136, 0x0C00}, + {MISENSOR_16BIT, 0xD138, 0x2186}, + {MISENSOR_16BIT, 0xD13A, 0x0FF3}, + {MISENSOR_16BIT, 0xD13C, 0xB844}, + {MISENSOR_16BIT, 0xD13E, 0x262F}, + {MISENSOR_16BIT, 0xD140, 0xF008}, + {MISENSOR_16BIT, 0xD142, 0xB948}, + {MISENSOR_16BIT, 0xD144, 0x21CC}, + {MISENSOR_16BIT, 0xD146, 0x8021}, + {MISENSOR_16BIT, 0xD148, 0xD801}, + {MISENSOR_16BIT, 0xD14A, 0xF203}, + {MISENSOR_16BIT, 0xD14C, 0xD800}, + {MISENSOR_16BIT, 0xD14E, 0x7EE0}, + {MISENSOR_16BIT, 0xD150, 0xC0F1}, + {MISENSOR_16BIT, 0xD152, 0x71CF}, + {MISENSOR_16BIT, 0xD154, 0xFFFF}, + {MISENSOR_16BIT, 0xD156, 0xC610}, + {MISENSOR_16BIT, 0xD158, 0x910E}, + {MISENSOR_16BIT, 0xD15A, 0x208C}, + {MISENSOR_16BIT, 0xD15C, 0x8014}, + {MISENSOR_16BIT, 0xD15E, 0xF418}, + {MISENSOR_16BIT, 0xD160, 0x910F}, + {MISENSOR_16BIT, 0xD162, 0x208C}, + {MISENSOR_16BIT, 0xD164, 0x800F}, + {MISENSOR_16BIT, 0xD166, 0xF414}, + {MISENSOR_16BIT, 0xD168, 0x9116}, + {MISENSOR_16BIT, 0xD16A, 0x208C}, + {MISENSOR_16BIT, 0xD16C, 0x800A}, + {MISENSOR_16BIT, 0xD16E, 0xF410}, + {MISENSOR_16BIT, 0xD170, 0x9117}, + {MISENSOR_16BIT, 0xD172, 0x208C}, + {MISENSOR_16BIT, 0xD174, 0x8807}, + {MISENSOR_16BIT, 0xD176, 0xF40C}, + {MISENSOR_16BIT, 0xD178, 0x9118}, + {MISENSOR_16BIT, 0xD17A, 0x2086}, + {MISENSOR_16BIT, 0xD17C, 0x0FF3}, + {MISENSOR_16BIT, 0xD17E, 0xB848}, + {MISENSOR_16BIT, 0xD180, 0x080D}, + {MISENSOR_16BIT, 0xD182, 0x0090}, + {MISENSOR_16BIT, 0xD184, 0xFFEA}, + {MISENSOR_16BIT, 0xD186, 0xE081}, + {MISENSOR_16BIT, 0xD188, 0xD801}, + {MISENSOR_16BIT, 0xD18A, 0xF203}, + {MISENSOR_16BIT, 0xD18C, 0xD800}, + {MISENSOR_16BIT, 0xD18E, 0xC0D1}, + {MISENSOR_16BIT, 0xD190, 0x7EE0}, + {MISENSOR_16BIT, 0xD192, 0x78E0}, + {MISENSOR_16BIT, 0xD194, 0xC0F1}, + {MISENSOR_16BIT, 0xD196, 0x71CF}, + {MISENSOR_16BIT, 0xD198, 0xFFFF}, + {MISENSOR_16BIT, 0xD19A, 0xC610}, + {MISENSOR_16BIT, 0xD19C, 0x910E}, + {MISENSOR_16BIT, 0xD19E, 0x208C}, + {MISENSOR_16BIT, 0xD1A0, 0x800A}, + {MISENSOR_16BIT, 0xD1A2, 0xF418}, + {MISENSOR_16BIT, 0xD1A4, 0x910F}, + {MISENSOR_16BIT, 0xD1A6, 0x208C}, + {MISENSOR_16BIT, 0xD1A8, 0x8807}, + {MISENSOR_16BIT, 0xD1AA, 0xF414}, + {MISENSOR_16BIT, 0xD1AC, 0x9116}, + {MISENSOR_16BIT, 0xD1AE, 0x208C}, + {MISENSOR_16BIT, 0xD1B0, 0x800A}, + {MISENSOR_16BIT, 0xD1B2, 0xF410}, + {MISENSOR_16BIT, 0xD1B4, 0x9117}, + {MISENSOR_16BIT, 0xD1B6, 0x208C}, + {MISENSOR_16BIT, 0xD1B8, 0x8807}, + {MISENSOR_16BIT, 0xD1BA, 0xF40C}, + {MISENSOR_16BIT, 0xD1BC, 0x9118}, + {MISENSOR_16BIT, 0xD1BE, 0x2086}, + {MISENSOR_16BIT, 0xD1C0, 0x0FF3}, + {MISENSOR_16BIT, 0xD1C2, 0xB848}, + {MISENSOR_16BIT, 0xD1C4, 0x080D}, + {MISENSOR_16BIT, 0xD1C6, 0x0090}, + {MISENSOR_16BIT, 0xD1C8, 0xFFD9}, + {MISENSOR_16BIT, 0xD1CA, 0xE080}, + {MISENSOR_16BIT, 0xD1CC, 0xD801}, + {MISENSOR_16BIT, 0xD1CE, 0xF203}, + {MISENSOR_16BIT, 0xD1D0, 0xD800}, + {MISENSOR_16BIT, 0xD1D2, 0xF1DF}, + {MISENSOR_16BIT, 0xD1D4, 0x9040}, + {MISENSOR_16BIT, 0xD1D6, 0x71CF}, + {MISENSOR_16BIT, 0xD1D8, 0xFFFF}, + {MISENSOR_16BIT, 0xD1DA, 0xC5D4}, + {MISENSOR_16BIT, 0xD1DC, 0xB15A}, + {MISENSOR_16BIT, 0xD1DE, 0x9041}, + {MISENSOR_16BIT, 0xD1E0, 0x73CF}, + {MISENSOR_16BIT, 0xD1E2, 0xFFFF}, + {MISENSOR_16BIT, 0xD1E4, 0xC7D0}, + {MISENSOR_16BIT, 0xD1E6, 0xB140}, + {MISENSOR_16BIT, 0xD1E8, 0x9042}, + {MISENSOR_16BIT, 0xD1EA, 0xB141}, + {MISENSOR_16BIT, 0xD1EC, 0x9043}, + {MISENSOR_16BIT, 0xD1EE, 0xB142}, + {MISENSOR_16BIT, 0xD1F0, 0x9044}, + {MISENSOR_16BIT, 0xD1F2, 0xB143}, + {MISENSOR_16BIT, 0xD1F4, 0x9045}, + {MISENSOR_16BIT, 0xD1F6, 0xB147}, + {MISENSOR_16BIT, 0xD1F8, 0x9046}, + {MISENSOR_16BIT, 0xD1FA, 0xB148}, + {MISENSOR_16BIT, 0xD1FC, 0x9047}, + {MISENSOR_16BIT, 0xD1FE, 0xB14B}, + {MISENSOR_16BIT, 0xD200, 0x9048}, + {MISENSOR_16BIT, 0xD202, 0xB14C}, + {MISENSOR_16BIT, 0xD204, 0x9049}, + {MISENSOR_16BIT, 0xD206, 0x1958}, + {MISENSOR_16BIT, 0xD208, 0x0084}, + {MISENSOR_16BIT, 0xD20A, 0x904A}, + {MISENSOR_16BIT, 0xD20C, 0x195A}, + {MISENSOR_16BIT, 0xD20E, 0x0084}, + {MISENSOR_16BIT, 0xD210, 0x8856}, + {MISENSOR_16BIT, 0xD212, 0x1B36}, + {MISENSOR_16BIT, 0xD214, 0x8082}, + {MISENSOR_16BIT, 0xD216, 0x8857}, + {MISENSOR_16BIT, 0xD218, 0x1B37}, + {MISENSOR_16BIT, 0xD21A, 0x8082}, + {MISENSOR_16BIT, 0xD21C, 0x904C}, + {MISENSOR_16BIT, 0xD21E, 0x19A7}, + {MISENSOR_16BIT, 0xD220, 0x009C}, + {MISENSOR_16BIT, 0xD222, 0x881A}, + {MISENSOR_16BIT, 0xD224, 0x7FE0}, + {MISENSOR_16BIT, 0xD226, 0x1B54}, + {MISENSOR_16BIT, 0xD228, 0x8002}, + {MISENSOR_16BIT, 0xD22A, 0x78E0}, + {MISENSOR_16BIT, 0xD22C, 0x71CF}, + {MISENSOR_16BIT, 0xD22E, 0xFFFF}, + {MISENSOR_16BIT, 0xD230, 0xC350}, + {MISENSOR_16BIT, 0xD232, 0xD828}, + {MISENSOR_16BIT, 0xD234, 0xA90B}, + {MISENSOR_16BIT, 0xD236, 0x8100}, + {MISENSOR_16BIT, 0xD238, 0x01C5}, + {MISENSOR_16BIT, 0xD23A, 0x0320}, + {MISENSOR_16BIT, 0xD23C, 0xD900}, + {MISENSOR_16BIT, 0xD23E, 0x78E0}, + {MISENSOR_16BIT, 0xD240, 0x220A}, + {MISENSOR_16BIT, 0xD242, 0x1F80}, + {MISENSOR_16BIT, 0xD244, 0xFFFF}, + {MISENSOR_16BIT, 0xD246, 0xD4E0}, + {MISENSOR_16BIT, 0xD248, 0xC0F1}, + {MISENSOR_16BIT, 0xD24A, 0x0811}, + {MISENSOR_16BIT, 0xD24C, 0x0051}, + {MISENSOR_16BIT, 0xD24E, 0x2240}, + {MISENSOR_16BIT, 0xD250, 0x1200}, + {MISENSOR_16BIT, 0xD252, 0xFFE1}, + {MISENSOR_16BIT, 0xD254, 0xD801}, + {MISENSOR_16BIT, 0xD256, 0xF006}, + {MISENSOR_16BIT, 0xD258, 0x2240}, + {MISENSOR_16BIT, 0xD25A, 0x1900}, + {MISENSOR_16BIT, 0xD25C, 0xFFDE}, + {MISENSOR_16BIT, 0xD25E, 0xD802}, + {MISENSOR_16BIT, 0xD260, 0x1A05}, + {MISENSOR_16BIT, 0xD262, 0x1002}, + {MISENSOR_16BIT, 0xD264, 0xFFF2}, + {MISENSOR_16BIT, 0xD266, 0xF195}, + {MISENSOR_16BIT, 0xD268, 0xC0F1}, + {MISENSOR_16BIT, 0xD26A, 0x0E7E}, + {MISENSOR_16BIT, 0xD26C, 0x05C0}, + {MISENSOR_16BIT, 0xD26E, 0x75CF}, + {MISENSOR_16BIT, 0xD270, 0xFFFF}, + {MISENSOR_16BIT, 0xD272, 0xC84C}, + {MISENSOR_16BIT, 0xD274, 0x9502}, + {MISENSOR_16BIT, 0xD276, 0x77CF}, + {MISENSOR_16BIT, 0xD278, 0xFFFF}, + {MISENSOR_16BIT, 0xD27A, 0xC344}, + {MISENSOR_16BIT, 0xD27C, 0x2044}, + {MISENSOR_16BIT, 0xD27E, 0x008E}, + {MISENSOR_16BIT, 0xD280, 0xB8A1}, + {MISENSOR_16BIT, 0xD282, 0x0926}, + {MISENSOR_16BIT, 0xD284, 0x03E0}, + {MISENSOR_16BIT, 0xD286, 0xB502}, + {MISENSOR_16BIT, 0xD288, 0x9502}, + {MISENSOR_16BIT, 0xD28A, 0x952E}, + {MISENSOR_16BIT, 0xD28C, 0x7E05}, + {MISENSOR_16BIT, 0xD28E, 0xB5C2}, + {MISENSOR_16BIT, 0xD290, 0x70CF}, + {MISENSOR_16BIT, 0xD292, 0xFFFF}, + {MISENSOR_16BIT, 0xD294, 0xC610}, + {MISENSOR_16BIT, 0xD296, 0x099A}, + {MISENSOR_16BIT, 0xD298, 0x04A0}, + {MISENSOR_16BIT, 0xD29A, 0xB026}, + {MISENSOR_16BIT, 0xD29C, 0x0E02}, + {MISENSOR_16BIT, 0xD29E, 0x0560}, + {MISENSOR_16BIT, 0xD2A0, 0xDE00}, + {MISENSOR_16BIT, 0xD2A2, 0x0A12}, + {MISENSOR_16BIT, 0xD2A4, 0x0320}, + {MISENSOR_16BIT, 0xD2A6, 0xB7C4}, + {MISENSOR_16BIT, 0xD2A8, 0x0B36}, + {MISENSOR_16BIT, 0xD2AA, 0x03A0}, + {MISENSOR_16BIT, 0xD2AC, 0x70C9}, + {MISENSOR_16BIT, 0xD2AE, 0x9502}, + {MISENSOR_16BIT, 0xD2B0, 0x7608}, + {MISENSOR_16BIT, 0xD2B2, 0xB8A8}, + {MISENSOR_16BIT, 0xD2B4, 0xB502}, + {MISENSOR_16BIT, 0xD2B6, 0x70CF}, + {MISENSOR_16BIT, 0xD2B8, 0x0000}, + {MISENSOR_16BIT, 0xD2BA, 0x5536}, + {MISENSOR_16BIT, 0xD2BC, 0x7860}, + {MISENSOR_16BIT, 0xD2BE, 0x2686}, + {MISENSOR_16BIT, 0xD2C0, 0x1FFB}, + {MISENSOR_16BIT, 0xD2C2, 0x9502}, + {MISENSOR_16BIT, 0xD2C4, 0x78C5}, + {MISENSOR_16BIT, 0xD2C6, 0x0631}, + {MISENSOR_16BIT, 0xD2C8, 0x05E0}, + {MISENSOR_16BIT, 0xD2CA, 0xB502}, + {MISENSOR_16BIT, 0xD2CC, 0x72CF}, + {MISENSOR_16BIT, 0xD2CE, 0xFFFF}, + {MISENSOR_16BIT, 0xD2D0, 0xC5D4}, + {MISENSOR_16BIT, 0xD2D2, 0x923A}, + {MISENSOR_16BIT, 0xD2D4, 0x73CF}, + {MISENSOR_16BIT, 0xD2D6, 0xFFFF}, + {MISENSOR_16BIT, 0xD2D8, 0xC7D0}, + {MISENSOR_16BIT, 0xD2DA, 0xB020}, + {MISENSOR_16BIT, 0xD2DC, 0x9220}, + {MISENSOR_16BIT, 0xD2DE, 0xB021}, + {MISENSOR_16BIT, 0xD2E0, 0x9221}, + {MISENSOR_16BIT, 0xD2E2, 0xB022}, + {MISENSOR_16BIT, 0xD2E4, 0x9222}, + {MISENSOR_16BIT, 0xD2E6, 0xB023}, + {MISENSOR_16BIT, 0xD2E8, 0x9223}, + {MISENSOR_16BIT, 0xD2EA, 0xB024}, + {MISENSOR_16BIT, 0xD2EC, 0x9227}, + {MISENSOR_16BIT, 0xD2EE, 0xB025}, + {MISENSOR_16BIT, 0xD2F0, 0x9228}, + {MISENSOR_16BIT, 0xD2F2, 0xB026}, + {MISENSOR_16BIT, 0xD2F4, 0x922B}, + {MISENSOR_16BIT, 0xD2F6, 0xB027}, + {MISENSOR_16BIT, 0xD2F8, 0x922C}, + {MISENSOR_16BIT, 0xD2FA, 0xB028}, + {MISENSOR_16BIT, 0xD2FC, 0x1258}, + {MISENSOR_16BIT, 0xD2FE, 0x0101}, + {MISENSOR_16BIT, 0xD300, 0xB029}, + {MISENSOR_16BIT, 0xD302, 0x125A}, + {MISENSOR_16BIT, 0xD304, 0x0101}, + {MISENSOR_16BIT, 0xD306, 0xB02A}, + {MISENSOR_16BIT, 0xD308, 0x1336}, + {MISENSOR_16BIT, 0xD30A, 0x8081}, + {MISENSOR_16BIT, 0xD30C, 0xA836}, + {MISENSOR_16BIT, 0xD30E, 0x1337}, + {MISENSOR_16BIT, 0xD310, 0x8081}, + {MISENSOR_16BIT, 0xD312, 0xA837}, + {MISENSOR_16BIT, 0xD314, 0x12A7}, + {MISENSOR_16BIT, 0xD316, 0x0701}, + {MISENSOR_16BIT, 0xD318, 0xB02C}, + {MISENSOR_16BIT, 0xD31A, 0x1354}, + {MISENSOR_16BIT, 0xD31C, 0x8081}, + {MISENSOR_16BIT, 0xD31E, 0x7FE0}, + {MISENSOR_16BIT, 0xD320, 0xA83A}, + {MISENSOR_16BIT, 0xD322, 0x78E0}, + {MISENSOR_16BIT, 0xD324, 0xC0F1}, + {MISENSOR_16BIT, 0xD326, 0x0DC2}, + {MISENSOR_16BIT, 0xD328, 0x05C0}, + {MISENSOR_16BIT, 0xD32A, 0x7608}, + {MISENSOR_16BIT, 0xD32C, 0x09BB}, + {MISENSOR_16BIT, 0xD32E, 0x0010}, + {MISENSOR_16BIT, 0xD330, 0x75CF}, + {MISENSOR_16BIT, 0xD332, 0xFFFF}, + {MISENSOR_16BIT, 0xD334, 0xD4E0}, + {MISENSOR_16BIT, 0xD336, 0x8D21}, + {MISENSOR_16BIT, 0xD338, 0x8D00}, + {MISENSOR_16BIT, 0xD33A, 0x2153}, + {MISENSOR_16BIT, 0xD33C, 0x0003}, + {MISENSOR_16BIT, 0xD33E, 0xB8C0}, + {MISENSOR_16BIT, 0xD340, 0x8D45}, + {MISENSOR_16BIT, 0xD342, 0x0B23}, + {MISENSOR_16BIT, 0xD344, 0x0000}, + {MISENSOR_16BIT, 0xD346, 0xEA8F}, + {MISENSOR_16BIT, 0xD348, 0x0915}, + {MISENSOR_16BIT, 0xD34A, 0x001E}, + {MISENSOR_16BIT, 0xD34C, 0xFF81}, + {MISENSOR_16BIT, 0xD34E, 0xE808}, + {MISENSOR_16BIT, 0xD350, 0x2540}, + {MISENSOR_16BIT, 0xD352, 0x1900}, + {MISENSOR_16BIT, 0xD354, 0xFFDE}, + {MISENSOR_16BIT, 0xD356, 0x8D00}, + {MISENSOR_16BIT, 0xD358, 0xB880}, + {MISENSOR_16BIT, 0xD35A, 0xF004}, + {MISENSOR_16BIT, 0xD35C, 0x8D00}, + {MISENSOR_16BIT, 0xD35E, 0xB8A0}, + {MISENSOR_16BIT, 0xD360, 0xAD00}, + {MISENSOR_16BIT, 0xD362, 0x8D05}, + {MISENSOR_16BIT, 0xD364, 0xE081}, + {MISENSOR_16BIT, 0xD366, 0x20CC}, + {MISENSOR_16BIT, 0xD368, 0x80A2}, + {MISENSOR_16BIT, 0xD36A, 0xDF00}, + {MISENSOR_16BIT, 0xD36C, 0xF40A}, + {MISENSOR_16BIT, 0xD36E, 0x71CF}, + {MISENSOR_16BIT, 0xD370, 0xFFFF}, + {MISENSOR_16BIT, 0xD372, 0xC84C}, + {MISENSOR_16BIT, 0xD374, 0x9102}, + {MISENSOR_16BIT, 0xD376, 0x7708}, + {MISENSOR_16BIT, 0xD378, 0xB8A6}, + {MISENSOR_16BIT, 0xD37A, 0x2786}, + {MISENSOR_16BIT, 0xD37C, 0x1FFE}, + {MISENSOR_16BIT, 0xD37E, 0xB102}, + {MISENSOR_16BIT, 0xD380, 0x0B42}, + {MISENSOR_16BIT, 0xD382, 0x0180}, + {MISENSOR_16BIT, 0xD384, 0x0E3E}, + {MISENSOR_16BIT, 0xD386, 0x0180}, + {MISENSOR_16BIT, 0xD388, 0x0F4A}, + {MISENSOR_16BIT, 0xD38A, 0x0160}, + {MISENSOR_16BIT, 0xD38C, 0x70C9}, + {MISENSOR_16BIT, 0xD38E, 0x8D05}, + {MISENSOR_16BIT, 0xD390, 0xE081}, + {MISENSOR_16BIT, 0xD392, 0x20CC}, + {MISENSOR_16BIT, 0xD394, 0x80A2}, + {MISENSOR_16BIT, 0xD396, 0xF429}, + {MISENSOR_16BIT, 0xD398, 0x76CF}, + {MISENSOR_16BIT, 0xD39A, 0xFFFF}, + {MISENSOR_16BIT, 0xD39C, 0xC84C}, + {MISENSOR_16BIT, 0xD39E, 0x082D}, + {MISENSOR_16BIT, 0xD3A0, 0x0051}, + {MISENSOR_16BIT, 0xD3A2, 0x70CF}, + {MISENSOR_16BIT, 0xD3A4, 0xFFFF}, + {MISENSOR_16BIT, 0xD3A6, 0xC90C}, + {MISENSOR_16BIT, 0xD3A8, 0x8805}, + {MISENSOR_16BIT, 0xD3AA, 0x09B6}, + {MISENSOR_16BIT, 0xD3AC, 0x0360}, + {MISENSOR_16BIT, 0xD3AE, 0xD908}, + {MISENSOR_16BIT, 0xD3B0, 0x2099}, + {MISENSOR_16BIT, 0xD3B2, 0x0802}, + {MISENSOR_16BIT, 0xD3B4, 0x9634}, + {MISENSOR_16BIT, 0xD3B6, 0xB503}, + {MISENSOR_16BIT, 0xD3B8, 0x7902}, + {MISENSOR_16BIT, 0xD3BA, 0x1523}, + {MISENSOR_16BIT, 0xD3BC, 0x1080}, + {MISENSOR_16BIT, 0xD3BE, 0xB634}, + {MISENSOR_16BIT, 0xD3C0, 0xE001}, + {MISENSOR_16BIT, 0xD3C2, 0x1D23}, + {MISENSOR_16BIT, 0xD3C4, 0x1002}, + {MISENSOR_16BIT, 0xD3C6, 0xF00B}, + {MISENSOR_16BIT, 0xD3C8, 0x9634}, + {MISENSOR_16BIT, 0xD3CA, 0x9503}, + {MISENSOR_16BIT, 0xD3CC, 0x6038}, + {MISENSOR_16BIT, 0xD3CE, 0xB614}, + {MISENSOR_16BIT, 0xD3D0, 0x153F}, + {MISENSOR_16BIT, 0xD3D2, 0x1080}, + {MISENSOR_16BIT, 0xD3D4, 0xE001}, + {MISENSOR_16BIT, 0xD3D6, 0x1D3F}, + {MISENSOR_16BIT, 0xD3D8, 0x1002}, + {MISENSOR_16BIT, 0xD3DA, 0xFFA4}, + {MISENSOR_16BIT, 0xD3DC, 0x9602}, + {MISENSOR_16BIT, 0xD3DE, 0x7F05}, + {MISENSOR_16BIT, 0xD3E0, 0xD800}, + {MISENSOR_16BIT, 0xD3E2, 0xB6E2}, + {MISENSOR_16BIT, 0xD3E4, 0xAD05}, + {MISENSOR_16BIT, 0xD3E6, 0x0511}, + {MISENSOR_16BIT, 0xD3E8, 0x05E0}, + {MISENSOR_16BIT, 0xD3EA, 0xD800}, + {MISENSOR_16BIT, 0xD3EC, 0xC0F1}, + {MISENSOR_16BIT, 0xD3EE, 0x0CFE}, + {MISENSOR_16BIT, 0xD3F0, 0x05C0}, + {MISENSOR_16BIT, 0xD3F2, 0x0A96}, + {MISENSOR_16BIT, 0xD3F4, 0x05A0}, + {MISENSOR_16BIT, 0xD3F6, 0x7608}, + {MISENSOR_16BIT, 0xD3F8, 0x0C22}, + {MISENSOR_16BIT, 0xD3FA, 0x0240}, + {MISENSOR_16BIT, 0xD3FC, 0xE080}, + {MISENSOR_16BIT, 0xD3FE, 0x20CA}, + {MISENSOR_16BIT, 0xD400, 0x0F82}, + {MISENSOR_16BIT, 0xD402, 0x0000}, + {MISENSOR_16BIT, 0xD404, 0x190B}, + {MISENSOR_16BIT, 0xD406, 0x0C60}, + {MISENSOR_16BIT, 0xD408, 0x05A2}, + {MISENSOR_16BIT, 0xD40A, 0x21CA}, + {MISENSOR_16BIT, 0xD40C, 0x0022}, + {MISENSOR_16BIT, 0xD40E, 0x0C56}, + {MISENSOR_16BIT, 0xD410, 0x0240}, + {MISENSOR_16BIT, 0xD412, 0xE806}, + {MISENSOR_16BIT, 0xD414, 0x0E0E}, + {MISENSOR_16BIT, 0xD416, 0x0220}, + {MISENSOR_16BIT, 0xD418, 0x70C9}, + {MISENSOR_16BIT, 0xD41A, 0xF048}, + {MISENSOR_16BIT, 0xD41C, 0x0896}, + {MISENSOR_16BIT, 0xD41E, 0x0440}, + {MISENSOR_16BIT, 0xD420, 0x0E96}, + {MISENSOR_16BIT, 0xD422, 0x0400}, + {MISENSOR_16BIT, 0xD424, 0x0966}, + {MISENSOR_16BIT, 0xD426, 0x0380}, + {MISENSOR_16BIT, 0xD428, 0x75CF}, + {MISENSOR_16BIT, 0xD42A, 0xFFFF}, + {MISENSOR_16BIT, 0xD42C, 0xD4E0}, + {MISENSOR_16BIT, 0xD42E, 0x8D00}, + {MISENSOR_16BIT, 0xD430, 0x084D}, + {MISENSOR_16BIT, 0xD432, 0x001E}, + {MISENSOR_16BIT, 0xD434, 0xFF47}, + {MISENSOR_16BIT, 0xD436, 0x080D}, + {MISENSOR_16BIT, 0xD438, 0x0050}, + {MISENSOR_16BIT, 0xD43A, 0xFF57}, + {MISENSOR_16BIT, 0xD43C, 0x0841}, + {MISENSOR_16BIT, 0xD43E, 0x0051}, + {MISENSOR_16BIT, 0xD440, 0x8D04}, + {MISENSOR_16BIT, 0xD442, 0x9521}, + {MISENSOR_16BIT, 0xD444, 0xE064}, + {MISENSOR_16BIT, 0xD446, 0x790C}, + {MISENSOR_16BIT, 0xD448, 0x702F}, + {MISENSOR_16BIT, 0xD44A, 0x0CE2}, + {MISENSOR_16BIT, 0xD44C, 0x05E0}, + {MISENSOR_16BIT, 0xD44E, 0xD964}, + {MISENSOR_16BIT, 0xD450, 0x72CF}, + {MISENSOR_16BIT, 0xD452, 0xFFFF}, + {MISENSOR_16BIT, 0xD454, 0xC700}, + {MISENSOR_16BIT, 0xD456, 0x9235}, + {MISENSOR_16BIT, 0xD458, 0x0811}, + {MISENSOR_16BIT, 0xD45A, 0x0043}, + {MISENSOR_16BIT, 0xD45C, 0xFF3D}, + {MISENSOR_16BIT, 0xD45E, 0x080D}, + {MISENSOR_16BIT, 0xD460, 0x0051}, + {MISENSOR_16BIT, 0xD462, 0xD801}, + {MISENSOR_16BIT, 0xD464, 0xFF77}, + {MISENSOR_16BIT, 0xD466, 0xF025}, + {MISENSOR_16BIT, 0xD468, 0x9501}, + {MISENSOR_16BIT, 0xD46A, 0x9235}, + {MISENSOR_16BIT, 0xD46C, 0x0911}, + {MISENSOR_16BIT, 0xD46E, 0x0003}, + {MISENSOR_16BIT, 0xD470, 0xFF49}, + {MISENSOR_16BIT, 0xD472, 0x080D}, + {MISENSOR_16BIT, 0xD474, 0x0051}, + {MISENSOR_16BIT, 0xD476, 0xD800}, + {MISENSOR_16BIT, 0xD478, 0xFF72}, + {MISENSOR_16BIT, 0xD47A, 0xF01B}, + {MISENSOR_16BIT, 0xD47C, 0x0886}, + {MISENSOR_16BIT, 0xD47E, 0x03E0}, + {MISENSOR_16BIT, 0xD480, 0xD801}, + {MISENSOR_16BIT, 0xD482, 0x0EF6}, + {MISENSOR_16BIT, 0xD484, 0x03C0}, + {MISENSOR_16BIT, 0xD486, 0x0F52}, + {MISENSOR_16BIT, 0xD488, 0x0340}, + {MISENSOR_16BIT, 0xD48A, 0x0DBA}, + {MISENSOR_16BIT, 0xD48C, 0x0200}, + {MISENSOR_16BIT, 0xD48E, 0x0AF6}, + {MISENSOR_16BIT, 0xD490, 0x0440}, + {MISENSOR_16BIT, 0xD492, 0x0C22}, + {MISENSOR_16BIT, 0xD494, 0x0400}, + {MISENSOR_16BIT, 0xD496, 0x0D72}, + {MISENSOR_16BIT, 0xD498, 0x0440}, + {MISENSOR_16BIT, 0xD49A, 0x0DC2}, + {MISENSOR_16BIT, 0xD49C, 0x0200}, + {MISENSOR_16BIT, 0xD49E, 0x0972}, + {MISENSOR_16BIT, 0xD4A0, 0x0440}, + {MISENSOR_16BIT, 0xD4A2, 0x0D3A}, + {MISENSOR_16BIT, 0xD4A4, 0x0220}, + {MISENSOR_16BIT, 0xD4A6, 0xD820}, + {MISENSOR_16BIT, 0xD4A8, 0x0BFA}, + {MISENSOR_16BIT, 0xD4AA, 0x0260}, + {MISENSOR_16BIT, 0xD4AC, 0x70C9}, + {MISENSOR_16BIT, 0xD4AE, 0x0451}, + {MISENSOR_16BIT, 0xD4B0, 0x05C0}, + {MISENSOR_16BIT, 0xD4B2, 0x78E0}, + {MISENSOR_16BIT, 0xD4B4, 0xD900}, + {MISENSOR_16BIT, 0xD4B6, 0xF00A}, + {MISENSOR_16BIT, 0xD4B8, 0x70CF}, + {MISENSOR_16BIT, 0xD4BA, 0xFFFF}, + {MISENSOR_16BIT, 0xD4BC, 0xD520}, + {MISENSOR_16BIT, 0xD4BE, 0x7835}, + {MISENSOR_16BIT, 0xD4C0, 0x8041}, + {MISENSOR_16BIT, 0xD4C2, 0x8000}, + {MISENSOR_16BIT, 0xD4C4, 0xE102}, + {MISENSOR_16BIT, 0xD4C6, 0xA040}, + {MISENSOR_16BIT, 0xD4C8, 0x09F1}, + {MISENSOR_16BIT, 0xD4CA, 0x8114}, + {MISENSOR_16BIT, 0xD4CC, 0x71CF}, + {MISENSOR_16BIT, 0xD4CE, 0xFFFF}, + {MISENSOR_16BIT, 0xD4D0, 0xD4E0}, + {MISENSOR_16BIT, 0xD4D2, 0x70CF}, + {MISENSOR_16BIT, 0xD4D4, 0xFFFF}, + {MISENSOR_16BIT, 0xD4D6, 0xC594}, + {MISENSOR_16BIT, 0xD4D8, 0xB03A}, + {MISENSOR_16BIT, 0xD4DA, 0x7FE0}, + {MISENSOR_16BIT, 0xD4DC, 0xD800}, + {MISENSOR_16BIT, 0xD4DE, 0x0000}, + {MISENSOR_16BIT, 0xD4E0, 0x0000}, + {MISENSOR_16BIT, 0xD4E2, 0x0500}, + {MISENSOR_16BIT, 0xD4E4, 0x0500}, + {MISENSOR_16BIT, 0xD4E6, 0x0200}, + {MISENSOR_16BIT, 0xD4E8, 0x0330}, + {MISENSOR_16BIT, 0xD4EA, 0x0000}, + {MISENSOR_16BIT, 0xD4EC, 0x0000}, + {MISENSOR_16BIT, 0xD4EE, 0x03CD}, + {MISENSOR_16BIT, 0xD4F0, 0x050D}, + {MISENSOR_16BIT, 0xD4F2, 0x01C5}, + {MISENSOR_16BIT, 0xD4F4, 0x03B3}, + {MISENSOR_16BIT, 0xD4F6, 0x00E0}, + {MISENSOR_16BIT, 0xD4F8, 0x01E3}, + {MISENSOR_16BIT, 0xD4FA, 0x0280}, + {MISENSOR_16BIT, 0xD4FC, 0x01E0}, + {MISENSOR_16BIT, 0xD4FE, 0x0109}, + {MISENSOR_16BIT, 0xD500, 0x0080}, + {MISENSOR_16BIT, 0xD502, 0x0500}, + {MISENSOR_16BIT, 0xD504, 0x0000}, + {MISENSOR_16BIT, 0xD506, 0x0000}, + {MISENSOR_16BIT, 0xD508, 0x0000}, + {MISENSOR_16BIT, 0xD50A, 0x0000}, + {MISENSOR_16BIT, 0xD50C, 0x0000}, + {MISENSOR_16BIT, 0xD50E, 0x0000}, + {MISENSOR_16BIT, 0xD510, 0x0000}, + {MISENSOR_16BIT, 0xD512, 0x0000}, + {MISENSOR_16BIT, 0xD514, 0x0000}, + {MISENSOR_16BIT, 0xD516, 0x0000}, + {MISENSOR_16BIT, 0xD518, 0x0000}, + {MISENSOR_16BIT, 0xD51A, 0x0000}, + {MISENSOR_16BIT, 0xD51C, 0x0000}, + {MISENSOR_16BIT, 0xD51E, 0x0000}, + {MISENSOR_16BIT, 0xD520, 0xFFFF}, + {MISENSOR_16BIT, 0xD522, 0xC9B4}, + {MISENSOR_16BIT, 0xD524, 0xFFFF}, + {MISENSOR_16BIT, 0xD526, 0xD324}, + {MISENSOR_16BIT, 0xD528, 0xFFFF}, + {MISENSOR_16BIT, 0xD52A, 0xCA34}, + {MISENSOR_16BIT, 0xD52C, 0xFFFF}, + {MISENSOR_16BIT, 0xD52E, 0xD3EC}, + {MISENSOR_16BIT, 0x098E, 0x0000}, + {MISENSOR_16BIT, 0xE000, 0x04B4}, + {MISENSOR_16BIT, 0xE002, 0x0302}, + {MISENSOR_16BIT, 0xE004, 0x4103}, + {MISENSOR_16BIT, 0xE006, 0x0202}, + {MISENSOR_16BIT, 0x0080, 0xFFF0}, + {MISENSOR_16BIT, 0x0080, 0xFFF1}, + + /* PGA parameter and APGA + * [Step4-APGA] [TP101_MT9M114_APGA] + */ + {MISENSOR_16BIT, 0x098E, 0x495E}, + {MISENSOR_16BIT, 0xC95E, 0x0000}, + {MISENSOR_16BIT, 0x3640, 0x02B0}, + {MISENSOR_16BIT, 0x3642, 0x8063}, + {MISENSOR_16BIT, 0x3644, 0x78D0}, + {MISENSOR_16BIT, 0x3646, 0x50CC}, + {MISENSOR_16BIT, 0x3648, 0x3511}, + {MISENSOR_16BIT, 0x364A, 0x0110}, + {MISENSOR_16BIT, 0x364C, 0xBD8A}, + {MISENSOR_16BIT, 0x364E, 0x0CD1}, + {MISENSOR_16BIT, 0x3650, 0x24ED}, + {MISENSOR_16BIT, 0x3652, 0x7C11}, + {MISENSOR_16BIT, 0x3654, 0x0150}, + {MISENSOR_16BIT, 0x3656, 0x124C}, + {MISENSOR_16BIT, 0x3658, 0x3130}, + {MISENSOR_16BIT, 0x365A, 0x508C}, + {MISENSOR_16BIT, 0x365C, 0x21F1}, + {MISENSOR_16BIT, 0x365E, 0x0090}, + {MISENSOR_16BIT, 0x3660, 0xBFCA}, + {MISENSOR_16BIT, 0x3662, 0x0A11}, + {MISENSOR_16BIT, 0x3664, 0x4F4B}, + {MISENSOR_16BIT, 0x3666, 0x28B1}, + {MISENSOR_16BIT, 0x3680, 0x50A9}, + {MISENSOR_16BIT, 0x3682, 0xA04B}, + {MISENSOR_16BIT, 0x3684, 0x0E2D}, + {MISENSOR_16BIT, 0x3686, 0x73EC}, + {MISENSOR_16BIT, 0x3688, 0x164F}, + {MISENSOR_16BIT, 0x368A, 0xF829}, + {MISENSOR_16BIT, 0x368C, 0xC1A8}, + {MISENSOR_16BIT, 0x368E, 0xB0EC}, + {MISENSOR_16BIT, 0x3690, 0xE76A}, + {MISENSOR_16BIT, 0x3692, 0x69AF}, + {MISENSOR_16BIT, 0x3694, 0x378C}, + {MISENSOR_16BIT, 0x3696, 0xA70D}, + {MISENSOR_16BIT, 0x3698, 0x884F}, + {MISENSOR_16BIT, 0x369A, 0xEE8B}, + {MISENSOR_16BIT, 0x369C, 0x5DEF}, + {MISENSOR_16BIT, 0x369E, 0x27CC}, + {MISENSOR_16BIT, 0x36A0, 0xCAAC}, + {MISENSOR_16BIT, 0x36A2, 0x840E}, + {MISENSOR_16BIT, 0x36A4, 0xDAA9}, + {MISENSOR_16BIT, 0x36A6, 0xF00C}, + {MISENSOR_16BIT, 0x36C0, 0x1371}, + {MISENSOR_16BIT, 0x36C2, 0x272F}, + {MISENSOR_16BIT, 0x36C4, 0x2293}, + {MISENSOR_16BIT, 0x36C6, 0xE6D0}, + {MISENSOR_16BIT, 0x36C8, 0xEC32}, + {MISENSOR_16BIT, 0x36CA, 0x11B1}, + {MISENSOR_16BIT, 0x36CC, 0x7BAF}, + {MISENSOR_16BIT, 0x36CE, 0x5813}, + {MISENSOR_16BIT, 0x36D0, 0xB871}, + {MISENSOR_16BIT, 0x36D2, 0x8913}, + {MISENSOR_16BIT, 0x36D4, 0x4610}, + {MISENSOR_16BIT, 0x36D6, 0x7EEE}, + {MISENSOR_16BIT, 0x36D8, 0x0DF3}, + {MISENSOR_16BIT, 0x36DA, 0xB84F}, + {MISENSOR_16BIT, 0x36DC, 0xB532}, + {MISENSOR_16BIT, 0x36DE, 0x1171}, + {MISENSOR_16BIT, 0x36E0, 0x13CF}, + {MISENSOR_16BIT, 0x36E2, 0x22F3}, + {MISENSOR_16BIT, 0x36E4, 0xE090}, + {MISENSOR_16BIT, 0x36E6, 0x8133}, + {MISENSOR_16BIT, 0x3700, 0x88AE}, + {MISENSOR_16BIT, 0x3702, 0x00EA}, + {MISENSOR_16BIT, 0x3704, 0x344F}, + {MISENSOR_16BIT, 0x3706, 0xEC88}, + {MISENSOR_16BIT, 0x3708, 0x3E91}, + {MISENSOR_16BIT, 0x370A, 0xF12D}, + {MISENSOR_16BIT, 0x370C, 0xB0EF}, + {MISENSOR_16BIT, 0x370E, 0x77CD}, + {MISENSOR_16BIT, 0x3710, 0x7930}, + {MISENSOR_16BIT, 0x3712, 0x5C12}, + {MISENSOR_16BIT, 0x3714, 0x500C}, + {MISENSOR_16BIT, 0x3716, 0x22CE}, + {MISENSOR_16BIT, 0x3718, 0x2370}, + {MISENSOR_16BIT, 0x371A, 0x258F}, + {MISENSOR_16BIT, 0x371C, 0x3D30}, + {MISENSOR_16BIT, 0x371E, 0x370C}, + {MISENSOR_16BIT, 0x3720, 0x03ED}, + {MISENSOR_16BIT, 0x3722, 0x9AD0}, + {MISENSOR_16BIT, 0x3724, 0x7ECF}, + {MISENSOR_16BIT, 0x3726, 0x1093}, + {MISENSOR_16BIT, 0x3740, 0x2391}, + {MISENSOR_16BIT, 0x3742, 0xAAD0}, + {MISENSOR_16BIT, 0x3744, 0x28F2}, + {MISENSOR_16BIT, 0x3746, 0xBA4F}, + {MISENSOR_16BIT, 0x3748, 0xC536}, + {MISENSOR_16BIT, 0x374A, 0x1472}, + {MISENSOR_16BIT, 0x374C, 0xD110}, + {MISENSOR_16BIT, 0x374E, 0x2933}, + {MISENSOR_16BIT, 0x3750, 0xD0D1}, + {MISENSOR_16BIT, 0x3752, 0x9F37}, + {MISENSOR_16BIT, 0x3754, 0x34D1}, + {MISENSOR_16BIT, 0x3756, 0x1C6C}, + {MISENSOR_16BIT, 0x3758, 0x3FD2}, + {MISENSOR_16BIT, 0x375A, 0xCB72}, + {MISENSOR_16BIT, 0x375C, 0xBA96}, + {MISENSOR_16BIT, 0x375E, 0x1551}, + {MISENSOR_16BIT, 0x3760, 0xB74F}, + {MISENSOR_16BIT, 0x3762, 0x1672}, + {MISENSOR_16BIT, 0x3764, 0x84F1}, + {MISENSOR_16BIT, 0x3766, 0xC2D6}, + {MISENSOR_16BIT, 0x3782, 0x01E0}, + {MISENSOR_16BIT, 0x3784, 0x0280}, + {MISENSOR_16BIT, 0x37C0, 0xA6EA}, + {MISENSOR_16BIT, 0x37C2, 0x874B}, + {MISENSOR_16BIT, 0x37C4, 0x85CB}, + {MISENSOR_16BIT, 0x37C6, 0x968A}, + {MISENSOR_16BIT, 0x098E, 0x0000}, + {MISENSOR_16BIT, 0xC960, 0x0AF0}, + {MISENSOR_16BIT, 0xC962, 0x79E2}, + {MISENSOR_16BIT, 0xC964, 0x5EC8}, + {MISENSOR_16BIT, 0xC966, 0x791F}, + {MISENSOR_16BIT, 0xC968, 0x76EE}, + {MISENSOR_16BIT, 0xC96A, 0x0FA0}, + {MISENSOR_16BIT, 0xC96C, 0x7DFA}, + {MISENSOR_16BIT, 0xC96E, 0x7DAF}, + {MISENSOR_16BIT, 0xC970, 0x7E02}, + {MISENSOR_16BIT, 0xC972, 0x7E0A}, + {MISENSOR_16BIT, 0xC974, 0x1964}, + {MISENSOR_16BIT, 0xC976, 0x7CDC}, + {MISENSOR_16BIT, 0xC978, 0x7838}, + {MISENSOR_16BIT, 0xC97A, 0x7C2F}, + {MISENSOR_16BIT, 0xC97C, 0x7792}, + {MISENSOR_16BIT, 0xC95E, 0x0003}, + + /* [Step4-APGA] */ + {MISENSOR_16BIT, 0x098E, 0x0000}, + {MISENSOR_16BIT, 0xC95E, 0x0003}, + + /* [Step5-AWB_CCM]1: LOAD=CCM */ + {MISENSOR_16BIT, 0xC892, 0x0267}, + {MISENSOR_16BIT, 0xC894, 0xFF1A}, + {MISENSOR_16BIT, 0xC896, 0xFFB3}, + {MISENSOR_16BIT, 0xC898, 0xFF80}, + {MISENSOR_16BIT, 0xC89A, 0x0166}, + {MISENSOR_16BIT, 0xC89C, 0x0003}, + {MISENSOR_16BIT, 0xC89E, 0xFF9A}, + {MISENSOR_16BIT, 0xC8A0, 0xFEB4}, + {MISENSOR_16BIT, 0xC8A2, 0x024D}, + {MISENSOR_16BIT, 0xC8A4, 0x01BF}, + {MISENSOR_16BIT, 0xC8A6, 0xFF01}, + {MISENSOR_16BIT, 0xC8A8, 0xFFF3}, + {MISENSOR_16BIT, 0xC8AA, 0xFF75}, + {MISENSOR_16BIT, 0xC8AC, 0x0198}, + {MISENSOR_16BIT, 0xC8AE, 0xFFFD}, + {MISENSOR_16BIT, 0xC8B0, 0xFF9A}, + {MISENSOR_16BIT, 0xC8B2, 0xFEE7}, + {MISENSOR_16BIT, 0xC8B4, 0x02A8}, + {MISENSOR_16BIT, 0xC8B6, 0x01D9}, + {MISENSOR_16BIT, 0xC8B8, 0xFF26}, + {MISENSOR_16BIT, 0xC8BA, 0xFFF3}, + {MISENSOR_16BIT, 0xC8BC, 0xFFB3}, + {MISENSOR_16BIT, 0xC8BE, 0x0132}, + {MISENSOR_16BIT, 0xC8C0, 0xFFE8}, + {MISENSOR_16BIT, 0xC8C2, 0xFFDA}, + {MISENSOR_16BIT, 0xC8C4, 0xFECD}, + {MISENSOR_16BIT, 0xC8C6, 0x02C2}, + {MISENSOR_16BIT, 0xC8C8, 0x0075}, + {MISENSOR_16BIT, 0xC8CA, 0x011C}, + {MISENSOR_16BIT, 0xC8CC, 0x009A}, + {MISENSOR_16BIT, 0xC8CE, 0x0105}, + {MISENSOR_16BIT, 0xC8D0, 0x00A4}, + {MISENSOR_16BIT, 0xC8D2, 0x00AC}, + {MISENSOR_16BIT, 0xC8D4, 0x0A8C}, + {MISENSOR_16BIT, 0xC8D6, 0x0F0A}, + {MISENSOR_16BIT, 0xC8D8, 0x1964}, + + /* LOAD=AWB */ + {MISENSOR_16BIT, 0xC914, 0x0000}, + {MISENSOR_16BIT, 0xC916, 0x0000}, + {MISENSOR_16BIT, 0xC918, 0x04FF}, + {MISENSOR_16BIT, 0xC91A, 0x02CF}, + {MISENSOR_16BIT, 0xC904, 0x0033}, + {MISENSOR_16BIT, 0xC906, 0x0040}, + {MISENSOR_8BIT, 0xC8F2, 0x03}, + {MISENSOR_8BIT, 0xC8F3, 0x02}, + {MISENSOR_16BIT, 0xC906, 0x003C}, + {MISENSOR_16BIT, 0xC8F4, 0x0000}, + {MISENSOR_16BIT, 0xC8F6, 0x0000}, + {MISENSOR_16BIT, 0xC8F8, 0x0000}, + {MISENSOR_16BIT, 0xC8FA, 0xE724}, + {MISENSOR_16BIT, 0xC8FC, 0x1583}, + {MISENSOR_16BIT, 0xC8FE, 0x2045}, + {MISENSOR_16BIT, 0xC900, 0x05DC}, + {MISENSOR_16BIT, 0xC902, 0x007C}, + {MISENSOR_8BIT, 0xC90C, 0x80}, + {MISENSOR_8BIT, 0xC90D, 0x80}, + {MISENSOR_8BIT, 0xC90E, 0x80}, + {MISENSOR_8BIT, 0xC90F, 0x88}, + {MISENSOR_8BIT, 0xC910, 0x80}, + {MISENSOR_8BIT, 0xC911, 0x80}, + + /* LOAD=Step7-CPIPE_Preference */ + {MISENSOR_16BIT, 0xC926, 0x0020}, + {MISENSOR_16BIT, 0xC928, 0x009A}, + {MISENSOR_16BIT, 0xC946, 0x0070}, + {MISENSOR_16BIT, 0xC948, 0x00F3}, + {MISENSOR_16BIT, 0xC952, 0x0020}, + {MISENSOR_16BIT, 0xC954, 0x009A}, + {MISENSOR_8BIT, 0xC92A, 0x80}, + {MISENSOR_8BIT, 0xC92B, 0x4B}, + {MISENSOR_8BIT, 0xC92C, 0x00}, + {MISENSOR_8BIT, 0xC92D, 0xFF}, + {MISENSOR_8BIT, 0xC92E, 0x3C}, + {MISENSOR_8BIT, 0xC92F, 0x02}, + {MISENSOR_8BIT, 0xC930, 0x06}, + {MISENSOR_8BIT, 0xC931, 0x64}, + {MISENSOR_8BIT, 0xC932, 0x01}, + {MISENSOR_8BIT, 0xC933, 0x0C}, + {MISENSOR_8BIT, 0xC934, 0x3C}, + {MISENSOR_8BIT, 0xC935, 0x3C}, + {MISENSOR_8BIT, 0xC936, 0x3C}, + {MISENSOR_8BIT, 0xC937, 0x0F}, + {MISENSOR_8BIT, 0xC938, 0x64}, + {MISENSOR_8BIT, 0xC939, 0x64}, + {MISENSOR_8BIT, 0xC93A, 0x64}, + {MISENSOR_8BIT, 0xC93B, 0x32}, + {MISENSOR_16BIT, 0xC93C, 0x0020}, + {MISENSOR_16BIT, 0xC93E, 0x009A}, + {MISENSOR_16BIT, 0xC940, 0x00DC}, + {MISENSOR_8BIT, 0xC942, 0x38}, + {MISENSOR_8BIT, 0xC943, 0x30}, + {MISENSOR_8BIT, 0xC944, 0x50}, + {MISENSOR_8BIT, 0xC945, 0x19}, + {MISENSOR_16BIT, 0xC94A, 0x0230}, + {MISENSOR_16BIT, 0xC94C, 0x0010}, + {MISENSOR_16BIT, 0xC94E, 0x01CD}, + {MISENSOR_8BIT, 0xC950, 0x05}, + {MISENSOR_8BIT, 0xC951, 0x40}, + {MISENSOR_8BIT, 0xC87B, 0x1B}, + {MISENSOR_8BIT, 0xC878, 0x0E}, + {MISENSOR_16BIT, 0xC890, 0x0080}, + {MISENSOR_16BIT, 0xC886, 0x0100}, + {MISENSOR_16BIT, 0xC87C, 0x005A}, + {MISENSOR_8BIT, 0xB42A, 0x05}, + {MISENSOR_8BIT, 0xA80A, 0x20}, + + /* Speed up AE/AWB */ + {MISENSOR_16BIT, 0x098E, 0x2802}, + {MISENSOR_16BIT, 0xA802, 0x0008}, + {MISENSOR_8BIT, 0xC908, 0x01}, + {MISENSOR_8BIT, 0xC879, 0x01}, + {MISENSOR_8BIT, 0xC909, 0x02}, + {MISENSOR_8BIT, 0xA80A, 0x18}, + {MISENSOR_8BIT, 0xA80B, 0x18}, + {MISENSOR_8BIT, 0xAC16, 0x18}, + {MISENSOR_8BIT, 0xC878, 0x0E}, + + {MISENSOR_TOK_TERM, 0, 0} +}; + +#endif +#endif diff --git a/drivers/staging/media/atomisp/i2c/ov2680.h b/drivers/staging/media/atomisp/i2c/ov2680.h new file mode 100644 index 000000000..4e351196f --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/ov2680.h @@ -0,0 +1,917 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Support for OmniVision OV2680 5M camera sensor. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __OV2680_H__ +#define __OV2680_H__ +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/i2c.h> +#include <linux/delay.h> +#include <linux/videodev2.h> +#include <linux/spinlock.h> +#include <media/v4l2-subdev.h> +#include <media/v4l2-device.h> +#include <media/v4l2-ctrls.h> +#include <linux/v4l2-mediabus.h> +#include <media/media-entity.h> + +#include "../include/linux/atomisp_platform.h" + +/* Defines for register writes and register array processing */ +#define I2C_MSG_LENGTH 0x2 +#define I2C_RETRY_COUNT 5 + +#define OV2680_FOCAL_LENGTH_NUM 334 /*3.34mm*/ +#define OV2680_FOCAL_LENGTH_DEM 100 +#define OV2680_F_NUMBER_DEFAULT_NUM 24 +#define OV2680_F_NUMBER_DEM 10 + +#define OV2680_BIN_FACTOR_MAX 4 + +#define MAX_FMTS 1 + +/* sensor_mode_data read_mode adaptation */ +#define OV2680_READ_MODE_BINNING_ON 0x0400 +#define OV2680_READ_MODE_BINNING_OFF 0x00 +#define OV2680_INTEGRATION_TIME_MARGIN 8 + +#define OV2680_MAX_EXPOSURE_VALUE 0xFFF1 +#define OV2680_MAX_GAIN_VALUE 0xFF + +/* + * focal length bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define OV2680_FOCAL_LENGTH_DEFAULT 0x1B70064 + +/* + * current f-number bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define OV2680_F_NUMBER_DEFAULT 0x18000a + +/* + * f-number range bits definition: + * bits 31-24: max f-number numerator + * bits 23-16: max f-number denominator + * bits 15-8: min f-number numerator + * bits 7-0: min f-number denominator + */ +#define OV2680_F_NUMBER_RANGE 0x180a180a +#define OV2680_ID 0x2680 + +#define OV2680_FINE_INTG_TIME_MIN 0 +#define OV2680_FINE_INTG_TIME_MAX_MARGIN 0 +#define OV2680_COARSE_INTG_TIME_MIN 1 +#define OV2680_COARSE_INTG_TIME_MAX_MARGIN 6 + +/* + * OV2680 System control registers + */ +#define OV2680_SW_SLEEP 0x0100 +#define OV2680_SW_RESET 0x0103 +#define OV2680_SW_STREAM 0x0100 + +#define OV2680_SC_CMMN_CHIP_ID_H 0x300A +#define OV2680_SC_CMMN_CHIP_ID_L 0x300B +#define OV2680_SC_CMMN_SCCB_ID 0x302B /* 0x300C*/ +#define OV2680_SC_CMMN_SUB_ID 0x302A /* process, version*/ + +#define OV2680_GROUP_ACCESS 0x3208 /*Bit[7:4] Group control, Bit[3:0] Group ID*/ + +#define OV2680_EXPOSURE_H 0x3500 /*Bit[3:0] Bit[19:16] of exposure, remaining 16 bits lies in Reg0x3501&Reg0x3502*/ +#define OV2680_EXPOSURE_M 0x3501 +#define OV2680_EXPOSURE_L 0x3502 +#define OV2680_AGC_H 0x350A /*Bit[1:0] means Bit[9:8] of gain*/ +#define OV2680_AGC_L 0x350B /*Bit[7:0] of gain*/ + +#define OV2680_HORIZONTAL_START_H 0x3800 /*Bit[11:8]*/ +#define OV2680_HORIZONTAL_START_L 0x3801 /*Bit[7:0]*/ +#define OV2680_VERTICAL_START_H 0x3802 /*Bit[11:8]*/ +#define OV2680_VERTICAL_START_L 0x3803 /*Bit[7:0]*/ +#define OV2680_HORIZONTAL_END_H 0x3804 /*Bit[11:8]*/ +#define OV2680_HORIZONTAL_END_L 0x3805 /*Bit[7:0]*/ +#define OV2680_VERTICAL_END_H 0x3806 /*Bit[11:8]*/ +#define OV2680_VERTICAL_END_L 0x3807 /*Bit[7:0]*/ +#define OV2680_HORIZONTAL_OUTPUT_SIZE_H 0x3808 /*Bit[3:0]*/ +#define OV2680_HORIZONTAL_OUTPUT_SIZE_L 0x3809 /*Bit[7:0]*/ +#define OV2680_VERTICAL_OUTPUT_SIZE_H 0x380a /*Bit[3:0]*/ +#define OV2680_VERTICAL_OUTPUT_SIZE_L 0x380b /*Bit[7:0]*/ +#define OV2680_TIMING_HTS_H 0x380C /*High 8-bit, and low 8-bit HTS address is 0x380d*/ +#define OV2680_TIMING_HTS_L 0x380D /*High 8-bit, and low 8-bit HTS address is 0x380d*/ +#define OV2680_TIMING_VTS_H 0x380e /*High 8-bit, and low 8-bit HTS address is 0x380f*/ +#define OV2680_TIMING_VTS_L 0x380f /*High 8-bit, and low 8-bit HTS address is 0x380f*/ +#define OV2680_FRAME_OFF_NUM 0x4202 + +/*Flip/Mirror*/ +#define OV2680_FLIP_REG 0x3820 +#define OV2680_MIRROR_REG 0x3821 +#define OV2680_FLIP_BIT 1 +#define OV2680_MIRROR_BIT 2 +#define OV2680_FLIP_MIRROR_BIT_ENABLE 4 + +#define OV2680_MWB_RED_GAIN_H 0x5004/*0x3400*/ +#define OV2680_MWB_GREEN_GAIN_H 0x5006/*0x3402*/ +#define OV2680_MWB_BLUE_GAIN_H 0x5008/*0x3404*/ +#define OV2680_MWB_GAIN_MAX 0x0fff + +#define OV2680_START_STREAMING 0x01 +#define OV2680_STOP_STREAMING 0x00 + +#define OV2680_INVALID_CONFIG 0xffffffff + +struct regval_list { + u16 reg_num; + u8 value; +}; + +struct ov2680_resolution { + const struct ov2680_reg *regs; + int res; + int width; + int height; + int fps; + int pix_clk_freq; + u32 skip_frames; + u16 pixels_per_line; + u16 lines_per_frame; + u8 bin_factor_x; + u8 bin_factor_y; + u8 bin_mode; +}; + +struct ov2680_format { + u8 *desc; + u32 pixelformat; + struct ov2680_reg *regs; +}; + +/* + * ov2680 device structure. + */ +struct ov2680_device { + struct v4l2_subdev sd; + struct media_pad pad; + struct mutex input_lock; + struct v4l2_ctrl_handler ctrl_handler; + struct ov2680_resolution *res; + struct camera_sensor_platform_data *platform_data; + bool power_on; + u16 exposure; + u16 gain; + u16 digitgain; +}; + +/** + * struct ov2680_reg - MI sensor register format + * @type: type of the register + * @reg: 16-bit offset to register + * @val: 8/16/32-bit register value + * + * Define a structure for sensor register initialization values + */ +struct ov2680_reg { + u16 reg; + u32 val; /* @set value for read/mod/write, @mask */ +}; + +#define to_ov2680_sensor(x) container_of(x, struct ov2680_device, sd) + +#define OV2680_MAX_WRITE_BUF_SIZE 30 + +struct ov2680_write_buffer { + u16 addr; + u8 data[OV2680_MAX_WRITE_BUF_SIZE]; +}; + +struct ov2680_write_ctrl { + int index; + struct ov2680_write_buffer buffer; +}; + +static struct ov2680_reg const ov2680_global_setting[] = { + {0x0103, 0x01}, + {0x3002, 0x00}, + {0x3016, 0x1c}, + {0x3018, 0x44}, + {0x3020, 0x00}, + {0x3080, 0x02}, + {0x3082, 0x45}, + {0x3084, 0x09}, + {0x3085, 0x04}, + {0x3503, 0x03}, + {0x350b, 0x36}, + {0x3600, 0xb4}, + {0x3603, 0x39}, + {0x3604, 0x24}, + {0x3605, 0x00}, + {0x3620, 0x26}, + {0x3621, 0x37}, + {0x3622, 0x04}, + {0x3628, 0x00}, + {0x3705, 0x3c}, + {0x370c, 0x50}, + {0x370d, 0xc0}, + {0x3718, 0x88}, + {0x3720, 0x00}, + {0x3721, 0x00}, + {0x3722, 0x00}, + {0x3723, 0x00}, + {0x3738, 0x00}, + {0x3717, 0x58}, + {0x3781, 0x80}, + {0x3789, 0x60}, + {0x3800, 0x00}, + {0x3819, 0x04}, + {0x4000, 0x81}, + {0x4001, 0x40}, + {0x4602, 0x02}, + {0x481f, 0x36}, + {0x4825, 0x36}, + {0x4837, 0x18}, + {0x5002, 0x30}, + {0x5004, 0x04},//manual awb 1x + {0x5005, 0x00}, + {0x5006, 0x04}, + {0x5007, 0x00}, + {0x5008, 0x04}, + {0x5009, 0x00}, + {0x5080, 0x00}, + {0x3701, 0x64}, //add on 14/05/13 + {0x3784, 0x0c}, //based OV2680_R1A_AM10.ovt add on 14/06/13 + {0x5780, 0x3e}, //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13 + {0x5781, 0x0f}, + {0x5782, 0x04}, + {0x5783, 0x02}, + {0x5784, 0x01}, + {0x5785, 0x01}, + {0x5786, 0x00}, + {0x5787, 0x04}, + {0x5788, 0x02}, + {0x5789, 0x00}, + {0x578a, 0x01}, + {0x578b, 0x02}, + {0x578c, 0x03}, + {0x578d, 0x03}, + {0x578e, 0x08}, + {0x578f, 0x0c}, + {0x5790, 0x08}, + {0x5791, 0x04}, + {0x5792, 0x00}, + {0x5793, 0x00}, + {0x5794, 0x03}, //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13 + {0x0100, 0x00}, //stream off + + {} +}; + +/* + * 176x144 30fps VBlanking 1lane 10Bit (binning) + */ +static struct ov2680_reg const ov2680_QCIF_30fps[] = { + {0x3086, 0x01}, + {0x370a, 0x23}, + {0x3801, 0xa0}, + {0x3802, 0x00}, + {0x3803, 0x78}, + {0x3804, 0x05}, + {0x3805, 0xaf}, + {0x3806, 0x04}, + {0x3807, 0x47}, + {0x3808, 0x00}, + {0x3809, 0xC0}, + {0x380a, 0x00}, + {0x380b, 0xa0}, + {0x380c, 0x06}, + {0x380d, 0xb0}, + {0x3810, 0x00}, + {0x3811, 0x04}, + {0x3812, 0x00}, + {0x3813, 0x04}, + {0x3814, 0x31}, + {0x3815, 0x31}, + {0x4000, 0x81}, + {0x4001, 0x40}, + {0x4008, 0x00}, + {0x4009, 0x03}, + {0x5081, 0x41}, + {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x10}, + {0x5705, 0xa0}, + {0x5706, 0x0c}, + {0x5707, 0x78}, + {0x3820, 0xc2}, + {0x3821, 0x01}, + // {0x5090, 0x0c}, + {} +}; + +/* + * 352x288 30fps VBlanking 1lane 10Bit (binning) + */ +static struct ov2680_reg const ov2680_CIF_30fps[] = { + {0x3086, 0x01}, + {0x370a, 0x23}, + {0x3801, 0xa0}, + {0x3802, 0x00}, + {0x3803, 0x78}, + {0x3804, 0x03}, + {0x3805, 0x8f}, + {0x3806, 0x02}, + {0x3807, 0xe7}, + {0x3808, 0x01}, + {0x3809, 0x70}, + {0x380a, 0x01}, + {0x380b, 0x30}, + {0x380c, 0x06}, + {0x380d, 0xb0}, + {0x3810, 0x00}, + {0x3811, 0x04}, + {0x3812, 0x00}, + {0x3813, 0x04}, + {0x3814, 0x31}, + {0x3815, 0x31}, + {0x4008, 0x00}, + {0x4009, 0x03}, + {0x5081, 0x41}, + {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x10}, + {0x5705, 0xa0}, + {0x5706, 0x0c}, + {0x5707, 0x78}, + {0x3820, 0xc2}, + {0x3821, 0x01}, + // {0x5090, 0x0c}, + {} +}; + +/* + * 336x256 30fps VBlanking 1lane 10Bit (binning) + */ +static struct ov2680_reg const ov2680_QVGA_30fps[] = { + {0x3086, 0x01}, + {0x370a, 0x23}, + {0x3801, 0xa0}, + {0x3802, 0x00}, + {0x3803, 0x78}, + {0x3804, 0x03}, + {0x3805, 0x4f}, + {0x3806, 0x02}, + {0x3807, 0x87}, + {0x3808, 0x01}, + {0x3809, 0x50}, + {0x380a, 0x01}, + {0x380b, 0x00}, + {0x380c, 0x06}, + {0x380d, 0xb0}, + {0x3810, 0x00}, + {0x3811, 0x04}, + {0x3812, 0x00}, + {0x3813, 0x04}, + {0x3814, 0x31}, + {0x3815, 0x31}, + {0x4008, 0x00}, + {0x4009, 0x03}, + {0x5081, 0x41}, + {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x10}, + {0x5705, 0xa0}, + {0x5706, 0x0c}, + {0x5707, 0x78}, + {0x3820, 0xc2}, + {0x3821, 0x01}, + // {0x5090, 0x0c}, + {} +}; + +/* + * 656x496 30fps VBlanking 1lane 10Bit (binning) + */ +static struct ov2680_reg const ov2680_656x496_30fps[] = { + {0x3086, 0x01}, + {0x370a, 0x23}, + {0x3801, 0xa0}, + {0x3802, 0x00}, + {0x3803, 0x78}, + {0x3804, 0x05}, + {0x3805, 0xcf}, + {0x3806, 0x04}, + {0x3807, 0x67}, + {0x3808, 0x02}, + {0x3809, 0x90}, + {0x380a, 0x01}, + {0x380b, 0xf0}, + {0x380c, 0x06}, + {0x380d, 0xb0}, + {0x3810, 0x00}, + {0x3811, 0x04}, + {0x3812, 0x00}, + {0x3813, 0x04}, + {0x3814, 0x31}, + {0x3815, 0x31}, + {0x4008, 0x00}, + {0x4009, 0x03}, + {0x5081, 0x41}, + {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x10}, + {0x5705, 0xa0}, + {0x5706, 0x0c}, + {0x5707, 0x78}, + {0x3820, 0xc2}, + {0x3821, 0x01}, + // {0x5090, 0x0c}, + {} +}; + +/* + * 720x592 30fps VBlanking 1lane 10Bit (binning) + */ +static struct ov2680_reg const ov2680_720x592_30fps[] = { + {0x3086, 0x01}, + {0x370a, 0x23}, + {0x3801, 0x00}, // X_ADDR_START; + {0x3802, 0x00}, + {0x3803, 0x00}, // Y_ADDR_START; + {0x3804, 0x05}, + {0x3805, 0xaf}, // X_ADDR_END; + {0x3806, 0x04}, + {0x3807, 0xaf}, // Y_ADDR_END; + {0x3808, 0x02}, + {0x3809, 0xd0}, // X_OUTPUT_SIZE; + {0x380a, 0x02}, + {0x380b, 0x50}, // Y_OUTPUT_SIZE; + {0x380c, 0x06}, + {0x380d, 0xac}, // HTS; + {0x3810, 0x00}, + {0x3811, 0x00}, + {0x3812, 0x00}, + {0x3813, 0x00}, + {0x3814, 0x31}, + {0x3815, 0x31}, + {0x4008, 0x00}, + {0x4009, 0x03}, + {0x5708, 0x00}, + {0x5704, 0x02}, + {0x5705, 0xd0}, // X_WIN; + {0x5706, 0x02}, + {0x5707, 0x50}, // Y_WIN; + {0x3820, 0xc2}, // FLIP_FORMAT; + {0x3821, 0x01}, // MIRROR_FORMAT; + {0x5090, 0x00}, // PRE ISP CTRL16, default value is 0x0C; + // BIT[3]: Mirror order, BG or GB; + // BIT[2]: Flip order, BR or RB; + {0x5081, 0x41}, + {} +}; + +/* + * 800x600 30fps VBlanking 1lane 10Bit (binning) + */ +static struct ov2680_reg const ov2680_800x600_30fps[] = { + {0x3086, 0x01}, + {0x370a, 0x23}, + {0x3801, 0x00}, + {0x3802, 0x00}, + {0x3803, 0x00}, + {0x3804, 0x06}, + {0x3805, 0x4f}, + {0x3806, 0x04}, + {0x3807, 0xbf}, + {0x3808, 0x03}, + {0x3809, 0x20}, + {0x380a, 0x02}, + {0x380b, 0x58}, + {0x380c, 0x06}, + {0x380d, 0xac}, + {0x3810, 0x00}, + {0x3811, 0x00}, + {0x3812, 0x00}, + {0x3813, 0x00}, + {0x3814, 0x31}, + {0x3815, 0x31}, + {0x5708, 0x00}, + {0x5704, 0x03}, + {0x5705, 0x20}, + {0x5706, 0x02}, + {0x5707, 0x58}, + {0x3820, 0xc2}, + {0x3821, 0x01}, + {0x5090, 0x00}, + {0x4008, 0x00}, + {0x4009, 0x03}, + {0x5081, 0x41}, + {} +}; + +/* + * 720p=1280*720 30fps VBlanking 1lane 10Bit (no-Scaling) + */ +static struct ov2680_reg const ov2680_720p_30fps[] = { + {0x3086, 0x00}, + {0x370a, 0x21}, + {0x3801, 0xa0}, + {0x3802, 0x00}, + {0x3803, 0xf2}, + {0x3804, 0x05}, + {0x3805, 0xbf}, + {0x3806, 0x03}, + {0x3807, 0xdd}, + {0x3808, 0x05}, + {0x3809, 0x10}, + {0x380a, 0x02}, + {0x380b, 0xe0}, + {0x380c, 0x06}, + {0x380d, 0xa8}, + {0x3810, 0x00}, + {0x3811, 0x08}, + {0x3812, 0x00}, + {0x3813, 0x06}, + {0x3814, 0x11}, + {0x3815, 0x11}, + {0x4008, 0x02}, + {0x4009, 0x09}, + {0x5081, 0x41}, + {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x10}, + {0x5705, 0xa0}, + {0x5706, 0x0c}, + {0x5707, 0x78}, + {0x3820, 0xc0}, + {0x3821, 0x00}, + // {0x5090, 0x0c}, + {} +}; + +/* + * 1296x976 30fps VBlanking 1lane 10Bit(no-scaling) + */ +static struct ov2680_reg const ov2680_1296x976_30fps[] = { + {0x3086, 0x00}, + {0x370a, 0x21}, + {0x3801, 0xa0}, + {0x3802, 0x00}, + {0x3803, 0x78}, + {0x3804, 0x05}, + {0x3805, 0xbf}, + {0x3806, 0x04}, + {0x3807, 0x57}, + {0x3808, 0x05}, + {0x3809, 0x10}, + {0x380a, 0x03}, + {0x380b, 0xd0}, + {0x380c, 0x06}, + {0x380d, 0xa8}, + {0x3810, 0x00}, + {0x3811, 0x08}, + {0x3812, 0x00}, + {0x3813, 0x08}, + {0x3814, 0x11}, + {0x3815, 0x11}, + {0x4008, 0x02}, + {0x4009, 0x09}, + {0x5081, 0x41}, + {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x10}, + {0x5705, 0xa0}, + {0x5706, 0x0c}, + {0x5707, 0x78}, + {0x3820, 0xc0}, + {0x3821, 0x00}, //mirror/flip + // {0x5090, 0x0c}, + {} +}; + +/* + * 1456*1096 30fps VBlanking 1lane 10bit(no-scaling) + */ +static struct ov2680_reg const ov2680_1456x1096_30fps[] = { + {0x3086, 0x00}, + {0x370a, 0x21}, + {0x3801, 0x90}, + {0x3802, 0x00}, + {0x3803, 0x78}, + {0x3804, 0x06}, + {0x3805, 0x4f}, + {0x3806, 0x04}, + {0x3807, 0xC0}, + {0x3808, 0x05}, + {0x3809, 0xb0}, + {0x380a, 0x04}, + {0x380b, 0x48}, + {0x380c, 0x06}, + {0x380d, 0xa8}, + {0x3810, 0x00}, + {0x3811, 0x08}, + {0x3812, 0x00}, + {0x3813, 0x00}, + {0x3814, 0x11}, + {0x3815, 0x11}, + {0x4008, 0x02}, + {0x4009, 0x09}, + {0x5081, 0x41}, + {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x10}, + {0x5705, 0xa0}, + {0x5706, 0x0c}, + {0x5707, 0x78}, + {0x3820, 0xc0}, + {0x3821, 0x00}, + // {0x5090, 0x0c}, + {} +}; + +/* + *1616x916 30fps VBlanking 1lane 10bit + */ + +static struct ov2680_reg const ov2680_1616x916_30fps[] = { + {0x3086, 0x00}, + {0x370a, 0x21}, + {0x3801, 0x00}, + {0x3802, 0x00}, + {0x3803, 0x96}, + {0x3804, 0x06}, + {0x3805, 0x4f}, + {0x3806, 0x04}, + {0x3807, 0x39}, + {0x3808, 0x06}, + {0x3809, 0x50}, + {0x380a, 0x03}, + {0x380b, 0x94}, + {0x380c, 0x06}, + {0x380d, 0xa8}, + {0x3810, 0x00}, + {0x3811, 0x00}, + {0x3812, 0x00}, + {0x3813, 0x08}, + {0x3814, 0x11}, + {0x3815, 0x11}, + {0x4008, 0x02}, + {0x4009, 0x09}, + {0x5081, 0x41}, + {0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x06}, + {0x5705, 0x50}, + {0x5706, 0x03}, + {0x5707, 0x94}, + {0x3820, 0xc0}, + {0x3821, 0x00}, + // {0x5090, 0x0C}, + {} +}; + +/* + * 1616x1082 30fps VBlanking 1lane 10Bit + */ +static struct ov2680_reg const ov2680_1616x1082_30fps[] = { + {0x3086, 0x00}, + {0x370a, 0x21}, + {0x3801, 0x00}, + {0x3802, 0x00}, + {0x3803, 0x86}, + {0x3804, 0x06}, + {0x3805, 0x4f}, + {0x3806, 0x04}, + {0x3807, 0xbf}, + {0x3808, 0x06}, + {0x3809, 0x50}, + {0x380a, 0x04}, + {0x380b, 0x3a}, + {0x380c, 0x06}, + {0x380d, 0xa8}, + {0x3810, 0x00}, + {0x3811, 0x00}, + {0x3812, 0x00}, + {0x3813, 0x00}, + {0x3814, 0x11}, + {0x3815, 0x11}, + {0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x06}, + {0x5705, 0x50}, + {0x5706, 0x04}, + {0x5707, 0x3a}, + {0x3820, 0xc0}, + {0x3821, 0x00}, + // {0x5090, 0x0C}, + {0x4008, 0x02}, + {0x4009, 0x09}, + {0x5081, 0x41}, + {} +}; + +/* + * 1616x1216 30fps VBlanking 1lane 10Bit + */ +static struct ov2680_reg const ov2680_1616x1216_30fps[] = { + {0x3086, 0x00}, + {0x370a, 0x21}, + {0x3801, 0x00}, + {0x3802, 0x00}, + {0x3803, 0x00}, + {0x3804, 0x06}, + {0x3805, 0x4f}, + {0x3806, 0x04}, + {0x3807, 0xbf}, + {0x3808, 0x06}, + {0x3809, 0x50},//50},//4line for mirror and flip + {0x380a, 0x04}, + {0x380b, 0xc0},//c0}, + {0x380c, 0x06}, + {0x380d, 0xa8}, + {0x3810, 0x00}, + {0x3811, 0x00}, + {0x3812, 0x00}, + {0x3813, 0x00}, + {0x3814, 0x11}, + {0x3815, 0x11}, + {0x4008, 0x00}, + {0x4009, 0x0b}, + {0x5081, 0x01}, + {0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x06}, + {0x5705, 0x50}, + {0x5706, 0x04}, + {0x5707, 0xcc}, + {0x3820, 0xc0}, + {0x3821, 0x00}, + // {0x5090, 0x0C}, + {} +}; + +static struct ov2680_resolution ov2680_res_preview[] = { + { + .width = 1616, + .height = 1216, + .pix_clk_freq = 66, + .fps = 30, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_1616x1216_30fps, + }, + { + .width = 1616, + .height = 1082, + .pix_clk_freq = 66, + .fps = 30, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_1616x1082_30fps, + }, + { + .width = 1616, + .height = 916, + .fps = 30, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_1616x916_30fps, + }, + { + .width = 1456, + .height = 1096, + .fps = 30, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_1456x1096_30fps, + }, + { + .width = 1296, + .height = 976, + .fps = 30, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_1296x976_30fps, + }, + { + .width = 1280, + .height = 720, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_720p_30fps, + }, + { + .width = 800, + .height = 600, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_800x600_30fps, + }, + { + .width = 720, + .height = 592, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_720x592_30fps, + }, + { + .width = 656, + .height = 496, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_656x496_30fps, + }, + { + .width = 336, + .height = 256, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_QVGA_30fps, + }, + { + .width = 352, + .height = 288, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_CIF_30fps, + }, + { + .width = 176, + .height = 144, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_QCIF_30fps, + }, +}; + +#define N_RES_PREVIEW (ARRAY_SIZE(ov2680_res_preview)) + +#endif diff --git a/drivers/staging/media/atomisp/i2c/ov2722.h b/drivers/staging/media/atomisp/i2c/ov2722.h new file mode 100644 index 000000000..d6e2510bc --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/ov2722.h @@ -0,0 +1,1272 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Support for OmniVision OV2722 1080p HD camera sensor. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __OV2722_H__ +#define __OV2722_H__ +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/i2c.h> +#include <linux/delay.h> +#include <linux/videodev2.h> +#include <linux/spinlock.h> +#include <media/v4l2-subdev.h> +#include <media/v4l2-device.h> +#include <linux/v4l2-mediabus.h> +#include <media/media-entity.h> +#include <media/v4l2-ctrls.h> + +#include "../include/linux/atomisp_platform.h" + +#define OV2722_POWER_UP_RETRY_NUM 5 + +/* Defines for register writes and register array processing */ +#define I2C_MSG_LENGTH 0x2 +#define I2C_RETRY_COUNT 5 + +#define OV2722_FOCAL_LENGTH_NUM 278 /*2.78mm*/ +#define OV2722_FOCAL_LENGTH_DEM 100 +#define OV2722_F_NUMBER_DEFAULT_NUM 26 +#define OV2722_F_NUMBER_DEM 10 + +#define MAX_FMTS 1 + +/* + * focal length bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define OV2722_FOCAL_LENGTH_DEFAULT 0x1160064 + +/* + * current f-number bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define OV2722_F_NUMBER_DEFAULT 0x1a000a + +/* + * f-number range bits definition: + * bits 31-24: max f-number numerator + * bits 23-16: max f-number denominator + * bits 15-8: min f-number numerator + * bits 7-0: min f-number denominator + */ +#define OV2722_F_NUMBER_RANGE 0x1a0a1a0a +#define OV2720_ID 0x2720 +#define OV2722_ID 0x2722 + +#define OV2722_FINE_INTG_TIME_MIN 0 +#define OV2722_FINE_INTG_TIME_MAX_MARGIN 0 +#define OV2722_COARSE_INTG_TIME_MIN 1 +#define OV2722_COARSE_INTG_TIME_MAX_MARGIN 4 + +/* + * OV2722 System control registers + */ +#define OV2722_SW_SLEEP 0x0100 +#define OV2722_SW_RESET 0x0103 +#define OV2722_SW_STREAM 0x0100 + +#define OV2722_SC_CMMN_CHIP_ID_H 0x300A +#define OV2722_SC_CMMN_CHIP_ID_L 0x300B +#define OV2722_SC_CMMN_SCCB_ID 0x300C +#define OV2722_SC_CMMN_SUB_ID 0x302A /* process, version*/ + +#define OV2722_SC_CMMN_PAD_OEN0 0x3000 +#define OV2722_SC_CMMN_PAD_OEN1 0x3001 +#define OV2722_SC_CMMN_PAD_OEN2 0x3002 +#define OV2722_SC_CMMN_PAD_OUT0 0x3008 +#define OV2722_SC_CMMN_PAD_OUT1 0x3009 +#define OV2722_SC_CMMN_PAD_OUT2 0x300D +#define OV2722_SC_CMMN_PAD_SEL0 0x300E +#define OV2722_SC_CMMN_PAD_SEL1 0x300F +#define OV2722_SC_CMMN_PAD_SEL2 0x3010 + +#define OV2722_SC_CMMN_PAD_PK 0x3011 +#define OV2722_SC_CMMN_A_PWC_PK_O_13 0x3013 +#define OV2722_SC_CMMN_A_PWC_PK_O_14 0x3014 + +#define OV2722_SC_CMMN_CLKRST0 0x301A +#define OV2722_SC_CMMN_CLKRST1 0x301B +#define OV2722_SC_CMMN_CLKRST2 0x301C +#define OV2722_SC_CMMN_CLKRST3 0x301D +#define OV2722_SC_CMMN_CLKRST4 0x301E +#define OV2722_SC_CMMN_CLKRST5 0x3005 +#define OV2722_SC_CMMN_PCLK_DIV_CTRL 0x3007 +#define OV2722_SC_CMMN_CLOCK_SEL 0x3020 +#define OV2722_SC_SOC_CLKRST5 0x3040 + +#define OV2722_SC_CMMN_PLL_CTRL0 0x3034 +#define OV2722_SC_CMMN_PLL_CTRL1 0x3035 +#define OV2722_SC_CMMN_PLL_CTRL2 0x3039 +#define OV2722_SC_CMMN_PLL_CTRL3 0x3037 +#define OV2722_SC_CMMN_PLL_MULTIPLIER 0x3036 +#define OV2722_SC_CMMN_PLL_DEBUG_OPT 0x3038 +#define OV2722_SC_CMMN_PLLS_CTRL0 0x303A +#define OV2722_SC_CMMN_PLLS_CTRL1 0x303B +#define OV2722_SC_CMMN_PLLS_CTRL2 0x303C +#define OV2722_SC_CMMN_PLLS_CTRL3 0x303D + +#define OV2722_SC_CMMN_MIPI_PHY_16 0x3016 +#define OV2722_SC_CMMN_MIPI_PHY_17 0x3017 +#define OV2722_SC_CMMN_MIPI_SC_CTRL_18 0x3018 +#define OV2722_SC_CMMN_MIPI_SC_CTRL_19 0x3019 +#define OV2722_SC_CMMN_MIPI_SC_CTRL_21 0x3021 +#define OV2722_SC_CMMN_MIPI_SC_CTRL_22 0x3022 + +#define OV2722_AEC_PK_EXPO_H 0x3500 +#define OV2722_AEC_PK_EXPO_M 0x3501 +#define OV2722_AEC_PK_EXPO_L 0x3502 +#define OV2722_AEC_MANUAL_CTRL 0x3503 +#define OV2722_AGC_ADJ_H 0x3508 +#define OV2722_AGC_ADJ_L 0x3509 +#define OV2722_VTS_DIFF_H 0x350c +#define OV2722_VTS_DIFF_L 0x350d +#define OV2722_GROUP_ACCESS 0x3208 +#define OV2722_HTS_H 0x380c +#define OV2722_HTS_L 0x380d +#define OV2722_VTS_H 0x380e +#define OV2722_VTS_L 0x380f + +#define OV2722_MWB_GAIN_R_H 0x5186 +#define OV2722_MWB_GAIN_R_L 0x5187 +#define OV2722_MWB_GAIN_G_H 0x5188 +#define OV2722_MWB_GAIN_G_L 0x5189 +#define OV2722_MWB_GAIN_B_H 0x518a +#define OV2722_MWB_GAIN_B_L 0x518b + +#define OV2722_H_CROP_START_H 0x3800 +#define OV2722_H_CROP_START_L 0x3801 +#define OV2722_V_CROP_START_H 0x3802 +#define OV2722_V_CROP_START_L 0x3803 +#define OV2722_H_CROP_END_H 0x3804 +#define OV2722_H_CROP_END_L 0x3805 +#define OV2722_V_CROP_END_H 0x3806 +#define OV2722_V_CROP_END_L 0x3807 +#define OV2722_H_OUTSIZE_H 0x3808 +#define OV2722_H_OUTSIZE_L 0x3809 +#define OV2722_V_OUTSIZE_H 0x380a +#define OV2722_V_OUTSIZE_L 0x380b + +#define OV2722_START_STREAMING 0x01 +#define OV2722_STOP_STREAMING 0x00 + +struct regval_list { + u16 reg_num; + u8 value; +}; + +struct ov2722_resolution { + u8 *desc; + const struct ov2722_reg *regs; + int res; + int width; + int height; + int fps; + int pix_clk_freq; + u32 skip_frames; + u16 pixels_per_line; + u16 lines_per_frame; + u8 bin_factor_x; + u8 bin_factor_y; + u8 bin_mode; + bool used; + int mipi_freq; +}; + +struct ov2722_format { + u8 *desc; + u32 pixelformat; + struct ov2722_reg *regs; +}; + +/* + * ov2722 device structure. + */ +struct ov2722_device { + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_mbus_framefmt format; + struct mutex input_lock; + struct ov2722_resolution *res; + + struct camera_sensor_platform_data *platform_data; + int vt_pix_clk_freq_mhz; + int run_mode; + u16 pixels_per_line; + u16 lines_per_frame; + u8 type; + + struct v4l2_ctrl_handler ctrl_handler; + struct v4l2_ctrl *link_freq; +}; + +enum ov2722_tok_type { + OV2722_8BIT = 0x0001, + OV2722_16BIT = 0x0002, + OV2722_32BIT = 0x0004, + OV2722_TOK_TERM = 0xf000, /* terminating token for reg list */ + OV2722_TOK_DELAY = 0xfe00, /* delay token for reg list */ + OV2722_TOK_MASK = 0xfff0 +}; + +/** + * struct ov2722_reg - MI sensor register format + * @type: type of the register + * @reg: 16-bit offset to register + * @val: 8/16/32-bit register value + * + * Define a structure for sensor register initialization values + */ +struct ov2722_reg { + enum ov2722_tok_type type; + u16 reg; + u32 val; /* @set value for read/mod/write, @mask */ +}; + +#define to_ov2722_sensor(x) container_of(x, struct ov2722_device, sd) + +#define OV2722_MAX_WRITE_BUF_SIZE 30 + +struct ov2722_write_buffer { + u16 addr; + u8 data[OV2722_MAX_WRITE_BUF_SIZE]; +}; + +struct ov2722_write_ctrl { + int index; + struct ov2722_write_buffer buffer; +}; + +/* + * Register settings for various resolution + */ +#if 0 +static struct ov2722_reg const ov2722_QVGA_30fps[] = { + {OV2722_8BIT, 0x3718, 0x10}, + {OV2722_8BIT, 0x3702, 0x0c}, + {OV2722_8BIT, 0x373a, 0x1c}, + {OV2722_8BIT, 0x3715, 0x01}, + {OV2722_8BIT, 0x3703, 0x0c}, + {OV2722_8BIT, 0x3705, 0x06}, + {OV2722_8BIT, 0x3730, 0x0e}, + {OV2722_8BIT, 0x3704, 0x1c}, + {OV2722_8BIT, 0x3f06, 0x00}, + {OV2722_8BIT, 0x371c, 0x00}, + {OV2722_8BIT, 0x371d, 0x46}, + {OV2722_8BIT, 0x371e, 0x00}, + {OV2722_8BIT, 0x371f, 0x63}, + {OV2722_8BIT, 0x3708, 0x61}, + {OV2722_8BIT, 0x3709, 0x12}, + {OV2722_8BIT, 0x3800, 0x01}, + {OV2722_8BIT, 0x3801, 0x42}, /* H crop start: 322 */ + {OV2722_8BIT, 0x3802, 0x00}, + {OV2722_8BIT, 0x3803, 0x20}, /* V crop start: 32 */ + {OV2722_8BIT, 0x3804, 0x06}, + {OV2722_8BIT, 0x3805, 0x95}, /* H crop end: 1685 */ + {OV2722_8BIT, 0x3806, 0x04}, + {OV2722_8BIT, 0x3807, 0x27}, /* V crop end: 1063 */ + {OV2722_8BIT, 0x3808, 0x01}, + {OV2722_8BIT, 0x3809, 0x50}, /* H output size: 336 */ + {OV2722_8BIT, 0x380a, 0x01}, + {OV2722_8BIT, 0x380b, 0x00}, /* V output size: 256 */ + + /* H blank timing */ + {OV2722_8BIT, 0x380c, 0x08}, + {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */ + {OV2722_8BIT, 0x380e, 0x04}, + {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */ + {OV2722_8BIT, 0x3810, 0x00}, + {OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */ + {OV2722_8BIT, 0x3812, 0x00}, + {OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */ + {OV2722_8BIT, 0x3820, 0xc0}, + {OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/ + {OV2722_8BIT, 0x3814, 0x71}, + {OV2722_8BIT, 0x3815, 0x71}, + {OV2722_8BIT, 0x3612, 0x49}, + {OV2722_8BIT, 0x3618, 0x00}, + {OV2722_8BIT, 0x3a08, 0x01}, + {OV2722_8BIT, 0x3a09, 0xc3}, + {OV2722_8BIT, 0x3a0a, 0x01}, + {OV2722_8BIT, 0x3a0b, 0x77}, + {OV2722_8BIT, 0x3a0d, 0x00}, + {OV2722_8BIT, 0x3a0e, 0x00}, + {OV2722_8BIT, 0x4520, 0x09}, + {OV2722_8BIT, 0x4837, 0x1b}, + {OV2722_8BIT, 0x3000, 0xff}, + {OV2722_8BIT, 0x3001, 0xff}, + {OV2722_8BIT, 0x3002, 0xf0}, + {OV2722_8BIT, 0x3600, 0x08}, + {OV2722_8BIT, 0x3621, 0xc0}, + {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */ + {OV2722_8BIT, 0x3633, 0x63}, + {OV2722_8BIT, 0x3634, 0x24}, + {OV2722_8BIT, 0x3f01, 0x0c}, + {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */ + {OV2722_8BIT, 0x3614, 0xf0}, + {OV2722_8BIT, 0x3630, 0x2d}, + {OV2722_8BIT, 0x370b, 0x62}, + {OV2722_8BIT, 0x3706, 0x61}, + {OV2722_8BIT, 0x4000, 0x02}, + {OV2722_8BIT, 0x4002, 0xc5}, + {OV2722_8BIT, 0x4005, 0x08}, + {OV2722_8BIT, 0x404f, 0x84}, + {OV2722_8BIT, 0x4051, 0x00}, + {OV2722_8BIT, 0x5000, 0xff}, + {OV2722_8BIT, 0x3a18, 0x00}, + {OV2722_8BIT, 0x3a19, 0x80}, + {OV2722_8BIT, 0x4521, 0x00}, + {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */ + {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */ + {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */ + {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */ + {OV2722_8BIT, 0x370c, 0x0c}, + {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */ + {OV2722_8BIT, 0x3035, 0x00}, + {OV2722_8BIT, 0x3036, 0x26}, + {OV2722_8BIT, 0x3037, 0xa1}, + {OV2722_8BIT, 0x303e, 0x19}, + {OV2722_8BIT, 0x3038, 0x06}, + {OV2722_8BIT, 0x3018, 0x04}, + + /* Added for power optimization */ + {OV2722_8BIT, 0x3000, 0x00}, + {OV2722_8BIT, 0x3001, 0x00}, + {OV2722_8BIT, 0x3002, 0x00}, + {OV2722_8BIT, 0x3a0f, 0x40}, + {OV2722_8BIT, 0x3a10, 0x38}, + {OV2722_8BIT, 0x3a1b, 0x48}, + {OV2722_8BIT, 0x3a1e, 0x30}, + {OV2722_8BIT, 0x3a11, 0x90}, + {OV2722_8BIT, 0x3a1f, 0x10}, + {OV2722_8BIT, 0x3011, 0x22}, + {OV2722_8BIT, 0x3a00, 0x58}, + {OV2722_8BIT, 0x3503, 0x17}, + {OV2722_8BIT, 0x3500, 0x00}, + {OV2722_8BIT, 0x3501, 0x46}, + {OV2722_8BIT, 0x3502, 0x00}, + {OV2722_8BIT, 0x3508, 0x00}, + {OV2722_8BIT, 0x3509, 0x10}, + {OV2722_TOK_TERM, 0, 0}, + +}; + +static struct ov2722_reg const ov2722_480P_30fps[] = { + {OV2722_8BIT, 0x3718, 0x10}, + {OV2722_8BIT, 0x3702, 0x18}, + {OV2722_8BIT, 0x373a, 0x3c}, + {OV2722_8BIT, 0x3715, 0x01}, + {OV2722_8BIT, 0x3703, 0x1d}, + {OV2722_8BIT, 0x3705, 0x12}, + {OV2722_8BIT, 0x3730, 0x1f}, + {OV2722_8BIT, 0x3704, 0x3f}, + {OV2722_8BIT, 0x3f06, 0x1d}, + {OV2722_8BIT, 0x371c, 0x00}, + {OV2722_8BIT, 0x371d, 0x83}, + {OV2722_8BIT, 0x371e, 0x00}, + {OV2722_8BIT, 0x371f, 0xbd}, + {OV2722_8BIT, 0x3708, 0x63}, + {OV2722_8BIT, 0x3709, 0x52}, + {OV2722_8BIT, 0x3800, 0x00}, + {OV2722_8BIT, 0x3801, 0xf2}, /* H crop start: 322 - 80 = 242*/ + {OV2722_8BIT, 0x3802, 0x00}, + {OV2722_8BIT, 0x3803, 0x20}, /* V crop start: 32*/ + {OV2722_8BIT, 0x3804, 0x06}, + {OV2722_8BIT, 0x3805, 0xBB}, /* H crop end: 1643 + 80 = 1723*/ + {OV2722_8BIT, 0x3806, 0x04}, + {OV2722_8BIT, 0x3807, 0x03}, /* V crop end: 1027*/ + {OV2722_8BIT, 0x3808, 0x02}, + {OV2722_8BIT, 0x3809, 0xE0}, /* H output size: 656 +80 = 736*/ + {OV2722_8BIT, 0x380a, 0x01}, + {OV2722_8BIT, 0x380b, 0xF0}, /* V output size: 496 */ + + /* H blank timing */ + {OV2722_8BIT, 0x380c, 0x08}, + {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */ + {OV2722_8BIT, 0x380e, 0x04}, + {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */ + {OV2722_8BIT, 0x3810, 0x00}, + {OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */ + {OV2722_8BIT, 0x3812, 0x00}, + {OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */ + {OV2722_8BIT, 0x3820, 0x80}, + {OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/ + {OV2722_8BIT, 0x3814, 0x31}, + {OV2722_8BIT, 0x3815, 0x31}, + {OV2722_8BIT, 0x3612, 0x4b}, + {OV2722_8BIT, 0x3618, 0x04}, + {OV2722_8BIT, 0x3a08, 0x02}, + {OV2722_8BIT, 0x3a09, 0x67}, + {OV2722_8BIT, 0x3a0a, 0x02}, + {OV2722_8BIT, 0x3a0b, 0x00}, + {OV2722_8BIT, 0x3a0d, 0x00}, + {OV2722_8BIT, 0x3a0e, 0x00}, + {OV2722_8BIT, 0x4520, 0x0a}, + {OV2722_8BIT, 0x4837, 0x1b}, + {OV2722_8BIT, 0x3000, 0xff}, + {OV2722_8BIT, 0x3001, 0xff}, + {OV2722_8BIT, 0x3002, 0xf0}, + {OV2722_8BIT, 0x3600, 0x08}, + {OV2722_8BIT, 0x3621, 0xc0}, + {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */ + {OV2722_8BIT, 0x3633, 0x63}, + {OV2722_8BIT, 0x3634, 0x24}, + {OV2722_8BIT, 0x3f01, 0x0c}, + {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */ + {OV2722_8BIT, 0x3614, 0xf0}, + {OV2722_8BIT, 0x3630, 0x2d}, + {OV2722_8BIT, 0x370b, 0x62}, + {OV2722_8BIT, 0x3706, 0x61}, + {OV2722_8BIT, 0x4000, 0x02}, + {OV2722_8BIT, 0x4002, 0xc5}, + {OV2722_8BIT, 0x4005, 0x08}, + {OV2722_8BIT, 0x404f, 0x84}, + {OV2722_8BIT, 0x4051, 0x00}, + {OV2722_8BIT, 0x5000, 0xff}, + {OV2722_8BIT, 0x3a18, 0x00}, + {OV2722_8BIT, 0x3a19, 0x80}, + {OV2722_8BIT, 0x4521, 0x00}, + {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */ + {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */ + {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */ + {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */ + {OV2722_8BIT, 0x370c, 0x0c}, + {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */ + {OV2722_8BIT, 0x3035, 0x00}, + {OV2722_8BIT, 0x3036, 0x26}, + {OV2722_8BIT, 0x3037, 0xa1}, + {OV2722_8BIT, 0x303e, 0x19}, + {OV2722_8BIT, 0x3038, 0x06}, + {OV2722_8BIT, 0x3018, 0x04}, + + /* Added for power optimization */ + {OV2722_8BIT, 0x3000, 0x00}, + {OV2722_8BIT, 0x3001, 0x00}, + {OV2722_8BIT, 0x3002, 0x00}, + {OV2722_8BIT, 0x3a0f, 0x40}, + {OV2722_8BIT, 0x3a10, 0x38}, + {OV2722_8BIT, 0x3a1b, 0x48}, + {OV2722_8BIT, 0x3a1e, 0x30}, + {OV2722_8BIT, 0x3a11, 0x90}, + {OV2722_8BIT, 0x3a1f, 0x10}, + {OV2722_8BIT, 0x3011, 0x22}, + {OV2722_8BIT, 0x3a00, 0x58}, + {OV2722_8BIT, 0x3503, 0x17}, + {OV2722_8BIT, 0x3500, 0x00}, + {OV2722_8BIT, 0x3501, 0x46}, + {OV2722_8BIT, 0x3502, 0x00}, + {OV2722_8BIT, 0x3508, 0x00}, + {OV2722_8BIT, 0x3509, 0x10}, + {OV2722_TOK_TERM, 0, 0}, +}; + +static struct ov2722_reg const ov2722_VGA_30fps[] = { + {OV2722_8BIT, 0x3718, 0x10}, + {OV2722_8BIT, 0x3702, 0x18}, + {OV2722_8BIT, 0x373a, 0x3c}, + {OV2722_8BIT, 0x3715, 0x01}, + {OV2722_8BIT, 0x3703, 0x1d}, + {OV2722_8BIT, 0x3705, 0x12}, + {OV2722_8BIT, 0x3730, 0x1f}, + {OV2722_8BIT, 0x3704, 0x3f}, + {OV2722_8BIT, 0x3f06, 0x1d}, + {OV2722_8BIT, 0x371c, 0x00}, + {OV2722_8BIT, 0x371d, 0x83}, + {OV2722_8BIT, 0x371e, 0x00}, + {OV2722_8BIT, 0x371f, 0xbd}, + {OV2722_8BIT, 0x3708, 0x63}, + {OV2722_8BIT, 0x3709, 0x52}, + {OV2722_8BIT, 0x3800, 0x01}, + {OV2722_8BIT, 0x3801, 0x42}, /* H crop start: 322 */ + {OV2722_8BIT, 0x3802, 0x00}, + {OV2722_8BIT, 0x3803, 0x20}, /* V crop start: 32*/ + {OV2722_8BIT, 0x3804, 0x06}, + {OV2722_8BIT, 0x3805, 0x6B}, /* H crop end: 1643*/ + {OV2722_8BIT, 0x3806, 0x04}, + {OV2722_8BIT, 0x3807, 0x03}, /* V crop end: 1027*/ + {OV2722_8BIT, 0x3808, 0x02}, + {OV2722_8BIT, 0x3809, 0x90}, /* H output size: 656 */ + {OV2722_8BIT, 0x380a, 0x01}, + {OV2722_8BIT, 0x380b, 0xF0}, /* V output size: 496 */ + + /* H blank timing */ + {OV2722_8BIT, 0x380c, 0x08}, + {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */ + {OV2722_8BIT, 0x380e, 0x04}, + {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */ + {OV2722_8BIT, 0x3810, 0x00}, + {OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */ + {OV2722_8BIT, 0x3812, 0x00}, + {OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */ + {OV2722_8BIT, 0x3820, 0x80}, + {OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/ + {OV2722_8BIT, 0x3814, 0x31}, + {OV2722_8BIT, 0x3815, 0x31}, + {OV2722_8BIT, 0x3612, 0x4b}, + {OV2722_8BIT, 0x3618, 0x04}, + {OV2722_8BIT, 0x3a08, 0x02}, + {OV2722_8BIT, 0x3a09, 0x67}, + {OV2722_8BIT, 0x3a0a, 0x02}, + {OV2722_8BIT, 0x3a0b, 0x00}, + {OV2722_8BIT, 0x3a0d, 0x00}, + {OV2722_8BIT, 0x3a0e, 0x00}, + {OV2722_8BIT, 0x4520, 0x0a}, + {OV2722_8BIT, 0x4837, 0x29}, + {OV2722_8BIT, 0x3000, 0xff}, + {OV2722_8BIT, 0x3001, 0xff}, + {OV2722_8BIT, 0x3002, 0xf0}, + {OV2722_8BIT, 0x3600, 0x08}, + {OV2722_8BIT, 0x3621, 0xc0}, + {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */ + {OV2722_8BIT, 0x3633, 0x63}, + {OV2722_8BIT, 0x3634, 0x24}, + {OV2722_8BIT, 0x3f01, 0x0c}, + {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */ + {OV2722_8BIT, 0x3614, 0xf0}, + {OV2722_8BIT, 0x3630, 0x2d}, + {OV2722_8BIT, 0x370b, 0x62}, + {OV2722_8BIT, 0x3706, 0x61}, + {OV2722_8BIT, 0x4000, 0x02}, + {OV2722_8BIT, 0x4002, 0xc5}, + {OV2722_8BIT, 0x4005, 0x08}, + {OV2722_8BIT, 0x404f, 0x84}, + {OV2722_8BIT, 0x4051, 0x00}, + {OV2722_8BIT, 0x5000, 0xff}, + {OV2722_8BIT, 0x3a18, 0x00}, + {OV2722_8BIT, 0x3a19, 0x80}, + {OV2722_8BIT, 0x4521, 0x00}, + {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */ + {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */ + {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */ + {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */ + {OV2722_8BIT, 0x370c, 0x0c}, + {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */ + {OV2722_8BIT, 0x3035, 0x00}, + {OV2722_8BIT, 0x3036, 0x26}, + {OV2722_8BIT, 0x3037, 0xa1}, + {OV2722_8BIT, 0x303e, 0x19}, + {OV2722_8BIT, 0x3038, 0x06}, + {OV2722_8BIT, 0x3018, 0x04}, + + /* Added for power optimization */ + {OV2722_8BIT, 0x3000, 0x00}, + {OV2722_8BIT, 0x3001, 0x00}, + {OV2722_8BIT, 0x3002, 0x00}, + {OV2722_8BIT, 0x3a0f, 0x40}, + {OV2722_8BIT, 0x3a10, 0x38}, + {OV2722_8BIT, 0x3a1b, 0x48}, + {OV2722_8BIT, 0x3a1e, 0x30}, + {OV2722_8BIT, 0x3a11, 0x90}, + {OV2722_8BIT, 0x3a1f, 0x10}, + {OV2722_8BIT, 0x3011, 0x22}, + {OV2722_8BIT, 0x3a00, 0x58}, + {OV2722_8BIT, 0x3503, 0x17}, + {OV2722_8BIT, 0x3500, 0x00}, + {OV2722_8BIT, 0x3501, 0x46}, + {OV2722_8BIT, 0x3502, 0x00}, + {OV2722_8BIT, 0x3508, 0x00}, + {OV2722_8BIT, 0x3509, 0x10}, + {OV2722_TOK_TERM, 0, 0}, +}; +#endif + +static struct ov2722_reg const ov2722_1632_1092_30fps[] = { + {OV2722_8BIT, 0x3021, 0x03}, /* For stand wait for + a whole frame complete.(vblank) */ + {OV2722_8BIT, 0x3718, 0x10}, + {OV2722_8BIT, 0x3702, 0x24}, + {OV2722_8BIT, 0x373a, 0x60}, + {OV2722_8BIT, 0x3715, 0x01}, + {OV2722_8BIT, 0x3703, 0x2e}, + {OV2722_8BIT, 0x3705, 0x10}, + {OV2722_8BIT, 0x3730, 0x30}, + {OV2722_8BIT, 0x3704, 0x62}, + {OV2722_8BIT, 0x3f06, 0x3a}, + {OV2722_8BIT, 0x371c, 0x00}, + {OV2722_8BIT, 0x371d, 0xc4}, + {OV2722_8BIT, 0x371e, 0x01}, + {OV2722_8BIT, 0x371f, 0x0d}, + {OV2722_8BIT, 0x3708, 0x61}, + {OV2722_8BIT, 0x3709, 0x12}, + {OV2722_8BIT, 0x3800, 0x00}, + {OV2722_8BIT, 0x3801, 0x9E}, /* H crop start: 158 */ + {OV2722_8BIT, 0x3802, 0x00}, + {OV2722_8BIT, 0x3803, 0x01}, /* V crop start: 1 */ + {OV2722_8BIT, 0x3804, 0x07}, + {OV2722_8BIT, 0x3805, 0x05}, /* H crop end: 1797 */ + {OV2722_8BIT, 0x3806, 0x04}, + {OV2722_8BIT, 0x3807, 0x45}, /* V crop end: 1093 */ + + {OV2722_8BIT, 0x3808, 0x06}, + {OV2722_8BIT, 0x3809, 0x60}, /* H output size: 1632 */ + {OV2722_8BIT, 0x380a, 0x04}, + {OV2722_8BIT, 0x380b, 0x44}, /* V output size: 1092 */ + {OV2722_8BIT, 0x380c, 0x08}, + {OV2722_8BIT, 0x380d, 0xd4}, /* H timing: 2260 */ + {OV2722_8BIT, 0x380e, 0x04}, + {OV2722_8BIT, 0x380f, 0xdc}, /* V timing: 1244 */ + {OV2722_8BIT, 0x3810, 0x00}, + {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */ + {OV2722_8BIT, 0x3812, 0x00}, + {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */ + {OV2722_8BIT, 0x3820, 0x80}, + {OV2722_8BIT, 0x3821, 0x06}, /* mirror */ + {OV2722_8BIT, 0x3814, 0x11}, + {OV2722_8BIT, 0x3815, 0x11}, + {OV2722_8BIT, 0x3612, 0x0b}, + {OV2722_8BIT, 0x3618, 0x04}, + {OV2722_8BIT, 0x3a08, 0x01}, + {OV2722_8BIT, 0x3a09, 0x50}, + {OV2722_8BIT, 0x3a0a, 0x01}, + {OV2722_8BIT, 0x3a0b, 0x18}, + {OV2722_8BIT, 0x3a0d, 0x03}, + {OV2722_8BIT, 0x3a0e, 0x03}, + {OV2722_8BIT, 0x4520, 0x00}, + {OV2722_8BIT, 0x4837, 0x1b}, + {OV2722_8BIT, 0x3600, 0x08}, + {OV2722_8BIT, 0x3621, 0xc0}, + {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */ + {OV2722_8BIT, 0x3633, 0x23}, + {OV2722_8BIT, 0x3634, 0x54}, + {OV2722_8BIT, 0x3f01, 0x0c}, + {OV2722_8BIT, 0x5001, 0xc1}, + {OV2722_8BIT, 0x3614, 0xf0}, + {OV2722_8BIT, 0x3630, 0x2d}, + {OV2722_8BIT, 0x370b, 0x62}, + {OV2722_8BIT, 0x3706, 0x61}, + {OV2722_8BIT, 0x4000, 0x02}, + {OV2722_8BIT, 0x4002, 0xc5}, + {OV2722_8BIT, 0x4005, 0x08}, + {OV2722_8BIT, 0x404f, 0x84}, + {OV2722_8BIT, 0x4051, 0x00}, + {OV2722_8BIT, 0x5000, 0xcf}, /* manual 3a */ + {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */ + {OV2722_8BIT, 0x3a18, 0x00}, + {OV2722_8BIT, 0x3a19, 0x80}, + {OV2722_8BIT, 0x4521, 0x00}, + {OV2722_8BIT, 0x5183, 0xb0}, + {OV2722_8BIT, 0x5184, 0xb0}, + {OV2722_8BIT, 0x5185, 0xb0}, + {OV2722_8BIT, 0x370c, 0x0c}, + {OV2722_8BIT, 0x3035, 0x00}, + {OV2722_8BIT, 0x3036, 0x2c}, /* 422.4 MHz */ + {OV2722_8BIT, 0x3037, 0xa1}, + {OV2722_8BIT, 0x303e, 0x19}, + {OV2722_8BIT, 0x3038, 0x06}, + {OV2722_8BIT, 0x3018, 0x04}, + {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */ + {OV2722_8BIT, 0x3001, 0x00}, + {OV2722_8BIT, 0x3002, 0x00}, + {OV2722_8BIT, 0x3a0f, 0x40}, + {OV2722_8BIT, 0x3a10, 0x38}, + {OV2722_8BIT, 0x3a1b, 0x48}, + {OV2722_8BIT, 0x3a1e, 0x30}, + {OV2722_8BIT, 0x3a11, 0x90}, + {OV2722_8BIT, 0x3a1f, 0x10}, + {OV2722_8BIT, 0x3503, 0x17}, /* manual 3a */ + {OV2722_8BIT, 0x3500, 0x00}, + {OV2722_8BIT, 0x3501, 0x3F}, + {OV2722_8BIT, 0x3502, 0x00}, + {OV2722_8BIT, 0x3508, 0x00}, + {OV2722_8BIT, 0x3509, 0x00}, + {OV2722_TOK_TERM, 0, 0} +}; + +static struct ov2722_reg const ov2722_1452_1092_30fps[] = { + {OV2722_8BIT, 0x3021, 0x03}, /* For stand wait for + a whole frame complete.(vblank) */ + {OV2722_8BIT, 0x3718, 0x10}, + {OV2722_8BIT, 0x3702, 0x24}, + {OV2722_8BIT, 0x373a, 0x60}, + {OV2722_8BIT, 0x3715, 0x01}, + {OV2722_8BIT, 0x3703, 0x2e}, + {OV2722_8BIT, 0x3705, 0x10}, + {OV2722_8BIT, 0x3730, 0x30}, + {OV2722_8BIT, 0x3704, 0x62}, + {OV2722_8BIT, 0x3f06, 0x3a}, + {OV2722_8BIT, 0x371c, 0x00}, + {OV2722_8BIT, 0x371d, 0xc4}, + {OV2722_8BIT, 0x371e, 0x01}, + {OV2722_8BIT, 0x371f, 0x0d}, + {OV2722_8BIT, 0x3708, 0x61}, + {OV2722_8BIT, 0x3709, 0x12}, + {OV2722_8BIT, 0x3800, 0x00}, + {OV2722_8BIT, 0x3801, 0xF8}, /* H crop start: 248 */ + {OV2722_8BIT, 0x3802, 0x00}, + {OV2722_8BIT, 0x3803, 0x01}, /* V crop start: 1 */ + {OV2722_8BIT, 0x3804, 0x06}, + {OV2722_8BIT, 0x3805, 0xab}, /* H crop end: 1707 */ + {OV2722_8BIT, 0x3806, 0x04}, + {OV2722_8BIT, 0x3807, 0x45}, /* V crop end: 1093 */ + {OV2722_8BIT, 0x3808, 0x05}, + {OV2722_8BIT, 0x3809, 0xac}, /* H output size: 1452 */ + {OV2722_8BIT, 0x380a, 0x04}, + {OV2722_8BIT, 0x380b, 0x44}, /* V output size: 1092 */ + {OV2722_8BIT, 0x380c, 0x08}, + {OV2722_8BIT, 0x380d, 0xd4}, /* H timing: 2260 */ + {OV2722_8BIT, 0x380e, 0x04}, + {OV2722_8BIT, 0x380f, 0xdc}, /* V timing: 1244 */ + {OV2722_8BIT, 0x3810, 0x00}, + {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */ + {OV2722_8BIT, 0x3812, 0x00}, + {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */ + {OV2722_8BIT, 0x3820, 0x80}, + {OV2722_8BIT, 0x3821, 0x06}, /* mirror */ + {OV2722_8BIT, 0x3814, 0x11}, + {OV2722_8BIT, 0x3815, 0x11}, + {OV2722_8BIT, 0x3612, 0x0b}, + {OV2722_8BIT, 0x3618, 0x04}, + {OV2722_8BIT, 0x3a08, 0x01}, + {OV2722_8BIT, 0x3a09, 0x50}, + {OV2722_8BIT, 0x3a0a, 0x01}, + {OV2722_8BIT, 0x3a0b, 0x18}, + {OV2722_8BIT, 0x3a0d, 0x03}, + {OV2722_8BIT, 0x3a0e, 0x03}, + {OV2722_8BIT, 0x4520, 0x00}, + {OV2722_8BIT, 0x4837, 0x1b}, + {OV2722_8BIT, 0x3600, 0x08}, + {OV2722_8BIT, 0x3621, 0xc0}, + {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */ + {OV2722_8BIT, 0x3633, 0x23}, + {OV2722_8BIT, 0x3634, 0x54}, + {OV2722_8BIT, 0x3f01, 0x0c}, + {OV2722_8BIT, 0x5001, 0xc1}, + {OV2722_8BIT, 0x3614, 0xf0}, + {OV2722_8BIT, 0x3630, 0x2d}, + {OV2722_8BIT, 0x370b, 0x62}, + {OV2722_8BIT, 0x3706, 0x61}, + {OV2722_8BIT, 0x4000, 0x02}, + {OV2722_8BIT, 0x4002, 0xc5}, + {OV2722_8BIT, 0x4005, 0x08}, + {OV2722_8BIT, 0x404f, 0x84}, + {OV2722_8BIT, 0x4051, 0x00}, + {OV2722_8BIT, 0x5000, 0xcf}, /* manual 3a */ + {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */ + {OV2722_8BIT, 0x3a18, 0x00}, + {OV2722_8BIT, 0x3a19, 0x80}, + {OV2722_8BIT, 0x4521, 0x00}, + {OV2722_8BIT, 0x5183, 0xb0}, + {OV2722_8BIT, 0x5184, 0xb0}, + {OV2722_8BIT, 0x5185, 0xb0}, + {OV2722_8BIT, 0x370c, 0x0c}, + {OV2722_8BIT, 0x3035, 0x00}, + {OV2722_8BIT, 0x3036, 0x2c}, /* 422.4 MHz */ + {OV2722_8BIT, 0x3037, 0xa1}, + {OV2722_8BIT, 0x303e, 0x19}, + {OV2722_8BIT, 0x3038, 0x06}, + {OV2722_8BIT, 0x3018, 0x04}, + {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */ + {OV2722_8BIT, 0x3001, 0x00}, + {OV2722_8BIT, 0x3002, 0x00}, + {OV2722_8BIT, 0x3a0f, 0x40}, + {OV2722_8BIT, 0x3a10, 0x38}, + {OV2722_8BIT, 0x3a1b, 0x48}, + {OV2722_8BIT, 0x3a1e, 0x30}, + {OV2722_8BIT, 0x3a11, 0x90}, + {OV2722_8BIT, 0x3a1f, 0x10}, + {OV2722_8BIT, 0x3503, 0x17}, /* manual 3a */ + {OV2722_8BIT, 0x3500, 0x00}, + {OV2722_8BIT, 0x3501, 0x3F}, + {OV2722_8BIT, 0x3502, 0x00}, + {OV2722_8BIT, 0x3508, 0x00}, + {OV2722_8BIT, 0x3509, 0x00}, + {OV2722_TOK_TERM, 0, 0} +}; + +#if 0 +static struct ov2722_reg const ov2722_1M3_30fps[] = { + {OV2722_8BIT, 0x3718, 0x10}, + {OV2722_8BIT, 0x3702, 0x24}, + {OV2722_8BIT, 0x373a, 0x60}, + {OV2722_8BIT, 0x3715, 0x01}, + {OV2722_8BIT, 0x3703, 0x2e}, + {OV2722_8BIT, 0x3705, 0x10}, + {OV2722_8BIT, 0x3730, 0x30}, + {OV2722_8BIT, 0x3704, 0x62}, + {OV2722_8BIT, 0x3f06, 0x3a}, + {OV2722_8BIT, 0x371c, 0x00}, + {OV2722_8BIT, 0x371d, 0xc4}, + {OV2722_8BIT, 0x371e, 0x01}, + {OV2722_8BIT, 0x371f, 0x0d}, + {OV2722_8BIT, 0x3708, 0x61}, + {OV2722_8BIT, 0x3709, 0x12}, + {OV2722_8BIT, 0x3800, 0x01}, + {OV2722_8BIT, 0x3801, 0x4a}, /* H crop start: 330 */ + {OV2722_8BIT, 0x3802, 0x00}, + {OV2722_8BIT, 0x3803, 0x03}, /* V crop start: 3 */ + {OV2722_8BIT, 0x3804, 0x06}, + {OV2722_8BIT, 0x3805, 0xe1}, /* H crop end: 1761 */ + {OV2722_8BIT, 0x3806, 0x04}, + {OV2722_8BIT, 0x3807, 0x47}, /* V crop end: 1095 */ + {OV2722_8BIT, 0x3808, 0x05}, + {OV2722_8BIT, 0x3809, 0x88}, /* H output size: 1416 */ + {OV2722_8BIT, 0x380a, 0x04}, + {OV2722_8BIT, 0x380b, 0x0a}, /* V output size: 1034 */ + + /* H blank timing */ + {OV2722_8BIT, 0x380c, 0x08}, + {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */ + {OV2722_8BIT, 0x380e, 0x04}, + {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */ + {OV2722_8BIT, 0x3810, 0x00}, + {OV2722_8BIT, 0x3811, 0x05}, /* H window offset: 5 */ + {OV2722_8BIT, 0x3812, 0x00}, + {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */ + {OV2722_8BIT, 0x3820, 0x80}, + {OV2722_8BIT, 0x3821, 0x06}, /* flip isp */ + {OV2722_8BIT, 0x3814, 0x11}, + {OV2722_8BIT, 0x3815, 0x11}, + {OV2722_8BIT, 0x3612, 0x0b}, + {OV2722_8BIT, 0x3618, 0x04}, + {OV2722_8BIT, 0x3a08, 0x01}, + {OV2722_8BIT, 0x3a09, 0x50}, + {OV2722_8BIT, 0x3a0a, 0x01}, + {OV2722_8BIT, 0x3a0b, 0x18}, + {OV2722_8BIT, 0x3a0d, 0x03}, + {OV2722_8BIT, 0x3a0e, 0x03}, + {OV2722_8BIT, 0x4520, 0x00}, + {OV2722_8BIT, 0x4837, 0x1b}, + {OV2722_8BIT, 0x3000, 0xff}, + {OV2722_8BIT, 0x3001, 0xff}, + {OV2722_8BIT, 0x3002, 0xf0}, + {OV2722_8BIT, 0x3600, 0x08}, + {OV2722_8BIT, 0x3621, 0xc0}, + {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */ + {OV2722_8BIT, 0x3633, 0x23}, + {OV2722_8BIT, 0x3634, 0x54}, + {OV2722_8BIT, 0x3f01, 0x0c}, + {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */ + {OV2722_8BIT, 0x3614, 0xf0}, + {OV2722_8BIT, 0x3630, 0x2d}, + {OV2722_8BIT, 0x370b, 0x62}, + {OV2722_8BIT, 0x3706, 0x61}, + {OV2722_8BIT, 0x4000, 0x02}, + {OV2722_8BIT, 0x4002, 0xc5}, + {OV2722_8BIT, 0x4005, 0x08}, + {OV2722_8BIT, 0x404f, 0x84}, + {OV2722_8BIT, 0x4051, 0x00}, + {OV2722_8BIT, 0x5000, 0xcf}, + {OV2722_8BIT, 0x3a18, 0x00}, + {OV2722_8BIT, 0x3a19, 0x80}, + {OV2722_8BIT, 0x4521, 0x00}, + {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */ + {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */ + {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */ + {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */ + {OV2722_8BIT, 0x370c, 0x0c}, + {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */ + {OV2722_8BIT, 0x3035, 0x00}, + {OV2722_8BIT, 0x3036, 0x26}, + {OV2722_8BIT, 0x3037, 0xa1}, + {OV2722_8BIT, 0x303e, 0x19}, + {OV2722_8BIT, 0x3038, 0x06}, + {OV2722_8BIT, 0x3018, 0x04}, + + /* Added for power optimization */ + {OV2722_8BIT, 0x3000, 0x00}, + {OV2722_8BIT, 0x3001, 0x00}, + {OV2722_8BIT, 0x3002, 0x00}, + {OV2722_8BIT, 0x3a0f, 0x40}, + {OV2722_8BIT, 0x3a10, 0x38}, + {OV2722_8BIT, 0x3a1b, 0x48}, + {OV2722_8BIT, 0x3a1e, 0x30}, + {OV2722_8BIT, 0x3a11, 0x90}, + {OV2722_8BIT, 0x3a1f, 0x10}, + {OV2722_8BIT, 0x3503, 0x17}, + {OV2722_8BIT, 0x3500, 0x00}, + {OV2722_8BIT, 0x3501, 0x46}, + {OV2722_8BIT, 0x3502, 0x00}, + {OV2722_8BIT, 0x3508, 0x00}, + {OV2722_8BIT, 0x3509, 0x10}, + {OV2722_TOK_TERM, 0, 0}, +}; +#endif + +static struct ov2722_reg const ov2722_1080p_30fps[] = { + {OV2722_8BIT, 0x3021, 0x03}, /* For stand wait for a whole + frame complete.(vblank) */ + {OV2722_8BIT, 0x3718, 0x10}, + {OV2722_8BIT, 0x3702, 0x24}, + {OV2722_8BIT, 0x373a, 0x60}, + {OV2722_8BIT, 0x3715, 0x01}, + {OV2722_8BIT, 0x3703, 0x2e}, + {OV2722_8BIT, 0x3705, 0x2b}, + {OV2722_8BIT, 0x3730, 0x30}, + {OV2722_8BIT, 0x3704, 0x62}, + {OV2722_8BIT, 0x3f06, 0x3a}, + {OV2722_8BIT, 0x371c, 0x00}, + {OV2722_8BIT, 0x371d, 0xc4}, + {OV2722_8BIT, 0x371e, 0x01}, + {OV2722_8BIT, 0x371f, 0x28}, + {OV2722_8BIT, 0x3708, 0x61}, + {OV2722_8BIT, 0x3709, 0x12}, + {OV2722_8BIT, 0x3800, 0x00}, + {OV2722_8BIT, 0x3801, 0x08}, /* H crop start: 8 */ + {OV2722_8BIT, 0x3802, 0x00}, + {OV2722_8BIT, 0x3803, 0x01}, /* V crop start: 1 */ + {OV2722_8BIT, 0x3804, 0x07}, + {OV2722_8BIT, 0x3805, 0x9b}, /* H crop end: 1947 */ + {OV2722_8BIT, 0x3806, 0x04}, + {OV2722_8BIT, 0x3807, 0x45}, /* V crop end: 1093 */ + {OV2722_8BIT, 0x3808, 0x07}, + {OV2722_8BIT, 0x3809, 0x8c}, /* H output size: 1932 */ + {OV2722_8BIT, 0x380a, 0x04}, + {OV2722_8BIT, 0x380b, 0x44}, /* V output size: 1092 */ + {OV2722_8BIT, 0x380c, 0x08}, + {OV2722_8BIT, 0x380d, 0x14}, /* H timing: 2068 */ + {OV2722_8BIT, 0x380e, 0x04}, + {OV2722_8BIT, 0x380f, 0x5a}, /* V timing: 1114 */ + {OV2722_8BIT, 0x3810, 0x00}, + {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */ + {OV2722_8BIT, 0x3812, 0x00}, + {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */ + {OV2722_8BIT, 0x3820, 0x80}, + {OV2722_8BIT, 0x3821, 0x06}, /* mirror */ + {OV2722_8BIT, 0x3814, 0x11}, + {OV2722_8BIT, 0x3815, 0x11}, + {OV2722_8BIT, 0x3612, 0x4b}, + {OV2722_8BIT, 0x3618, 0x04}, + {OV2722_8BIT, 0x3a08, 0x01}, + {OV2722_8BIT, 0x3a09, 0x50}, + {OV2722_8BIT, 0x3a0a, 0x01}, + {OV2722_8BIT, 0x3a0b, 0x18}, + {OV2722_8BIT, 0x3a0d, 0x03}, + {OV2722_8BIT, 0x3a0e, 0x03}, + {OV2722_8BIT, 0x4520, 0x00}, + {OV2722_8BIT, 0x4837, 0x1b}, + {OV2722_8BIT, 0x3000, 0xff}, + {OV2722_8BIT, 0x3001, 0xff}, + {OV2722_8BIT, 0x3002, 0xf0}, + {OV2722_8BIT, 0x3600, 0x08}, + {OV2722_8BIT, 0x3621, 0xc0}, + {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */ + {OV2722_8BIT, 0x3633, 0x63}, + {OV2722_8BIT, 0x3634, 0x24}, + {OV2722_8BIT, 0x3f01, 0x0c}, + {OV2722_8BIT, 0x5001, 0xc1}, + {OV2722_8BIT, 0x3614, 0xf0}, + {OV2722_8BIT, 0x3630, 0x2d}, + {OV2722_8BIT, 0x370b, 0x62}, + {OV2722_8BIT, 0x3706, 0x61}, + {OV2722_8BIT, 0x4000, 0x02}, + {OV2722_8BIT, 0x4002, 0xc5}, + {OV2722_8BIT, 0x4005, 0x08}, + {OV2722_8BIT, 0x404f, 0x84}, + {OV2722_8BIT, 0x4051, 0x00}, + {OV2722_8BIT, 0x5000, 0xcd}, /* manual 3a */ + {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */ + {OV2722_8BIT, 0x3a18, 0x00}, + {OV2722_8BIT, 0x3a19, 0x80}, + {OV2722_8BIT, 0x3503, 0x17}, + {OV2722_8BIT, 0x4521, 0x00}, + {OV2722_8BIT, 0x5183, 0xb0}, + {OV2722_8BIT, 0x5184, 0xb0}, + {OV2722_8BIT, 0x5185, 0xb0}, + {OV2722_8BIT, 0x370c, 0x0c}, + {OV2722_8BIT, 0x3035, 0x00}, + {OV2722_8BIT, 0x3036, 0x24}, /* 345.6 MHz */ + {OV2722_8BIT, 0x3037, 0xa1}, + {OV2722_8BIT, 0x303e, 0x19}, + {OV2722_8BIT, 0x3038, 0x06}, + {OV2722_8BIT, 0x3018, 0x04}, + {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */ + {OV2722_8BIT, 0x3001, 0x00}, + {OV2722_8BIT, 0x3002, 0x00}, + {OV2722_8BIT, 0x3a0f, 0x40}, + {OV2722_8BIT, 0x3a10, 0x38}, + {OV2722_8BIT, 0x3a1b, 0x48}, + {OV2722_8BIT, 0x3a1e, 0x30}, + {OV2722_8BIT, 0x3a11, 0x90}, + {OV2722_8BIT, 0x3a1f, 0x10}, + {OV2722_8BIT, 0x3011, 0x22}, + {OV2722_8BIT, 0x3500, 0x00}, + {OV2722_8BIT, 0x3501, 0x3F}, + {OV2722_8BIT, 0x3502, 0x00}, + {OV2722_8BIT, 0x3508, 0x00}, + {OV2722_8BIT, 0x3509, 0x00}, + {OV2722_TOK_TERM, 0, 0} +}; + +#if 0 /* Currently unused */ +static struct ov2722_reg const ov2722_720p_30fps[] = { + {OV2722_8BIT, 0x3021, 0x03}, + {OV2722_8BIT, 0x3718, 0x10}, + {OV2722_8BIT, 0x3702, 0x24}, + {OV2722_8BIT, 0x373a, 0x60}, + {OV2722_8BIT, 0x3715, 0x01}, + {OV2722_8BIT, 0x3703, 0x2e}, + {OV2722_8BIT, 0x3705, 0x10}, + {OV2722_8BIT, 0x3730, 0x30}, + {OV2722_8BIT, 0x3704, 0x62}, + {OV2722_8BIT, 0x3f06, 0x3a}, + {OV2722_8BIT, 0x371c, 0x00}, + {OV2722_8BIT, 0x371d, 0xc4}, + {OV2722_8BIT, 0x371e, 0x01}, + {OV2722_8BIT, 0x371f, 0x0d}, + {OV2722_8BIT, 0x3708, 0x61}, + {OV2722_8BIT, 0x3709, 0x12}, + {OV2722_8BIT, 0x3800, 0x01}, + {OV2722_8BIT, 0x3801, 0x40}, /* H crop start: 320 */ + {OV2722_8BIT, 0x3802, 0x00}, + {OV2722_8BIT, 0x3803, 0xb1}, /* V crop start: 177 */ + {OV2722_8BIT, 0x3804, 0x06}, + {OV2722_8BIT, 0x3805, 0x55}, /* H crop end: 1621 */ + {OV2722_8BIT, 0x3806, 0x03}, + {OV2722_8BIT, 0x3807, 0x95}, /* V crop end: 918 */ + {OV2722_8BIT, 0x3808, 0x05}, + {OV2722_8BIT, 0x3809, 0x10}, /* H output size: 0x0788==1928 */ + {OV2722_8BIT, 0x380a, 0x02}, + {OV2722_8BIT, 0x380b, 0xe0}, /* output size: 0x02DE==734 */ + {OV2722_8BIT, 0x380c, 0x08}, + {OV2722_8BIT, 0x380d, 0x00}, /* H timing: 2048 */ + {OV2722_8BIT, 0x380e, 0x04}, + {OV2722_8BIT, 0x380f, 0xa3}, /* V timing: 1187 */ + {OV2722_8BIT, 0x3810, 0x00}, + {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */ + {OV2722_8BIT, 0x3812, 0x00}, + {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */ + {OV2722_8BIT, 0x3820, 0x80}, + {OV2722_8BIT, 0x3821, 0x06}, /* mirror */ + {OV2722_8BIT, 0x3814, 0x11}, + {OV2722_8BIT, 0x3815, 0x11}, + {OV2722_8BIT, 0x3612, 0x0b}, + {OV2722_8BIT, 0x3618, 0x04}, + {OV2722_8BIT, 0x3a08, 0x01}, + {OV2722_8BIT, 0x3a09, 0x50}, + {OV2722_8BIT, 0x3a0a, 0x01}, + {OV2722_8BIT, 0x3a0b, 0x18}, + {OV2722_8BIT, 0x3a0d, 0x03}, + {OV2722_8BIT, 0x3a0e, 0x03}, + {OV2722_8BIT, 0x4520, 0x00}, + {OV2722_8BIT, 0x4837, 0x1b}, + {OV2722_8BIT, 0x3600, 0x08}, + {OV2722_8BIT, 0x3621, 0xc0}, + {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */ + {OV2722_8BIT, 0x3633, 0x23}, + {OV2722_8BIT, 0x3634, 0x54}, + {OV2722_8BIT, 0x3f01, 0x0c}, + {OV2722_8BIT, 0x5001, 0xc1}, + {OV2722_8BIT, 0x3614, 0xf0}, + {OV2722_8BIT, 0x3630, 0x2d}, + {OV2722_8BIT, 0x370b, 0x62}, + {OV2722_8BIT, 0x3706, 0x61}, + {OV2722_8BIT, 0x4000, 0x02}, + {OV2722_8BIT, 0x4002, 0xc5}, + {OV2722_8BIT, 0x4005, 0x08}, + {OV2722_8BIT, 0x404f, 0x84}, + {OV2722_8BIT, 0x4051, 0x00}, + {OV2722_8BIT, 0x5000, 0xcf}, /* manual 3a */ + {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */ + {OV2722_8BIT, 0x3a18, 0x00}, + {OV2722_8BIT, 0x3a19, 0x80}, + {OV2722_8BIT, 0x4521, 0x00}, + {OV2722_8BIT, 0x5183, 0xb0}, + {OV2722_8BIT, 0x5184, 0xb0}, + {OV2722_8BIT, 0x5185, 0xb0}, + {OV2722_8BIT, 0x370c, 0x0c}, + {OV2722_8BIT, 0x3035, 0x00}, + {OV2722_8BIT, 0x3036, 0x26}, /* {0x3036, 0x2c}, //422.4 MHz */ + {OV2722_8BIT, 0x3037, 0xa1}, + {OV2722_8BIT, 0x303e, 0x19}, + {OV2722_8BIT, 0x3038, 0x06}, + {OV2722_8BIT, 0x3018, 0x04}, + {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */ + {OV2722_8BIT, 0x3001, 0x00}, + {OV2722_8BIT, 0x3002, 0x00}, + {OV2722_8BIT, 0x3a0f, 0x40}, + {OV2722_8BIT, 0x3a10, 0x38}, + {OV2722_8BIT, 0x3a1b, 0x48}, + {OV2722_8BIT, 0x3a1e, 0x30}, + {OV2722_8BIT, 0x3a11, 0x90}, + {OV2722_8BIT, 0x3a1f, 0x10}, + {OV2722_8BIT, 0x3503, 0x17}, /* manual 3a */ + {OV2722_8BIT, 0x3500, 0x00}, + {OV2722_8BIT, 0x3501, 0x3F}, + {OV2722_8BIT, 0x3502, 0x00}, + {OV2722_8BIT, 0x3508, 0x00}, + {OV2722_8BIT, 0x3509, 0x00}, + {OV2722_TOK_TERM, 0, 0}, +}; +#endif + +static struct ov2722_resolution ov2722_res_preview[] = { + { + .desc = "ov2722_1632_1092_30fps", + .width = 1632, + .height = 1092, + .fps = 30, + .pix_clk_freq = 85, + .used = 0, + .pixels_per_line = 2260, + .lines_per_frame = 1244, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_1632_1092_30fps, + .mipi_freq = 422400, + }, + { + .desc = "ov2722_1452_1092_30fps", + .width = 1452, + .height = 1092, + .fps = 30, + .pix_clk_freq = 85, + .used = 0, + .pixels_per_line = 2260, + .lines_per_frame = 1244, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_1452_1092_30fps, + .mipi_freq = 422400, + }, + { + .desc = "ov2722_1080P_30fps", + .width = 1932, + .height = 1092, + .pix_clk_freq = 69, + .fps = 30, + .used = 0, + .pixels_per_line = 2068, + .lines_per_frame = 1114, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_1080p_30fps, + .mipi_freq = 345600, + }, +}; + +#define N_RES_PREVIEW (ARRAY_SIZE(ov2722_res_preview)) + +/* + * Disable non-preview configurations until the configuration selection is + * improved. + */ +#if 0 +struct ov2722_resolution ov2722_res_still[] = { + { + .desc = "ov2722_480P_30fps", + .width = 1632, + .height = 1092, + .fps = 30, + .pix_clk_freq = 85, + .used = 0, + .pixels_per_line = 2260, + .lines_per_frame = 1244, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_1632_1092_30fps, + .mipi_freq = 422400, + }, + { + .desc = "ov2722_1452_1092_30fps", + .width = 1452, + .height = 1092, + .fps = 30, + .pix_clk_freq = 85, + .used = 0, + .pixels_per_line = 2260, + .lines_per_frame = 1244, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_1452_1092_30fps, + .mipi_freq = 422400, + }, + { + .desc = "ov2722_1080P_30fps", + .width = 1932, + .height = 1092, + .pix_clk_freq = 69, + .fps = 30, + .used = 0, + .pixels_per_line = 2068, + .lines_per_frame = 1114, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_1080p_30fps, + .mipi_freq = 345600, + }, +}; + +#define N_RES_STILL (ARRAY_SIZE(ov2722_res_still)) + +struct ov2722_resolution ov2722_res_video[] = { + { + .desc = "ov2722_QVGA_30fps", + .width = 336, + .height = 256, + .fps = 30, + .pix_clk_freq = 73, + .used = 0, + .pixels_per_line = 2048, + .lines_per_frame = 1184, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_QVGA_30fps, + .mipi_freq = 364800, + }, + { + .desc = "ov2722_480P_30fps", + .width = 736, + .height = 496, + .fps = 30, + .pix_clk_freq = 73, + .used = 0, + .pixels_per_line = 2048, + .lines_per_frame = 1184, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_480P_30fps, + }, + { + .desc = "ov2722_1080P_30fps", + .width = 1932, + .height = 1092, + .pix_clk_freq = 69, + .fps = 30, + .used = 0, + .pixels_per_line = 2068, + .lines_per_frame = 1114, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_1080p_30fps, + .mipi_freq = 345600, + }, +}; + +#define N_RES_VIDEO (ARRAY_SIZE(ov2722_res_video)) +#endif + +static struct ov2722_resolution *ov2722_res = ov2722_res_preview; +static unsigned long N_RES = N_RES_PREVIEW; +#endif diff --git a/drivers/staging/media/atomisp/i2c/ov5693/Makefile b/drivers/staging/media/atomisp/i2c/ov5693/Makefile new file mode 100644 index 000000000..3275f2be2 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/ov5693/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_VIDEO_ATOMISP_OV5693) += atomisp-ov5693.o diff --git a/drivers/staging/media/atomisp/i2c/ov5693/ad5823.h b/drivers/staging/media/atomisp/i2c/ov5693/ad5823.h new file mode 100644 index 000000000..f1362cd69 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/ov5693/ad5823.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Support for AD5823 VCM. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __AD5823_H__ +#define __AD5823_H__ + +#include <linux/types.h> + +#define AD5823_VCM_ADDR 0x0c + +#define AD5823_REG_RESET 0x01 +#define AD5823_REG_MODE 0x02 +#define AD5823_REG_VCM_MOVE_TIME 0x03 +#define AD5823_REG_VCM_CODE_MSB 0x04 +#define AD5823_REG_VCM_CODE_LSB 0x05 +#define AD5823_REG_VCM_THRESHOLD_MSB 0x06 +#define AD5823_REG_VCM_THRESHOLD_LSB 0x07 + +#define AD5823_REG_LENGTH 0x1 + +#define AD5823_RING_CTRL_ENABLE 0x04 +#define AD5823_RING_CTRL_DISABLE 0x00 + +#define AD5823_RESONANCE_PERIOD 100000 +#define AD5823_RESONANCE_COEF 512 +#define AD5823_HIGH_FREQ_RANGE 0x80 + +#define VCM_CODE_MSB_MASK 0xfc +#define AD5823_INIT_FOCUS_POS 350 + +enum ad5823_tok_type { + AD5823_8BIT = 0x1, + AD5823_16BIT = 0x2, +}; + +enum ad5823_vcm_mode { + AD5823_ARC_RES0 = 0x0, /* Actuator response control RES1 */ + AD5823_ARC_RES1 = 0x1, /* Actuator response control RES0.5 */ + AD5823_ARC_RES2 = 0x2, /* Actuator response control RES2 */ + AD5823_ESRC = 0x3, /* Enhanced slew rate control */ + AD5823_DIRECT = 0x4, /* Direct control */ +}; + +#define AD5823_INVALID_CONFIG 0xffffffff +#define AD5823_MAX_FOCUS_POS 1023 +#define DELAY_PER_STEP_NS 1000000 +#define DELAY_MAX_PER_STEP_NS (1000000 * 1023) +#endif diff --git a/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c b/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c new file mode 100644 index 000000000..c1cd63145 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c @@ -0,0 +1,1998 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Support for OmniVision OV5693 1080p HD camera sensor. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#include <linux/module.h> +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/mm.h> +#include <linux/string.h> +#include <linux/errno.h> +#include <linux/init.h> +#include <linux/kmod.h> +#include <linux/device.h> +#include <linux/delay.h> +#include <linux/slab.h> +#include <linux/i2c.h> +#include <linux/moduleparam.h> +#include <media/v4l2-device.h> +#include <linux/io.h> +#include <linux/acpi.h> +#include "../../include/linux/atomisp_gmin_platform.h" + +#include "ov5693.h" +#include "ad5823.h" + +#define __cci_delay(t) \ + do { \ + if ((t) < 10) { \ + usleep_range((t) * 1000, ((t) + 1) * 1000); \ + } else { \ + msleep((t)); \ + } \ + } while (0) + +/* Value 30ms reached through experimentation on byt ecs. + * The DS specifies a much lower value but when using a smaller value + * the I2C bus sometimes locks up permanently when starting the camera. + * This issue could not be reproduced on cht, so we can reduce the + * delay value to a lower value when insmod. + */ +static uint up_delay = 30; +module_param(up_delay, uint, 0644); +MODULE_PARM_DESC(up_delay, + "Delay prior to the first CCI transaction for ov5693"); + +static int vcm_ad_i2c_wr8(struct i2c_client *client, u8 reg, u8 val) +{ + int err; + struct i2c_msg msg; + u8 buf[2]; + + buf[0] = reg; + buf[1] = val; + + msg.addr = VCM_ADDR; + msg.flags = 0; + msg.len = 2; + msg.buf = &buf[0]; + + err = i2c_transfer(client->adapter, &msg, 1); + if (err != 1) { + dev_err(&client->dev, "%s: vcm i2c fail, err code = %d\n", + __func__, err); + return -EIO; + } + return 0; +} + +static int ad5823_i2c_write(struct i2c_client *client, u8 reg, u8 val) +{ + struct i2c_msg msg; + u8 buf[2]; + + buf[0] = reg; + buf[1] = val; + msg.addr = AD5823_VCM_ADDR; + msg.flags = 0; + msg.len = 0x02; + msg.buf = &buf[0]; + + if (i2c_transfer(client->adapter, &msg, 1) != 1) + return -EIO; + return 0; +} + +static int ad5823_i2c_read(struct i2c_client *client, u8 reg, u8 *val) +{ + struct i2c_msg msg[2]; + u8 buf[2]; + + buf[0] = reg; + buf[1] = 0; + + msg[0].addr = AD5823_VCM_ADDR; + msg[0].flags = 0; + msg[0].len = 0x01; + msg[0].buf = &buf[0]; + + msg[1].addr = 0x0c; + msg[1].flags = I2C_M_RD; + msg[1].len = 0x01; + msg[1].buf = &buf[1]; + *val = 0; + if (i2c_transfer(client->adapter, msg, 2) != 2) + return -EIO; + *val = buf[1]; + return 0; +} + +static const u32 ov5693_embedded_effective_size = 28; + +/* i2c read/write stuff */ +static int ov5693_read_reg(struct i2c_client *client, + u16 data_length, u16 reg, u16 *val) +{ + int err; + struct i2c_msg msg[2]; + unsigned char data[6]; + + if (!client->adapter) { + dev_err(&client->dev, "%s error, no client->adapter\n", + __func__); + return -ENODEV; + } + + if (data_length != OV5693_8BIT && data_length != OV5693_16BIT + && data_length != OV5693_32BIT) { + dev_err(&client->dev, "%s error, invalid data length\n", + __func__); + return -EINVAL; + } + + memset(msg, 0, sizeof(msg)); + + msg[0].addr = client->addr; + msg[0].flags = 0; + msg[0].len = I2C_MSG_LENGTH; + msg[0].buf = data; + + /* high byte goes out first */ + data[0] = (u8)(reg >> 8); + data[1] = (u8)(reg & 0xff); + + msg[1].addr = client->addr; + msg[1].len = data_length; + msg[1].flags = I2C_M_RD; + msg[1].buf = data; + + err = i2c_transfer(client->adapter, msg, 2); + if (err != 2) { + if (err >= 0) + err = -EIO; + dev_err(&client->dev, + "read from offset 0x%x error %d", reg, err); + return err; + } + + *val = 0; + /* high byte comes first */ + if (data_length == OV5693_8BIT) + *val = (u8)data[0]; + else if (data_length == OV5693_16BIT) + *val = be16_to_cpu(*(__be16 *)&data[0]); + else + *val = be32_to_cpu(*(__be32 *)&data[0]); + + return 0; +} + +static int ov5693_i2c_write(struct i2c_client *client, u16 len, u8 *data) +{ + struct i2c_msg msg; + const int num_msg = 1; + int ret; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = len; + msg.buf = data; + ret = i2c_transfer(client->adapter, &msg, 1); + + return ret == num_msg ? 0 : -EIO; +} + +static int vcm_dw_i2c_write(struct i2c_client *client, u16 data) +{ + struct i2c_msg msg; + const int num_msg = 1; + int ret; + __be16 val; + + val = cpu_to_be16(data); + msg.addr = VCM_ADDR; + msg.flags = 0; + msg.len = OV5693_16BIT; + msg.buf = (void *)&val; + + ret = i2c_transfer(client->adapter, &msg, 1); + + return ret == num_msg ? 0 : -EIO; +} + +/* + * Theory: per datasheet, the two VCMs both allow for a 2-byte read. + * The DW9714 doesn't actually specify what this does (it has a + * two-byte write-only protocol, but specifies the read sequence as + * legal), but it returns the same data (zeroes) always, after an + * undocumented initial NAK. The AD5823 has a one-byte address + * register to which all writes go, and subsequent reads will cycle + * through the 8 bytes of registers. Notably, the default values (the + * device is always power-cycled affirmatively, so we can rely on + * these) in AD5823 are not pairwise repetitions of the same 16 bit + * word. So all we have to do is sequentially read two bytes at a + * time and see if we detect a difference in any of the first four + * pairs. + */ +static int vcm_detect(struct i2c_client *client) +{ + int i, ret; + struct i2c_msg msg; + u16 data0 = 0, data; + + for (i = 0; i < 4; i++) { + msg.addr = VCM_ADDR; + msg.flags = I2C_M_RD; + msg.len = sizeof(data); + msg.buf = (u8 *)&data; + ret = i2c_transfer(client->adapter, &msg, 1); + + /* + * DW9714 always fails the first read and returns + * zeroes for subsequent ones + */ + if (i == 0 && ret == -EREMOTEIO) { + data0 = 0; + continue; + } + + if (i == 0) + data0 = data; + + if (data != data0) + return VCM_AD5823; + } + return ret == 1 ? VCM_DW9714 : ret; +} + +static int ov5693_write_reg(struct i2c_client *client, u16 data_length, + u16 reg, u16 val) +{ + int ret; + unsigned char data[4] = {0}; + __be16 *wreg = (void *)data; + const u16 len = data_length + sizeof(u16); /* 16-bit address + data */ + + if (data_length != OV5693_8BIT && data_length != OV5693_16BIT) { + dev_err(&client->dev, + "%s error, invalid data_length\n", __func__); + return -EINVAL; + } + + /* high byte goes out first */ + *wreg = cpu_to_be16(reg); + + if (data_length == OV5693_8BIT) { + data[2] = (u8)(val); + } else { + /* OV5693_16BIT */ + __be16 *wdata = (void *)&data[2]; + + *wdata = cpu_to_be16(val); + } + + ret = ov5693_i2c_write(client, len, data); + if (ret) + dev_err(&client->dev, + "write error: wrote 0x%x to offset 0x%x error %d", + val, reg, ret); + + return ret; +} + +/* + * ov5693_write_reg_array - Initializes a list of OV5693 registers + * @client: i2c driver client structure + * @reglist: list of registers to be written + * + * This function initializes a list of registers. When consecutive addresses + * are found in a row on the list, this function creates a buffer and sends + * consecutive data in a single i2c_transfer(). + * + * __ov5693_flush_reg_array, __ov5693_buf_reg_array() and + * __ov5693_write_reg_is_consecutive() are internal functions to + * ov5693_write_reg_array_fast() and should be not used anywhere else. + * + */ + +static int __ov5693_flush_reg_array(struct i2c_client *client, + struct ov5693_write_ctrl *ctrl) +{ + u16 size; + __be16 *reg = (void *)&ctrl->buffer.addr; + + if (ctrl->index == 0) + return 0; + + size = sizeof(u16) + ctrl->index; /* 16-bit address + data */ + + *reg = cpu_to_be16(ctrl->buffer.addr); + ctrl->index = 0; + + return ov5693_i2c_write(client, size, (u8 *)reg); +} + +static int __ov5693_buf_reg_array(struct i2c_client *client, + struct ov5693_write_ctrl *ctrl, + const struct ov5693_reg *next) +{ + int size; + __be16 *data16; + + switch (next->type) { + case OV5693_8BIT: + size = 1; + ctrl->buffer.data[ctrl->index] = (u8)next->val; + break; + case OV5693_16BIT: + size = 2; + + data16 = (void *)&ctrl->buffer.data[ctrl->index]; + *data16 = cpu_to_be16((u16)next->val); + break; + default: + return -EINVAL; + } + + /* When first item is added, we need to store its starting address */ + if (ctrl->index == 0) + ctrl->buffer.addr = next->reg; + + ctrl->index += size; + + /* + * Buffer cannot guarantee free space for u32? Better flush it to avoid + * possible lack of memory for next item. + */ + if (ctrl->index + sizeof(u16) >= OV5693_MAX_WRITE_BUF_SIZE) + return __ov5693_flush_reg_array(client, ctrl); + + return 0; +} + +static int __ov5693_write_reg_is_consecutive(struct i2c_client *client, + struct ov5693_write_ctrl *ctrl, + const struct ov5693_reg *next) +{ + if (ctrl->index == 0) + return 1; + + return ctrl->buffer.addr + ctrl->index == next->reg; +} + +static int ov5693_write_reg_array(struct i2c_client *client, + const struct ov5693_reg *reglist) +{ + const struct ov5693_reg *next = reglist; + struct ov5693_write_ctrl ctrl; + int err; + + ctrl.index = 0; + for (; next->type != OV5693_TOK_TERM; next++) { + switch (next->type & OV5693_TOK_MASK) { + case OV5693_TOK_DELAY: + err = __ov5693_flush_reg_array(client, &ctrl); + if (err) + return err; + msleep(next->val); + break; + default: + /* + * If next address is not consecutive, data needs to be + * flushed before proceed. + */ + if (!__ov5693_write_reg_is_consecutive(client, &ctrl, + next)) { + err = __ov5693_flush_reg_array(client, &ctrl); + if (err) + return err; + } + err = __ov5693_buf_reg_array(client, &ctrl, next); + if (err) { + dev_err(&client->dev, + "%s: write error, aborted\n", + __func__); + return err; + } + break; + } + } + + return __ov5693_flush_reg_array(client, &ctrl); +} + +static int ov5693_g_focal(struct v4l2_subdev *sd, s32 *val) +{ + *val = (OV5693_FOCAL_LENGTH_NUM << 16) | OV5693_FOCAL_LENGTH_DEM; + return 0; +} + +static int ov5693_g_fnumber(struct v4l2_subdev *sd, s32 *val) +{ + /*const f number for imx*/ + *val = (OV5693_F_NUMBER_DEFAULT_NUM << 16) | OV5693_F_NUMBER_DEM; + return 0; +} + +static int ov5693_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) +{ + *val = (OV5693_F_NUMBER_DEFAULT_NUM << 24) | + (OV5693_F_NUMBER_DEM << 16) | + (OV5693_F_NUMBER_DEFAULT_NUM << 8) | OV5693_F_NUMBER_DEM; + return 0; +} + +static int ov5693_g_bin_factor_x(struct v4l2_subdev *sd, s32 *val) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + + *val = ov5693_res[dev->fmt_idx].bin_factor_x; + + return 0; +} + +static int ov5693_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + + *val = ov5693_res[dev->fmt_idx].bin_factor_y; + + return 0; +} + +static int ov5693_get_intg_factor(struct i2c_client *client, + struct camera_mipi_info *info, + const struct ov5693_resolution *res) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct atomisp_sensor_mode_data *buf = &info->data; + unsigned int pix_clk_freq_hz; + u16 reg_val; + int ret; + + if (!info) + return -EINVAL; + + /* pixel clock */ + pix_clk_freq_hz = res->pix_clk_freq * 1000000; + + dev->vt_pix_clk_freq_mhz = pix_clk_freq_hz; + buf->vt_pix_clk_freq_mhz = pix_clk_freq_hz; + + /* get integration time */ + buf->coarse_integration_time_min = OV5693_COARSE_INTG_TIME_MIN; + buf->coarse_integration_time_max_margin = + OV5693_COARSE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_min = OV5693_FINE_INTG_TIME_MIN; + buf->fine_integration_time_max_margin = + OV5693_FINE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_def = OV5693_FINE_INTG_TIME_MIN; + buf->frame_length_lines = res->lines_per_frame; + buf->line_length_pck = res->pixels_per_line; + buf->read_mode = res->bin_mode; + + /* get the cropping and output resolution to ISP for this mode. */ + ret = ov5693_read_reg(client, OV5693_16BIT, + OV5693_HORIZONTAL_START_H, ®_val); + if (ret) + return ret; + buf->crop_horizontal_start = reg_val; + + ret = ov5693_read_reg(client, OV5693_16BIT, + OV5693_VERTICAL_START_H, ®_val); + if (ret) + return ret; + buf->crop_vertical_start = reg_val; + + ret = ov5693_read_reg(client, OV5693_16BIT, + OV5693_HORIZONTAL_END_H, ®_val); + if (ret) + return ret; + buf->crop_horizontal_end = reg_val; + + ret = ov5693_read_reg(client, OV5693_16BIT, + OV5693_VERTICAL_END_H, ®_val); + if (ret) + return ret; + buf->crop_vertical_end = reg_val; + + ret = ov5693_read_reg(client, OV5693_16BIT, + OV5693_HORIZONTAL_OUTPUT_SIZE_H, ®_val); + if (ret) + return ret; + buf->output_width = reg_val; + + ret = ov5693_read_reg(client, OV5693_16BIT, + OV5693_VERTICAL_OUTPUT_SIZE_H, ®_val); + if (ret) + return ret; + buf->output_height = reg_val; + + buf->binning_factor_x = res->bin_factor_x ? + res->bin_factor_x : 1; + buf->binning_factor_y = res->bin_factor_y ? + res->bin_factor_y : 1; + return 0; +} + +static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg, + int gain, int digitgain) + +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov5693_device *dev = to_ov5693_sensor(sd); + u16 vts, hts; + int ret, exp_val; + + hts = ov5693_res[dev->fmt_idx].pixels_per_line; + vts = ov5693_res[dev->fmt_idx].lines_per_frame; + /* + * If coarse_itg is larger than 1<<15, can not write to reg directly. + * The way is to write coarse_itg/2 to the reg, meanwhile write 2*hts + * to the reg. + */ + if (coarse_itg > (1 << 15)) { + hts = hts * 2; + coarse_itg = (int)coarse_itg / 2; + } + /* group hold */ + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_GROUP_ACCESS, 0x00); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_GROUP_ACCESS); + return ret; + } + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_TIMING_HTS_H, (hts >> 8) & 0xFF); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_TIMING_HTS_H); + return ret; + } + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_TIMING_HTS_L, hts & 0xFF); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_TIMING_HTS_L); + return ret; + } + /* Increase the VTS to match exposure + MARGIN */ + if (coarse_itg > vts - OV5693_INTEGRATION_TIME_MARGIN) + vts = (u16)coarse_itg + OV5693_INTEGRATION_TIME_MARGIN; + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_TIMING_VTS_H, (vts >> 8) & 0xFF); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_TIMING_VTS_H); + return ret; + } + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_TIMING_VTS_L, vts & 0xFF); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_TIMING_VTS_L); + return ret; + } + + /* set exposure */ + + /* Lower four bit should be 0*/ + exp_val = coarse_itg << 4; + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_EXPOSURE_L, exp_val & 0xFF); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_EXPOSURE_L); + return ret; + } + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_EXPOSURE_M, (exp_val >> 8) & 0xFF); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_EXPOSURE_M); + return ret; + } + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_EXPOSURE_H, (exp_val >> 16) & 0x0F); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_EXPOSURE_H); + return ret; + } + + /* Analog gain */ + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_AGC_L, gain & 0xff); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_AGC_L); + return ret; + } + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_AGC_H, (gain >> 8) & 0xff); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_AGC_H); + return ret; + } + + /* Digital gain */ + if (digitgain) { + ret = ov5693_write_reg(client, OV5693_16BIT, + OV5693_MWB_RED_GAIN_H, digitgain); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_MWB_RED_GAIN_H); + return ret; + } + + ret = ov5693_write_reg(client, OV5693_16BIT, + OV5693_MWB_GREEN_GAIN_H, digitgain); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_MWB_RED_GAIN_H); + return ret; + } + + ret = ov5693_write_reg(client, OV5693_16BIT, + OV5693_MWB_BLUE_GAIN_H, digitgain); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_MWB_RED_GAIN_H); + return ret; + } + } + + /* End group */ + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_GROUP_ACCESS, 0x10); + if (ret) + return ret; + + /* Delay launch group */ + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_GROUP_ACCESS, 0xa0); + if (ret) + return ret; + return ret; +} + +static int ov5693_set_exposure(struct v4l2_subdev *sd, int exposure, + int gain, int digitgain) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + int ret; + + mutex_lock(&dev->input_lock); + ret = __ov5693_set_exposure(sd, exposure, gain, digitgain); + mutex_unlock(&dev->input_lock); + + return ret; +} + +static long ov5693_s_exposure(struct v4l2_subdev *sd, + struct atomisp_exposure *exposure) +{ + u16 coarse_itg = exposure->integration_time[0]; + u16 analog_gain = exposure->gain[0]; + u16 digital_gain = exposure->gain[1]; + + /* we should not accept the invalid value below */ + if (analog_gain == 0) { + struct i2c_client *client = v4l2_get_subdevdata(sd); + + v4l2_err(client, "%s: invalid value\n", __func__); + return -EINVAL; + } + return ov5693_set_exposure(sd, coarse_itg, analog_gain, digital_gain); +} + +static int ov5693_read_otp_reg_array(struct i2c_client *client, u16 size, + u16 addr, u8 *buf) +{ + u16 index; + int ret; + u16 *pVal = NULL; + + for (index = 0; index <= size; index++) { + pVal = (u16 *)(buf + index); + ret = + ov5693_read_reg(client, OV5693_8BIT, addr + index, + pVal); + if (ret) + return ret; + } + + return 0; +} + +static int __ov5693_otp_read(struct v4l2_subdev *sd, u8 *buf) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov5693_device *dev = to_ov5693_sensor(sd); + int ret; + int i; + u8 *b = buf; + + dev->otp_size = 0; + for (i = 1; i < OV5693_OTP_BANK_MAX; i++) { + /*set bank NO and OTP read mode. */ + ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_OTP_BANK_REG, + (i | 0xc0)); //[7:6] 2'b11 [5:0] bank no + if (ret) { + dev_err(&client->dev, "failed to prepare OTP page\n"); + return ret; + } + //pr_debug("write 0x%x->0x%x\n",OV5693_OTP_BANK_REG,(i|0xc0)); + + /*enable read */ + ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_OTP_READ_REG, + OV5693_OTP_MODE_READ); // enable :1 + if (ret) { + dev_err(&client->dev, + "failed to set OTP reading mode page"); + return ret; + } + //pr_debug("write 0x%x->0x%x\n",OV5693_OTP_READ_REG,OV5693_OTP_MODE_READ); + + /* Reading the OTP data array */ + ret = ov5693_read_otp_reg_array(client, OV5693_OTP_BANK_SIZE, + OV5693_OTP_START_ADDR, + b); + if (ret) { + dev_err(&client->dev, "failed to read OTP data\n"); + return ret; + } + + //pr_debug("BANK[%2d] %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", i, *b, *(b+1), *(b+2), *(b+3), *(b+4), *(b+5), *(b+6), *(b+7), *(b+8), *(b+9), *(b+10), *(b+11), *(b+12), *(b+13), *(b+14), *(b+15)); + + //Intel OTP map, try to read 320byts first. + if (i == 21) { + if ((*b) == 0) { + dev->otp_size = 320; + break; + } else { + b = buf; + continue; + } + } else if (i == + 24) { //if the first 320bytes data doesn't not exist, try to read the next 32bytes data. + if ((*b) == 0) { + dev->otp_size = 32; + break; + } else { + b = buf; + continue; + } + } else if (i == + 27) { //if the prvious 32bytes data doesn't exist, try to read the next 32bytes data again. + if ((*b) == 0) { + dev->otp_size = 32; + break; + } else { + dev->otp_size = 0; // no OTP data. + break; + } + } + + b = b + OV5693_OTP_BANK_SIZE; + } + return 0; +} + +/* + * Read otp data and store it into a kmalloced buffer. + * The caller must kfree the buffer when no more needed. + * @size: set to the size of the returned otp data. + */ +static void *ov5693_otp_read(struct v4l2_subdev *sd) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u8 *buf; + int ret; + + buf = devm_kzalloc(&client->dev, (OV5693_OTP_DATA_SIZE + 16), GFP_KERNEL); + if (!buf) + return ERR_PTR(-ENOMEM); + + //otp valid after mipi on and sw stream on + ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_FRAME_OFF_NUM, 0x00); + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_SW_STREAM, OV5693_START_STREAMING); + + ret = __ov5693_otp_read(sd, buf); + + //mipi off and sw stream off after otp read + ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_FRAME_OFF_NUM, 0x0f); + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_SW_STREAM, OV5693_STOP_STREAMING); + + /* Driver has failed to find valid data */ + if (ret) { + dev_err(&client->dev, "sensor found no valid OTP data\n"); + return ERR_PTR(ret); + } + + return buf; +} + +static int ov5693_g_priv_int_data(struct v4l2_subdev *sd, + struct v4l2_private_int_data *priv) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov5693_device *dev = to_ov5693_sensor(sd); + u8 __user *to = priv->data; + u32 read_size = priv->size; + int ret; + + /* No need to copy data if size is 0 */ + if (!read_size) + goto out; + + if (IS_ERR(dev->otp_data)) { + dev_err(&client->dev, "OTP data not available"); + return PTR_ERR(dev->otp_data); + } + + /* Correct read_size value only if bigger than maximum */ + if (read_size > OV5693_OTP_DATA_SIZE) + read_size = OV5693_OTP_DATA_SIZE; + + ret = copy_to_user(to, dev->otp_data, read_size); + if (ret) { + dev_err(&client->dev, "%s: failed to copy OTP data to user\n", + __func__); + return -EFAULT; + } + + pr_debug("%s read_size:%d\n", __func__, read_size); + +out: + /* Return correct size */ + priv->size = dev->otp_size; + + return 0; +} + +static long ov5693_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) +{ + switch (cmd) { + case ATOMISP_IOC_S_EXPOSURE: + return ov5693_s_exposure(sd, arg); + case ATOMISP_IOC_G_SENSOR_PRIV_INT_DATA: + return ov5693_g_priv_int_data(sd, arg); + default: + return -EINVAL; + } + return 0; +} + +/* + * This returns the exposure time being used. This should only be used + * for filling in EXIF data, not for actual image processing. + */ +static int ov5693_q_exposure(struct v4l2_subdev *sd, s32 *value) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u16 reg_v, reg_v2; + int ret; + + /* get exposure */ + ret = ov5693_read_reg(client, OV5693_8BIT, + OV5693_EXPOSURE_L, + ®_v); + if (ret) + goto err; + + ret = ov5693_read_reg(client, OV5693_8BIT, + OV5693_EXPOSURE_M, + ®_v2); + if (ret) + goto err; + + reg_v += reg_v2 << 8; + ret = ov5693_read_reg(client, OV5693_8BIT, + OV5693_EXPOSURE_H, + ®_v2); + if (ret) + goto err; + + *value = reg_v + (((u32)reg_v2 << 16)); +err: + return ret; +} + +static int ad5823_t_focus_vcm(struct v4l2_subdev *sd, u16 val) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + u8 vcm_code; + + ret = ad5823_i2c_read(client, AD5823_REG_VCM_CODE_MSB, &vcm_code); + if (ret) + return ret; + + /* set reg VCM_CODE_MSB Bit[1:0] */ + vcm_code = (vcm_code & VCM_CODE_MSB_MASK) | + ((val >> 8) & ~VCM_CODE_MSB_MASK); + ret = ad5823_i2c_write(client, AD5823_REG_VCM_CODE_MSB, vcm_code); + if (ret) + return ret; + + /* set reg VCM_CODE_LSB Bit[7:0] */ + ret = ad5823_i2c_write(client, AD5823_REG_VCM_CODE_LSB, (val & 0xff)); + if (ret) + return ret; + + /* set required vcm move time */ + vcm_code = AD5823_RESONANCE_PERIOD / AD5823_RESONANCE_COEF + - AD5823_HIGH_FREQ_RANGE; + ret = ad5823_i2c_write(client, AD5823_REG_VCM_MOVE_TIME, vcm_code); + + return ret; +} + +static int ad5823_t_focus_abs(struct v4l2_subdev *sd, s32 value) +{ + value = min(value, AD5823_MAX_FOCUS_POS); + return ad5823_t_focus_vcm(sd, value); +} + +static int ov5693_t_focus_abs(struct v4l2_subdev *sd, s32 value) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + dev_dbg(&client->dev, "%s: FOCUS_POS: 0x%x\n", __func__, value); + value = clamp(value, 0, OV5693_VCM_MAX_FOCUS_POS); + if (dev->vcm == VCM_DW9714) { + if (dev->vcm_update) { + ret = vcm_dw_i2c_write(client, VCM_PROTECTION_OFF); + if (ret) + return ret; + ret = vcm_dw_i2c_write(client, DIRECT_VCM); + if (ret) + return ret; + ret = vcm_dw_i2c_write(client, VCM_PROTECTION_ON); + if (ret) + return ret; + dev->vcm_update = false; + } + ret = vcm_dw_i2c_write(client, + vcm_val(value, VCM_DEFAULT_S)); + } else if (dev->vcm == VCM_AD5823) { + ad5823_t_focus_abs(sd, value); + } + if (ret == 0) { + dev->number_of_steps = value - dev->focus; + dev->focus = value; + dev->timestamp_t_focus_abs = ktime_get(); + } else + dev_err(&client->dev, + "%s: i2c failed. ret %d\n", __func__, ret); + + return ret; +} + +static int ov5693_t_focus_rel(struct v4l2_subdev *sd, s32 value) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + + return ov5693_t_focus_abs(sd, dev->focus + value); +} + +#define DELAY_PER_STEP_NS 1000000 +#define DELAY_MAX_PER_STEP_NS (1000000 * 1023) +static int ov5693_q_focus_status(struct v4l2_subdev *sd, s32 *value) +{ + u32 status = 0; + struct ov5693_device *dev = to_ov5693_sensor(sd); + ktime_t temptime; + ktime_t timedelay = ns_to_ktime(min_t(u32, + abs(dev->number_of_steps) * DELAY_PER_STEP_NS, + DELAY_MAX_PER_STEP_NS)); + + temptime = ktime_sub(ktime_get(), (dev->timestamp_t_focus_abs)); + if (ktime_compare(temptime, timedelay) <= 0) { + status |= ATOMISP_FOCUS_STATUS_MOVING; + status |= ATOMISP_FOCUS_HP_IN_PROGRESS; + } else { + status |= ATOMISP_FOCUS_STATUS_ACCEPTS_NEW_MOVE; + status |= ATOMISP_FOCUS_HP_COMPLETE; + } + + *value = status; + + return 0; +} + +static int ov5693_q_focus_abs(struct v4l2_subdev *sd, s32 *value) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + s32 val; + + ov5693_q_focus_status(sd, &val); + + if (val & ATOMISP_FOCUS_STATUS_MOVING) + *value = dev->focus - dev->number_of_steps; + else + *value = dev->focus; + + return 0; +} + +static int ov5693_t_vcm_slew(struct v4l2_subdev *sd, s32 value) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + + dev->number_of_steps = value; + dev->vcm_update = true; + return 0; +} + +static int ov5693_t_vcm_timing(struct v4l2_subdev *sd, s32 value) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + + dev->number_of_steps = value; + dev->vcm_update = true; + return 0; +} + +static int ov5693_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct ov5693_device *dev = + container_of(ctrl->handler, struct ov5693_device, ctrl_handler); + struct i2c_client *client = v4l2_get_subdevdata(&dev->sd); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_FOCUS_ABSOLUTE: + dev_dbg(&client->dev, "%s: CID_FOCUS_ABSOLUTE:%d.\n", + __func__, ctrl->val); + ret = ov5693_t_focus_abs(&dev->sd, ctrl->val); + break; + case V4L2_CID_FOCUS_RELATIVE: + dev_dbg(&client->dev, "%s: CID_FOCUS_RELATIVE:%d.\n", + __func__, ctrl->val); + ret = ov5693_t_focus_rel(&dev->sd, ctrl->val); + break; + case V4L2_CID_VCM_SLEW: + ret = ov5693_t_vcm_slew(&dev->sd, ctrl->val); + break; + case V4L2_CID_VCM_TIMING: + ret = ov5693_t_vcm_timing(&dev->sd, ctrl->val); + break; + default: + ret = -EINVAL; + } + return ret; +} + +static int ov5693_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct ov5693_device *dev = + container_of(ctrl->handler, struct ov5693_device, ctrl_handler); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_EXPOSURE_ABSOLUTE: + ret = ov5693_q_exposure(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FOCAL_ABSOLUTE: + ret = ov5693_g_focal(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_ABSOLUTE: + ret = ov5693_g_fnumber(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_RANGE: + ret = ov5693_g_fnumber_range(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FOCUS_ABSOLUTE: + ret = ov5693_q_focus_abs(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FOCUS_STATUS: + ret = ov5693_q_focus_status(&dev->sd, &ctrl->val); + break; + case V4L2_CID_BIN_FACTOR_HORZ: + ret = ov5693_g_bin_factor_x(&dev->sd, &ctrl->val); + break; + case V4L2_CID_BIN_FACTOR_VERT: + ret = ov5693_g_bin_factor_y(&dev->sd, &ctrl->val); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static const struct v4l2_ctrl_ops ctrl_ops = { + .s_ctrl = ov5693_s_ctrl, + .g_volatile_ctrl = ov5693_g_volatile_ctrl +}; + +static const struct v4l2_ctrl_config ov5693_controls[] = { + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "exposure", + .min = 0x0, + .max = 0xffff, + .step = 0x01, + .def = 0x00, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focal length", + .min = OV5693_FOCAL_LENGTH_DEFAULT, + .max = OV5693_FOCAL_LENGTH_DEFAULT, + .step = 0x01, + .def = OV5693_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number", + .min = OV5693_F_NUMBER_DEFAULT, + .max = OV5693_F_NUMBER_DEFAULT, + .step = 0x01, + .def = OV5693_F_NUMBER_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number range", + .min = OV5693_F_NUMBER_RANGE, + .max = OV5693_F_NUMBER_RANGE, + .step = 0x01, + .def = OV5693_F_NUMBER_RANGE, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCUS_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focus move absolute", + .min = 0, + .max = OV5693_VCM_MAX_FOCUS_POS, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCUS_RELATIVE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focus move relative", + .min = OV5693_VCM_MAX_FOCUS_NEG, + .max = OV5693_VCM_MAX_FOCUS_POS, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCUS_STATUS, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focus status", + .min = 0, + .max = 100, /* allow enum to grow in the future */ + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_VCM_SLEW, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "vcm slew", + .min = 0, + .max = OV5693_VCM_SLEW_STEP_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_VCM_TIMING, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "vcm step time", + .min = 0, + .max = OV5693_VCM_SLEW_TIME_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_HORZ, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "horizontal binning factor", + .min = 0, + .max = OV5693_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_VERT, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "vertical binning factor", + .min = 0, + .max = OV5693_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, +}; + +static int ov5693_init(struct v4l2_subdev *sd) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + pr_info("%s\n", __func__); + mutex_lock(&dev->input_lock); + dev->vcm_update = false; + + if (dev->vcm == VCM_AD5823) { + ret = vcm_ad_i2c_wr8(client, 0x01, 0x01); /* vcm init test */ + if (ret) + dev_err(&client->dev, + "vcm reset failed\n"); + /*change the mode*/ + ret = ad5823_i2c_write(client, AD5823_REG_VCM_CODE_MSB, + AD5823_RING_CTRL_ENABLE); + if (ret) + dev_err(&client->dev, + "vcm enable ringing failed\n"); + ret = ad5823_i2c_write(client, AD5823_REG_MODE, + AD5823_ARC_RES1); + if (ret) + dev_err(&client->dev, + "vcm change mode failed\n"); + } + + /*change initial focus value for ad5823*/ + if (dev->vcm == VCM_AD5823) { + dev->focus = AD5823_INIT_FOCUS_POS; + ov5693_t_focus_abs(sd, AD5823_INIT_FOCUS_POS); + } else { + dev->focus = 0; + ov5693_t_focus_abs(sd, 0); + } + + mutex_unlock(&dev->input_lock); + + return 0; +} + +static int power_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret; + struct ov5693_device *dev = to_ov5693_sensor(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + /* + * This driver assumes "internal DVDD, PWDNB tied to DOVDD". + * In this set up only gpio0 (XSHUTDN) should be available + * but in some products (for example ECS) gpio1 (PWDNB) is + * also available. If gpio1 is available we emulate it being + * tied to DOVDD here. + */ + if (flag) { + ret = dev->platform_data->v2p8_ctrl(sd, 1); + dev->platform_data->gpio1_ctrl(sd, 1); + if (ret == 0) { + ret = dev->platform_data->v1p8_ctrl(sd, 1); + if (ret) { + dev->platform_data->gpio1_ctrl(sd, 0); + ret = dev->platform_data->v2p8_ctrl(sd, 0); + } + } + } else { + dev->platform_data->gpio1_ctrl(sd, 0); + ret = dev->platform_data->v1p8_ctrl(sd, 0); + ret |= dev->platform_data->v2p8_ctrl(sd, 0); + } + + return ret; +} + +static int gpio_ctrl(struct v4l2_subdev *sd, bool flag) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + return dev->platform_data->gpio0_ctrl(sd, flag); +} + +static int __power_up(struct v4l2_subdev *sd) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + + /* power control */ + ret = power_ctrl(sd, 1); + if (ret) + goto fail_power; + + /* according to DS, at least 5ms is needed between DOVDD and PWDN */ + /* add this delay time to 10~11ms*/ + usleep_range(10000, 11000); + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 1); + if (ret) { + ret = gpio_ctrl(sd, 1); + if (ret) + goto fail_power; + } + + /* flis clock control */ + ret = dev->platform_data->flisclk_ctrl(sd, 1); + if (ret) + goto fail_clk; + + __cci_delay(up_delay); + + return 0; + +fail_clk: + gpio_ctrl(sd, 0); +fail_power: + power_ctrl(sd, 0); + dev_err(&client->dev, "sensor power-up failed\n"); + + return ret; +} + +static int power_down(struct v4l2_subdev *sd) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + dev->focus = OV5693_INVALID_CONFIG; + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + + ret = dev->platform_data->flisclk_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "flisclk failed\n"); + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 0); + if (ret) { + ret = gpio_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "gpio failed 2\n"); + } + + /* power control */ + ret = power_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "vprog failed.\n"); + + return ret; +} + +static int power_up(struct v4l2_subdev *sd) +{ + static const int retry_count = 4; + int i, ret; + + for (i = 0; i < retry_count; i++) { + ret = __power_up(sd); + if (!ret) + return 0; + + power_down(sd); + } + return ret; +} + +static int ov5693_s_power(struct v4l2_subdev *sd, int on) +{ + int ret; + + pr_info("%s: on %d\n", __func__, on); + if (on == 0) + return power_down(sd); + else { + ret = power_up(sd); + if (!ret) { + ret = ov5693_init(sd); + /* restore settings */ + ov5693_res = ov5693_res_preview; + N_RES = N_RES_PREVIEW; + } + } + return ret; +} + +/* + * distance - calculate the distance + * @res: resolution + * @w: width + * @h: height + * + * Get the gap between res_w/res_h and w/h. + * distance = (res_w/res_h - w/h) / (w/h) * 8192 + * res->width/height smaller than w/h wouldn't be considered. + * The gap of ratio larger than 1/8 wouldn't be considered. + * Returns the value of gap or -1 if fail. + */ +#define LARGEST_ALLOWED_RATIO_MISMATCH 1024 +static int distance(struct ov5693_resolution *res, u32 w, u32 h) +{ + int ratio; + int distance; + + if (w == 0 || h == 0 || + res->width < w || res->height < h) + return -1; + + ratio = res->width << 13; + ratio /= w; + ratio *= h; + ratio /= res->height; + + distance = abs(ratio - 8192); + + if (distance > LARGEST_ALLOWED_RATIO_MISMATCH) + return -1; + + return distance; +} + +/* Return the nearest higher resolution index + * Firstly try to find the approximate aspect ratio resolution + * If we find multiple same AR resolutions, choose the + * minimal size. + */ +static int nearest_resolution_index(int w, int h) +{ + int i; + int idx = -1; + int dist; + int min_dist = INT_MAX; + int min_res_w = INT_MAX; + struct ov5693_resolution *tmp_res = NULL; + + for (i = 0; i < N_RES; i++) { + tmp_res = &ov5693_res[i]; + dist = distance(tmp_res, w, h); + if (dist == -1) + continue; + if (dist < min_dist) { + min_dist = dist; + idx = i; + min_res_w = ov5693_res[i].width; + continue; + } + if (dist == min_dist && ov5693_res[i].width < min_res_w) + idx = i; + } + + return idx; +} + +static int get_resolution_index(int w, int h) +{ + int i; + + for (i = 0; i < N_RES; i++) { + if (w != ov5693_res[i].width) + continue; + if (h != ov5693_res[i].height) + continue; + + return i; + } + + return -1; +} + +/* TODO: remove it. */ +static int startup(struct v4l2_subdev *sd) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_SW_RESET, 0x01); + if (ret) { + dev_err(&client->dev, "ov5693 reset err.\n"); + return ret; + } + + ret = ov5693_write_reg_array(client, ov5693_global_setting); + if (ret) { + dev_err(&client->dev, "ov5693 write register err.\n"); + return ret; + } + + ret = ov5693_write_reg_array(client, ov5693_res[dev->fmt_idx].regs); + if (ret) { + dev_err(&client->dev, "ov5693 write register err.\n"); + return ret; + } + + return ret; +} + +static int ov5693_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct camera_mipi_info *ov5693_info = NULL; + int ret = 0; + int idx; + + if (format->pad) + return -EINVAL; + if (!fmt) + return -EINVAL; + ov5693_info = v4l2_get_subdev_hostdata(sd); + if (!ov5693_info) + return -EINVAL; + + mutex_lock(&dev->input_lock); + idx = nearest_resolution_index(fmt->width, fmt->height); + if (idx == -1) { + /* return the largest resolution */ + fmt->width = ov5693_res[N_RES - 1].width; + fmt->height = ov5693_res[N_RES - 1].height; + } else { + fmt->width = ov5693_res[idx].width; + fmt->height = ov5693_res[idx].height; + } + + fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; + if (format->which == V4L2_SUBDEV_FORMAT_TRY) { + sd_state->pads->try_fmt = *fmt; + mutex_unlock(&dev->input_lock); + return 0; + } + + dev->fmt_idx = get_resolution_index(fmt->width, fmt->height); + if (dev->fmt_idx == -1) { + dev_err(&client->dev, "get resolution fail\n"); + mutex_unlock(&dev->input_lock); + return -EINVAL; + } + + ret = startup(sd); + if (ret) { + int i = 0; + + dev_err(&client->dev, "ov5693 startup err, retry to power up\n"); + for (i = 0; i < OV5693_POWER_UP_RETRY_NUM; i++) { + dev_err(&client->dev, + "ov5693 retry to power up %d/%d times, result: ", + i + 1, OV5693_POWER_UP_RETRY_NUM); + power_down(sd); + ret = power_up(sd); + if (!ret) { + mutex_unlock(&dev->input_lock); + ov5693_init(sd); + mutex_lock(&dev->input_lock); + } else { + dev_err(&client->dev, "power up failed, continue\n"); + continue; + } + ret = startup(sd); + if (ret) { + dev_err(&client->dev, " startup FAILED!\n"); + } else { + dev_err(&client->dev, " startup SUCCESS!\n"); + break; + } + } + } + + /* + * After sensor settings are set to HW, sometimes stream is started. + * This would cause ISP timeout because ISP is not ready to receive + * data yet. So add stop streaming here. + */ + ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_SW_STREAM, + OV5693_STOP_STREAMING); + if (ret) + dev_warn(&client->dev, "ov5693 stream off err\n"); + + ret = ov5693_get_intg_factor(client, ov5693_info, + &ov5693_res[dev->fmt_idx]); + if (ret) { + dev_err(&client->dev, "failed to get integration_factor\n"); + goto err; + } + + ov5693_info->metadata_width = fmt->width * 10 / 8; + ov5693_info->metadata_height = 1; + ov5693_info->metadata_effective_width = &ov5693_embedded_effective_size; + +err: + mutex_unlock(&dev->input_lock); + return ret; +} + +static int ov5693_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct ov5693_device *dev = to_ov5693_sensor(sd); + + if (format->pad) + return -EINVAL; + + if (!fmt) + return -EINVAL; + + fmt->width = ov5693_res[dev->fmt_idx].width; + fmt->height = ov5693_res[dev->fmt_idx].height; + fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; + + return 0; +} + +static int ov5693_detect(struct i2c_client *client) +{ + struct i2c_adapter *adapter = client->adapter; + u16 high, low; + int ret; + u16 id; + u8 revision; + + if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) + return -ENODEV; + + ret = ov5693_read_reg(client, OV5693_8BIT, + OV5693_SC_CMMN_CHIP_ID_H, &high); + if (ret) { + dev_err(&client->dev, "sensor_id_high = 0x%x\n", high); + return -ENODEV; + } + ret = ov5693_read_reg(client, OV5693_8BIT, + OV5693_SC_CMMN_CHIP_ID_L, &low); + if (ret) + return ret; + id = ((((u16)high) << 8) | (u16)low); + + if (id != OV5693_ID) { + dev_err(&client->dev, "sensor ID error 0x%x\n", id); + return -ENODEV; + } + + ret = ov5693_read_reg(client, OV5693_8BIT, + OV5693_SC_CMMN_SUB_ID, &high); + revision = (u8)high & 0x0f; + + dev_dbg(&client->dev, "sensor_revision = 0x%x\n", revision); + dev_dbg(&client->dev, "detect ov5693 success\n"); + return 0; +} + +static int ov5693_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + mutex_lock(&dev->input_lock); + + ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_SW_STREAM, + enable ? OV5693_START_STREAMING : + OV5693_STOP_STREAMING); + + mutex_unlock(&dev->input_lock); + + return ret; +} + +static int ov5693_s_config(struct v4l2_subdev *sd, + int irq, void *platform_data) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + if (!platform_data) + return -ENODEV; + + dev->platform_data = + (struct camera_sensor_platform_data *)platform_data; + + mutex_lock(&dev->input_lock); + /* power off the module, then power on it in future + * as first power on by board may not fulfill the + * power on sequqence needed by the module + */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "ov5693 power-off err.\n"); + goto fail_power_off; + } + + ret = power_up(sd); + if (ret) { + dev_err(&client->dev, "ov5693 power-up err.\n"); + goto fail_power_on; + } + + if (!dev->vcm) + dev->vcm = vcm_detect(client); + + ret = dev->platform_data->csi_cfg(sd, 1); + if (ret) + goto fail_csi_cfg; + + /* config & detect sensor */ + ret = ov5693_detect(client); + if (ret) { + dev_err(&client->dev, "ov5693_detect err s_config.\n"); + goto fail_csi_cfg; + } + + dev->otp_data = ov5693_otp_read(sd); + + /* turn off sensor, after probed */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "ov5693 power-off err.\n"); + goto fail_csi_cfg; + } + mutex_unlock(&dev->input_lock); + + return ret; + +fail_csi_cfg: + dev->platform_data->csi_cfg(sd, 0); +fail_power_on: + power_down(sd); + dev_err(&client->dev, "sensor power-gating failed\n"); +fail_power_off: + mutex_unlock(&dev->input_lock); + return ret; +} + +static int ov5693_g_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *interval) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + + interval->interval.numerator = 1; + interval->interval.denominator = ov5693_res[dev->fmt_idx].fps; + + return 0; +} + +static int ov5693_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index >= MAX_FMTS) + return -EINVAL; + + code->code = MEDIA_BUS_FMT_SBGGR10_1X10; + return 0; +} + +static int ov5693_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_frame_size_enum *fse) +{ + int index = fse->index; + + if (index >= N_RES) + return -EINVAL; + + fse->min_width = ov5693_res[index].width; + fse->min_height = ov5693_res[index].height; + fse->max_width = ov5693_res[index].width; + fse->max_height = ov5693_res[index].height; + + return 0; +} + +static const struct v4l2_subdev_video_ops ov5693_video_ops = { + .s_stream = ov5693_s_stream, + .g_frame_interval = ov5693_g_frame_interval, +}; + +static const struct v4l2_subdev_core_ops ov5693_core_ops = { + .s_power = ov5693_s_power, + .ioctl = ov5693_ioctl, +}; + +static const struct v4l2_subdev_pad_ops ov5693_pad_ops = { + .enum_mbus_code = ov5693_enum_mbus_code, + .enum_frame_size = ov5693_enum_frame_size, + .get_fmt = ov5693_get_fmt, + .set_fmt = ov5693_set_fmt, +}; + +static const struct v4l2_subdev_ops ov5693_ops = { + .core = &ov5693_core_ops, + .video = &ov5693_video_ops, + .pad = &ov5693_pad_ops, +}; + +static void ov5693_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov5693_device *dev = to_ov5693_sensor(sd); + + dev_dbg(&client->dev, "ov5693_remove...\n"); + + dev->platform_data->csi_cfg(sd, 0); + + v4l2_device_unregister_subdev(sd); + + atomisp_gmin_remove_subdev(sd); + + media_entity_cleanup(&dev->sd.entity); + v4l2_ctrl_handler_free(&dev->ctrl_handler); + kfree(dev); +} + +static int ov5693_probe(struct i2c_client *client) +{ + struct ov5693_device *dev; + int i2c; + int ret; + void *pdata; + unsigned int i; + + /* + * Firmware workaround: Some modules use a "secondary default" + * address of 0x10 which doesn't appear on schematics, and + * some BIOS versions haven't gotten the memo. Work around + * via config. + */ + i2c = gmin_get_var_int(&client->dev, false, "I2CAddr", -1); + if (i2c != -1) { + dev_info(&client->dev, + "Overriding firmware-provided I2C address (0x%x) with 0x%x\n", + client->addr, i2c); + client->addr = i2c; + } + + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + mutex_init(&dev->input_lock); + + dev->fmt_idx = 0; + v4l2_i2c_subdev_init(&dev->sd, client, &ov5693_ops); + + pdata = gmin_camera_platform_data(&dev->sd, + ATOMISP_INPUT_FORMAT_RAW_10, + atomisp_bayer_order_bggr); + if (!pdata) { + ret = -EINVAL; + goto out_free; + } + + ret = ov5693_s_config(&dev->sd, client->irq, pdata); + if (ret) + goto out_free; + + ret = atomisp_register_i2c_module(&dev->sd, pdata, RAW_CAMERA); + if (ret) + goto out_free; + + dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + dev->pad.flags = MEDIA_PAD_FL_SOURCE; + dev->format.code = MEDIA_BUS_FMT_SBGGR10_1X10; + dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; + ret = + v4l2_ctrl_handler_init(&dev->ctrl_handler, + ARRAY_SIZE(ov5693_controls)); + if (ret) { + ov5693_remove(client); + return ret; + } + + for (i = 0; i < ARRAY_SIZE(ov5693_controls); i++) + v4l2_ctrl_new_custom(&dev->ctrl_handler, &ov5693_controls[i], + NULL); + + if (dev->ctrl_handler.error) { + ov5693_remove(client); + return dev->ctrl_handler.error; + } + + /* Use same lock for controls as for everything else. */ + dev->ctrl_handler.lock = &dev->input_lock; + dev->sd.ctrl_handler = &dev->ctrl_handler; + + ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad); + if (ret) + ov5693_remove(client); + + return ret; +out_free: + v4l2_device_unregister_subdev(&dev->sd); + kfree(dev); + return ret; +} + +static const struct acpi_device_id ov5693_acpi_match[] = { + {"INT33BE"}, + {}, +}; +MODULE_DEVICE_TABLE(acpi, ov5693_acpi_match); + +static struct i2c_driver ov5693_driver = { + .driver = { + .name = "ov5693", + .acpi_match_table = ov5693_acpi_match, + }, + .probe_new = ov5693_probe, + .remove = ov5693_remove, +}; +module_i2c_driver(ov5693_driver); + +MODULE_DESCRIPTION("A low-level driver for OmniVision 5693 sensors"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/atomisp/i2c/ov5693/ov5693.h b/drivers/staging/media/atomisp/i2c/ov5693/ov5693.h new file mode 100644 index 000000000..a1366666f --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/ov5693/ov5693.h @@ -0,0 +1,1392 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Support for OmniVision OV5693 5M camera sensor. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __OV5693_H__ +#define __OV5693_H__ +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/i2c.h> +#include <linux/delay.h> +#include <linux/videodev2.h> +#include <linux/spinlock.h> +#include <media/v4l2-subdev.h> +#include <media/v4l2-device.h> +#include <media/v4l2-ctrls.h> +#include <linux/v4l2-mediabus.h> +#include <media/media-entity.h> + +#include "../../include/linux/atomisp_platform.h" + +/* + * FIXME: non-preview resolutions are currently broken + */ +#define ENABLE_NON_PREVIEW 0 + +#define OV5693_POWER_UP_RETRY_NUM 5 + +/* Defines for register writes and register array processing */ +#define I2C_MSG_LENGTH 0x2 +#define I2C_RETRY_COUNT 5 + +#define OV5693_FOCAL_LENGTH_NUM 334 /*3.34mm*/ +#define OV5693_FOCAL_LENGTH_DEM 100 +#define OV5693_F_NUMBER_DEFAULT_NUM 24 +#define OV5693_F_NUMBER_DEM 10 + +#define MAX_FMTS 1 + +/* sensor_mode_data read_mode adaptation */ +#define OV5693_READ_MODE_BINNING_ON 0x0400 +#define OV5693_READ_MODE_BINNING_OFF 0x00 +#define OV5693_INTEGRATION_TIME_MARGIN 8 + +#define OV5693_MAX_EXPOSURE_VALUE 0xFFF1 +#define OV5693_MAX_GAIN_VALUE 0xFF + +/* + * focal length bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define OV5693_FOCAL_LENGTH_DEFAULT 0x1B70064 + +/* + * current f-number bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define OV5693_F_NUMBER_DEFAULT 0x18000a + +/* + * f-number range bits definition: + * bits 31-24: max f-number numerator + * bits 23-16: max f-number denominator + * bits 15-8: min f-number numerator + * bits 7-0: min f-number denominator + */ +#define OV5693_F_NUMBER_RANGE 0x180a180a +#define OV5693_ID 0x5690 + +#define OV5693_FINE_INTG_TIME_MIN 0 +#define OV5693_FINE_INTG_TIME_MAX_MARGIN 0 +#define OV5693_COARSE_INTG_TIME_MIN 1 +#define OV5693_COARSE_INTG_TIME_MAX_MARGIN 6 + +#define OV5693_BIN_FACTOR_MAX 4 +/* + * OV5693 System control registers + */ +#define OV5693_SW_SLEEP 0x0100 +#define OV5693_SW_RESET 0x0103 +#define OV5693_SW_STREAM 0x0100 + +#define OV5693_SC_CMMN_CHIP_ID_H 0x300A +#define OV5693_SC_CMMN_CHIP_ID_L 0x300B +#define OV5693_SC_CMMN_SCCB_ID 0x300C +#define OV5693_SC_CMMN_SUB_ID 0x302A /* process, version*/ +/*Bit[7:4] Group control, Bit[3:0] Group ID*/ +#define OV5693_GROUP_ACCESS 0x3208 +/* +*Bit[3:0] Bit[19:16] of exposure, +*remaining 16 bits lies in Reg0x3501&Reg0x3502 +*/ +#define OV5693_EXPOSURE_H 0x3500 +#define OV5693_EXPOSURE_M 0x3501 +#define OV5693_EXPOSURE_L 0x3502 +/*Bit[1:0] means Bit[9:8] of gain*/ +#define OV5693_AGC_H 0x350A +#define OV5693_AGC_L 0x350B /*Bit[7:0] of gain*/ + +#define OV5693_HORIZONTAL_START_H 0x3800 /*Bit[11:8]*/ +#define OV5693_HORIZONTAL_START_L 0x3801 /*Bit[7:0]*/ +#define OV5693_VERTICAL_START_H 0x3802 /*Bit[11:8]*/ +#define OV5693_VERTICAL_START_L 0x3803 /*Bit[7:0]*/ +#define OV5693_HORIZONTAL_END_H 0x3804 /*Bit[11:8]*/ +#define OV5693_HORIZONTAL_END_L 0x3805 /*Bit[7:0]*/ +#define OV5693_VERTICAL_END_H 0x3806 /*Bit[11:8]*/ +#define OV5693_VERTICAL_END_L 0x3807 /*Bit[7:0]*/ +#define OV5693_HORIZONTAL_OUTPUT_SIZE_H 0x3808 /*Bit[3:0]*/ +#define OV5693_HORIZONTAL_OUTPUT_SIZE_L 0x3809 /*Bit[7:0]*/ +#define OV5693_VERTICAL_OUTPUT_SIZE_H 0x380a /*Bit[3:0]*/ +#define OV5693_VERTICAL_OUTPUT_SIZE_L 0x380b /*Bit[7:0]*/ +/*High 8-bit, and low 8-bit HTS address is 0x380d*/ +#define OV5693_TIMING_HTS_H 0x380C +/*High 8-bit, and low 8-bit HTS address is 0x380d*/ +#define OV5693_TIMING_HTS_L 0x380D +/*High 8-bit, and low 8-bit HTS address is 0x380f*/ +#define OV5693_TIMING_VTS_H 0x380e +/*High 8-bit, and low 8-bit HTS address is 0x380f*/ +#define OV5693_TIMING_VTS_L 0x380f + +#define OV5693_MWB_RED_GAIN_H 0x3400 +#define OV5693_MWB_GREEN_GAIN_H 0x3402 +#define OV5693_MWB_BLUE_GAIN_H 0x3404 +#define OV5693_MWB_GAIN_MAX 0x0fff + +#define OV5693_START_STREAMING 0x01 +#define OV5693_STOP_STREAMING 0x00 + +#define VCM_ADDR 0x0c +#define VCM_CODE_MSB 0x04 + +#define OV5693_INVALID_CONFIG 0xffffffff + +#define OV5693_VCM_SLEW_STEP 0x30F0 +#define OV5693_VCM_SLEW_STEP_MAX 0x7 +#define OV5693_VCM_SLEW_STEP_MASK 0x7 +#define OV5693_VCM_CODE 0x30F2 +#define OV5693_VCM_SLEW_TIME 0x30F4 +#define OV5693_VCM_SLEW_TIME_MAX 0xffff +#define OV5693_VCM_ENABLE 0x8000 + +#define OV5693_VCM_MAX_FOCUS_NEG -1023 +#define OV5693_VCM_MAX_FOCUS_POS 1023 + +#define DLC_ENABLE 1 +#define DLC_DISABLE 0 +#define VCM_PROTECTION_OFF 0xeca3 +#define VCM_PROTECTION_ON 0xdc51 +#define VCM_DEFAULT_S 0x0 +#define vcm_step_s(a) (u8)(a & 0xf) +#define vcm_step_mclk(a) (u8)((a >> 4) & 0x3) +#define vcm_dlc_mclk(dlc, mclk) (u16)((dlc << 3) | mclk | 0xa104) +#define vcm_tsrc(tsrc) (u16)(tsrc << 3 | 0xf200) +#define vcm_val(data, s) (u16)(data << 4 | s) +#define DIRECT_VCM vcm_dlc_mclk(0, 0) + +/* Defines for OTP Data Registers */ +#define OV5693_FRAME_OFF_NUM 0x4202 +#define OV5693_OTP_BYTE_MAX 32 //change to 32 as needed by otpdata +#define OV5693_OTP_SHORT_MAX 16 +#define OV5693_OTP_START_ADDR 0x3D00 +#define OV5693_OTP_END_ADDR 0x3D0F +#define OV5693_OTP_DATA_SIZE 320 +#define OV5693_OTP_PROGRAM_REG 0x3D80 +#define OV5693_OTP_READ_REG 0x3D81 // 1:Enable 0:disable +#define OV5693_OTP_BANK_REG 0x3D84 //otp bank and mode +#define OV5693_OTP_READY_REG_DONE 1 +#define OV5693_OTP_BANK_MAX 28 +#define OV5693_OTP_BANK_SIZE 16 //16 bytes per bank +#define OV5693_OTP_READ_ONETIME 16 +#define OV5693_OTP_MODE_READ 1 + +struct regval_list { + u16 reg_num; + u8 value; +}; + +struct ov5693_resolution { + u8 *desc; + const struct ov5693_reg *regs; + int res; + int width; + int height; + int fps; + int pix_clk_freq; + u16 pixels_per_line; + u16 lines_per_frame; + u8 bin_factor_x; + u8 bin_factor_y; + u8 bin_mode; + bool used; +}; + +struct ov5693_format { + u8 *desc; + u32 pixelformat; + struct ov5693_reg *regs; +}; + +enum vcm_type { + VCM_UNKNOWN, + VCM_AD5823, + VCM_DW9714, +}; + +/* + * ov5693 device structure. + */ +struct ov5693_device { + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_mbus_framefmt format; + struct mutex input_lock; + struct v4l2_ctrl_handler ctrl_handler; + + struct camera_sensor_platform_data *platform_data; + ktime_t timestamp_t_focus_abs; + int vt_pix_clk_freq_mhz; + int fmt_idx; + int run_mode; + int otp_size; + u8 *otp_data; + u32 focus; + s16 number_of_steps; + u8 res; + u8 type; + bool vcm_update; + enum vcm_type vcm; +}; + +enum ov5693_tok_type { + OV5693_8BIT = 0x0001, + OV5693_16BIT = 0x0002, + OV5693_32BIT = 0x0004, + OV5693_TOK_TERM = 0xf000, /* terminating token for reg list */ + OV5693_TOK_DELAY = 0xfe00, /* delay token for reg list */ + OV5693_TOK_MASK = 0xfff0 +}; + +/** + * struct ov5693_reg - MI sensor register format + * @type: type of the register + * @reg: 16-bit offset to register + * @val: 8/16/32-bit register value + * + * Define a structure for sensor register initialization values + */ +struct ov5693_reg { + enum ov5693_tok_type type; + u16 reg; + u32 val; /* @set value for read/mod/write, @mask */ +}; + +#define to_ov5693_sensor(x) container_of(x, struct ov5693_device, sd) + +#define OV5693_MAX_WRITE_BUF_SIZE 30 + +struct ov5693_write_buffer { + u16 addr; + u8 data[OV5693_MAX_WRITE_BUF_SIZE]; +}; + +struct ov5693_write_ctrl { + int index; + struct ov5693_write_buffer buffer; +}; + +static struct ov5693_reg const ov5693_global_setting[] = { + {OV5693_8BIT, 0x0103, 0x01}, + {OV5693_8BIT, 0x3001, 0x0a}, + {OV5693_8BIT, 0x3002, 0x80}, + {OV5693_8BIT, 0x3006, 0x00}, + {OV5693_8BIT, 0x3011, 0x21}, + {OV5693_8BIT, 0x3012, 0x09}, + {OV5693_8BIT, 0x3013, 0x10}, + {OV5693_8BIT, 0x3014, 0x00}, + {OV5693_8BIT, 0x3015, 0x08}, + {OV5693_8BIT, 0x3016, 0xf0}, + {OV5693_8BIT, 0x3017, 0xf0}, + {OV5693_8BIT, 0x3018, 0xf0}, + {OV5693_8BIT, 0x301b, 0xb4}, + {OV5693_8BIT, 0x301d, 0x02}, + {OV5693_8BIT, 0x3021, 0x00}, + {OV5693_8BIT, 0x3022, 0x01}, + {OV5693_8BIT, 0x3028, 0x44}, + {OV5693_8BIT, 0x3098, 0x02}, + {OV5693_8BIT, 0x3099, 0x19}, + {OV5693_8BIT, 0x309a, 0x02}, + {OV5693_8BIT, 0x309b, 0x01}, + {OV5693_8BIT, 0x309c, 0x00}, + {OV5693_8BIT, 0x30a0, 0xd2}, + {OV5693_8BIT, 0x30a2, 0x01}, + {OV5693_8BIT, 0x30b2, 0x00}, + {OV5693_8BIT, 0x30b3, 0x7d}, + {OV5693_8BIT, 0x30b4, 0x03}, + {OV5693_8BIT, 0x30b5, 0x04}, + {OV5693_8BIT, 0x30b6, 0x01}, + {OV5693_8BIT, 0x3104, 0x21}, + {OV5693_8BIT, 0x3106, 0x00}, + {OV5693_8BIT, 0x3400, 0x04}, + {OV5693_8BIT, 0x3401, 0x00}, + {OV5693_8BIT, 0x3402, 0x04}, + {OV5693_8BIT, 0x3403, 0x00}, + {OV5693_8BIT, 0x3404, 0x04}, + {OV5693_8BIT, 0x3405, 0x00}, + {OV5693_8BIT, 0x3406, 0x01}, + {OV5693_8BIT, 0x3500, 0x00}, + {OV5693_8BIT, 0x3503, 0x07}, + {OV5693_8BIT, 0x3504, 0x00}, + {OV5693_8BIT, 0x3505, 0x00}, + {OV5693_8BIT, 0x3506, 0x00}, + {OV5693_8BIT, 0x3507, 0x02}, + {OV5693_8BIT, 0x3508, 0x00}, + {OV5693_8BIT, 0x3509, 0x10}, + {OV5693_8BIT, 0x350a, 0x00}, + {OV5693_8BIT, 0x350b, 0x40}, + {OV5693_8BIT, 0x3601, 0x0a}, + {OV5693_8BIT, 0x3602, 0x38}, + {OV5693_8BIT, 0x3612, 0x80}, + {OV5693_8BIT, 0x3620, 0x54}, + {OV5693_8BIT, 0x3621, 0xc7}, + {OV5693_8BIT, 0x3622, 0x0f}, + {OV5693_8BIT, 0x3625, 0x10}, + {OV5693_8BIT, 0x3630, 0x55}, + {OV5693_8BIT, 0x3631, 0xf4}, + {OV5693_8BIT, 0x3632, 0x00}, + {OV5693_8BIT, 0x3633, 0x34}, + {OV5693_8BIT, 0x3634, 0x02}, + {OV5693_8BIT, 0x364d, 0x0d}, + {OV5693_8BIT, 0x364f, 0xdd}, + {OV5693_8BIT, 0x3660, 0x04}, + {OV5693_8BIT, 0x3662, 0x10}, + {OV5693_8BIT, 0x3663, 0xf1}, + {OV5693_8BIT, 0x3665, 0x00}, + {OV5693_8BIT, 0x3666, 0x20}, + {OV5693_8BIT, 0x3667, 0x00}, + {OV5693_8BIT, 0x366a, 0x80}, + {OV5693_8BIT, 0x3680, 0xe0}, + {OV5693_8BIT, 0x3681, 0x00}, + {OV5693_8BIT, 0x3700, 0x42}, + {OV5693_8BIT, 0x3701, 0x14}, + {OV5693_8BIT, 0x3702, 0xa0}, + {OV5693_8BIT, 0x3703, 0xd8}, + {OV5693_8BIT, 0x3704, 0x78}, + {OV5693_8BIT, 0x3705, 0x02}, + {OV5693_8BIT, 0x370a, 0x00}, + {OV5693_8BIT, 0x370b, 0x20}, + {OV5693_8BIT, 0x370c, 0x0c}, + {OV5693_8BIT, 0x370d, 0x11}, + {OV5693_8BIT, 0x370e, 0x00}, + {OV5693_8BIT, 0x370f, 0x40}, + {OV5693_8BIT, 0x3710, 0x00}, + {OV5693_8BIT, 0x371a, 0x1c}, + {OV5693_8BIT, 0x371b, 0x05}, + {OV5693_8BIT, 0x371c, 0x01}, + {OV5693_8BIT, 0x371e, 0xa1}, + {OV5693_8BIT, 0x371f, 0x0c}, + {OV5693_8BIT, 0x3721, 0x00}, + {OV5693_8BIT, 0x3724, 0x10}, + {OV5693_8BIT, 0x3726, 0x00}, + {OV5693_8BIT, 0x372a, 0x01}, + {OV5693_8BIT, 0x3730, 0x10}, + {OV5693_8BIT, 0x3738, 0x22}, + {OV5693_8BIT, 0x3739, 0xe5}, + {OV5693_8BIT, 0x373a, 0x50}, + {OV5693_8BIT, 0x373b, 0x02}, + {OV5693_8BIT, 0x373c, 0x41}, + {OV5693_8BIT, 0x373f, 0x02}, + {OV5693_8BIT, 0x3740, 0x42}, + {OV5693_8BIT, 0x3741, 0x02}, + {OV5693_8BIT, 0x3742, 0x18}, + {OV5693_8BIT, 0x3743, 0x01}, + {OV5693_8BIT, 0x3744, 0x02}, + {OV5693_8BIT, 0x3747, 0x10}, + {OV5693_8BIT, 0x374c, 0x04}, + {OV5693_8BIT, 0x3751, 0xf0}, + {OV5693_8BIT, 0x3752, 0x00}, + {OV5693_8BIT, 0x3753, 0x00}, + {OV5693_8BIT, 0x3754, 0xc0}, + {OV5693_8BIT, 0x3755, 0x00}, + {OV5693_8BIT, 0x3756, 0x1a}, + {OV5693_8BIT, 0x3758, 0x00}, + {OV5693_8BIT, 0x3759, 0x0f}, + {OV5693_8BIT, 0x376b, 0x44}, + {OV5693_8BIT, 0x375c, 0x04}, + {OV5693_8BIT, 0x3774, 0x10}, + {OV5693_8BIT, 0x3776, 0x00}, + {OV5693_8BIT, 0x377f, 0x08}, + {OV5693_8BIT, 0x3780, 0x22}, + {OV5693_8BIT, 0x3781, 0x0c}, + {OV5693_8BIT, 0x3784, 0x2c}, + {OV5693_8BIT, 0x3785, 0x1e}, + {OV5693_8BIT, 0x378f, 0xf5}, + {OV5693_8BIT, 0x3791, 0xb0}, + {OV5693_8BIT, 0x3795, 0x00}, + {OV5693_8BIT, 0x3796, 0x64}, + {OV5693_8BIT, 0x3797, 0x11}, + {OV5693_8BIT, 0x3798, 0x30}, + {OV5693_8BIT, 0x3799, 0x41}, + {OV5693_8BIT, 0x379a, 0x07}, + {OV5693_8BIT, 0x379b, 0xb0}, + {OV5693_8BIT, 0x379c, 0x0c}, + {OV5693_8BIT, 0x37c5, 0x00}, + {OV5693_8BIT, 0x37c6, 0x00}, + {OV5693_8BIT, 0x37c7, 0x00}, + {OV5693_8BIT, 0x37c9, 0x00}, + {OV5693_8BIT, 0x37ca, 0x00}, + {OV5693_8BIT, 0x37cb, 0x00}, + {OV5693_8BIT, 0x37de, 0x00}, + {OV5693_8BIT, 0x37df, 0x00}, + {OV5693_8BIT, 0x3800, 0x00}, + {OV5693_8BIT, 0x3801, 0x00}, + {OV5693_8BIT, 0x3802, 0x00}, + {OV5693_8BIT, 0x3804, 0x0a}, + {OV5693_8BIT, 0x3805, 0x3f}, + {OV5693_8BIT, 0x3810, 0x00}, + {OV5693_8BIT, 0x3812, 0x00}, + {OV5693_8BIT, 0x3823, 0x00}, + {OV5693_8BIT, 0x3824, 0x00}, + {OV5693_8BIT, 0x3825, 0x00}, + {OV5693_8BIT, 0x3826, 0x00}, + {OV5693_8BIT, 0x3827, 0x00}, + {OV5693_8BIT, 0x382a, 0x04}, + {OV5693_8BIT, 0x3a04, 0x06}, + {OV5693_8BIT, 0x3a05, 0x14}, + {OV5693_8BIT, 0x3a06, 0x00}, + {OV5693_8BIT, 0x3a07, 0xfe}, + {OV5693_8BIT, 0x3b00, 0x00}, + {OV5693_8BIT, 0x3b02, 0x00}, + {OV5693_8BIT, 0x3b03, 0x00}, + {OV5693_8BIT, 0x3b04, 0x00}, + {OV5693_8BIT, 0x3b05, 0x00}, + {OV5693_8BIT, 0x3e07, 0x20}, + {OV5693_8BIT, 0x4000, 0x08}, + {OV5693_8BIT, 0x4001, 0x04}, + {OV5693_8BIT, 0x4002, 0x45}, + {OV5693_8BIT, 0x4004, 0x08}, + {OV5693_8BIT, 0x4005, 0x18}, + {OV5693_8BIT, 0x4006, 0x20}, + {OV5693_8BIT, 0x4008, 0x24}, + {OV5693_8BIT, 0x4009, 0x10}, + {OV5693_8BIT, 0x400c, 0x00}, + {OV5693_8BIT, 0x400d, 0x00}, + {OV5693_8BIT, 0x4058, 0x00}, + {OV5693_8BIT, 0x404e, 0x37}, + {OV5693_8BIT, 0x404f, 0x8f}, + {OV5693_8BIT, 0x4058, 0x00}, + {OV5693_8BIT, 0x4101, 0xb2}, + {OV5693_8BIT, 0x4303, 0x00}, + {OV5693_8BIT, 0x4304, 0x08}, + {OV5693_8BIT, 0x4307, 0x31}, + {OV5693_8BIT, 0x4311, 0x04}, + {OV5693_8BIT, 0x4315, 0x01}, + {OV5693_8BIT, 0x4511, 0x05}, + {OV5693_8BIT, 0x4512, 0x01}, + {OV5693_8BIT, 0x4806, 0x00}, + {OV5693_8BIT, 0x4816, 0x52}, + {OV5693_8BIT, 0x481f, 0x30}, + {OV5693_8BIT, 0x4826, 0x2c}, + {OV5693_8BIT, 0x4831, 0x64}, + {OV5693_8BIT, 0x4d00, 0x04}, + {OV5693_8BIT, 0x4d01, 0x71}, + {OV5693_8BIT, 0x4d02, 0xfd}, + {OV5693_8BIT, 0x4d03, 0xf5}, + {OV5693_8BIT, 0x4d04, 0x0c}, + {OV5693_8BIT, 0x4d05, 0xcc}, + {OV5693_8BIT, 0x4837, 0x0a}, + {OV5693_8BIT, 0x5000, 0x06}, + {OV5693_8BIT, 0x5001, 0x01}, + {OV5693_8BIT, 0x5003, 0x20}, + {OV5693_8BIT, 0x5046, 0x0a}, + {OV5693_8BIT, 0x5013, 0x00}, + {OV5693_8BIT, 0x5046, 0x0a}, + {OV5693_8BIT, 0x5780, 0x1c}, + {OV5693_8BIT, 0x5786, 0x20}, + {OV5693_8BIT, 0x5787, 0x10}, + {OV5693_8BIT, 0x5788, 0x18}, + {OV5693_8BIT, 0x578a, 0x04}, + {OV5693_8BIT, 0x578b, 0x02}, + {OV5693_8BIT, 0x578c, 0x02}, + {OV5693_8BIT, 0x578e, 0x06}, + {OV5693_8BIT, 0x578f, 0x02}, + {OV5693_8BIT, 0x5790, 0x02}, + {OV5693_8BIT, 0x5791, 0xff}, + {OV5693_8BIT, 0x5842, 0x01}, + {OV5693_8BIT, 0x5843, 0x2b}, + {OV5693_8BIT, 0x5844, 0x01}, + {OV5693_8BIT, 0x5845, 0x92}, + {OV5693_8BIT, 0x5846, 0x01}, + {OV5693_8BIT, 0x5847, 0x8f}, + {OV5693_8BIT, 0x5848, 0x01}, + {OV5693_8BIT, 0x5849, 0x0c}, + {OV5693_8BIT, 0x5e00, 0x00}, + {OV5693_8BIT, 0x5e10, 0x0c}, + {OV5693_8BIT, 0x0100, 0x00}, + {OV5693_TOK_TERM, 0, 0} +}; + +#if ENABLE_NON_PREVIEW +/* + * 654x496 30fps 17ms VBlanking 2lane 10Bit (Scaling) + */ +static struct ov5693_reg const ov5693_654x496[] = { + {OV5693_8BIT, 0x3501, 0x3d}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe6}, + {OV5693_8BIT, 0x3709, 0xc7}, + {OV5693_8BIT, 0x3803, 0x00}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0xa3}, + {OV5693_8BIT, 0x3808, 0x02}, + {OV5693_8BIT, 0x3809, 0x90}, + {OV5693_8BIT, 0x380a, 0x01}, + {OV5693_8BIT, 0x380b, 0xf0}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x08}, + {OV5693_8BIT, 0x3813, 0x02}, + {OV5693_8BIT, 0x3814, 0x31}, + {OV5693_8BIT, 0x3815, 0x31}, + {OV5693_8BIT, 0x3820, 0x04}, + {OV5693_8BIT, 0x3821, 0x1f}, + {OV5693_8BIT, 0x5002, 0x80}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +/* + * 1296x976 30fps 17ms VBlanking 2lane 10Bit (Scaling) +*DS from 2592x1952 +*/ +static struct ov5693_reg const ov5693_1296x976[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + + {OV5693_8BIT, 0x3800, 0x00}, + {OV5693_8BIT, 0x3801, 0x00}, + {OV5693_8BIT, 0x3802, 0x00}, + {OV5693_8BIT, 0x3803, 0x00}, + + {OV5693_8BIT, 0x3804, 0x0a}, + {OV5693_8BIT, 0x3805, 0x3f}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0xA3}, + + {OV5693_8BIT, 0x3808, 0x05}, + {OV5693_8BIT, 0x3809, 0x10}, + {OV5693_8BIT, 0x380a, 0x03}, + {OV5693_8BIT, 0x380b, 0xD0}, + + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + + {OV5693_8BIT, 0x3810, 0x00}, + {OV5693_8BIT, 0x3811, 0x10}, + {OV5693_8BIT, 0x3812, 0x00}, + {OV5693_8BIT, 0x3813, 0x02}, + + {OV5693_8BIT, 0x3814, 0x11}, /*X subsample control*/ + {OV5693_8BIT, 0x3815, 0x11}, /*Y subsample control*/ + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_8BIT, 0x5041, 0x84}, /* scale is auto enabled */ + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} + +}; + +/* + * 336x256 30fps 17ms VBlanking 2lane 10Bit (Scaling) + DS from 2564x1956 + */ +static struct ov5693_reg const ov5693_336x256[] = { + {OV5693_8BIT, 0x3501, 0x3d}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe6}, + {OV5693_8BIT, 0x3709, 0xc7}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0xa3}, + {OV5693_8BIT, 0x3808, 0x01}, + {OV5693_8BIT, 0x3809, 0x50}, + {OV5693_8BIT, 0x380a, 0x01}, + {OV5693_8BIT, 0x380b, 0x00}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x1E}, + {OV5693_8BIT, 0x3814, 0x31}, + {OV5693_8BIT, 0x3815, 0x31}, + {OV5693_8BIT, 0x3820, 0x04}, + {OV5693_8BIT, 0x3821, 0x1f}, + {OV5693_8BIT, 0x5002, 0x80}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +/* + * 336x256 30fps 17ms VBlanking 2lane 10Bit (Scaling) + DS from 2368x1956 + */ +static struct ov5693_reg const ov5693_368x304[] = { + {OV5693_8BIT, 0x3501, 0x3d}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe6}, + {OV5693_8BIT, 0x3709, 0xc7}, + {OV5693_8BIT, 0x3808, 0x01}, + {OV5693_8BIT, 0x3809, 0x70}, + {OV5693_8BIT, 0x380a, 0x01}, + {OV5693_8BIT, 0x380b, 0x30}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x80}, + {OV5693_8BIT, 0x3814, 0x31}, + {OV5693_8BIT, 0x3815, 0x31}, + {OV5693_8BIT, 0x3820, 0x04}, + {OV5693_8BIT, 0x3821, 0x1f}, + {OV5693_8BIT, 0x5002, 0x80}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +/* + * ov5693_192x160 30fps 17ms VBlanking 2lane 10Bit (Scaling) + DS from 2460x1956 + */ +static struct ov5693_reg const ov5693_192x160[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x80}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3804, 0x0a}, + {OV5693_8BIT, 0x3805, 0x3f}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0xA3}, + {OV5693_8BIT, 0x3808, 0x00}, + {OV5693_8BIT, 0x3809, 0xC0}, + {OV5693_8BIT, 0x380a, 0x00}, + {OV5693_8BIT, 0x380b, 0xA0}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x40}, + {OV5693_8BIT, 0x3813, 0x00}, + {OV5693_8BIT, 0x3814, 0x31}, + {OV5693_8BIT, 0x3815, 0x31}, + {OV5693_8BIT, 0x3820, 0x04}, + {OV5693_8BIT, 0x3821, 0x1f}, + {OV5693_8BIT, 0x5002, 0x80}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +static struct ov5693_reg const ov5693_736x496[] = { + {OV5693_8BIT, 0x3501, 0x3d}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe6}, + {OV5693_8BIT, 0x3709, 0xc7}, + {OV5693_8BIT, 0x3803, 0x68}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0x3b}, + {OV5693_8BIT, 0x3808, 0x02}, + {OV5693_8BIT, 0x3809, 0xe0}, + {OV5693_8BIT, 0x380a, 0x01}, + {OV5693_8BIT, 0x380b, 0xf0}, + {OV5693_8BIT, 0x380c, 0x0a}, /*hts*/ + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, /*vts*/ + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x08}, + {OV5693_8BIT, 0x3813, 0x02}, + {OV5693_8BIT, 0x3814, 0x31}, + {OV5693_8BIT, 0x3815, 0x31}, + {OV5693_8BIT, 0x3820, 0x04}, + {OV5693_8BIT, 0x3821, 0x1f}, + {OV5693_8BIT, 0x5002, 0x80}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; +#endif + +/* +static struct ov5693_reg const ov5693_736x496[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe6}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3803, 0x00}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0xa3}, + {OV5693_8BIT, 0x3808, 0x02}, + {OV5693_8BIT, 0x3809, 0xe0}, + {OV5693_8BIT, 0x380a, 0x01}, + {OV5693_8BIT, 0x380b, 0xf0}, + {OV5693_8BIT, 0x380c, 0x0d}, + {OV5693_8BIT, 0x380d, 0xb0}, + {OV5693_8BIT, 0x380e, 0x05}, + {OV5693_8BIT, 0x380f, 0xf2}, + {OV5693_8BIT, 0x3811, 0x08}, + {OV5693_8BIT, 0x3813, 0x02}, + {OV5693_8BIT, 0x3814, 0x31}, + {OV5693_8BIT, 0x3815, 0x31}, + {OV5693_8BIT, 0x3820, 0x01}, + {OV5693_8BIT, 0x3821, 0x1f}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; +*/ +/* + * 976x556 30fps 8.8ms VBlanking 2lane 10Bit (Scaling) + */ +#if ENABLE_NON_PREVIEW +static struct ov5693_reg const ov5693_976x556[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3803, 0xf0}, + {OV5693_8BIT, 0x3806, 0x06}, + {OV5693_8BIT, 0x3807, 0xa7}, + {OV5693_8BIT, 0x3808, 0x03}, + {OV5693_8BIT, 0x3809, 0xd0}, + {OV5693_8BIT, 0x380a, 0x02}, + {OV5693_8BIT, 0x380b, 0x2C}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x10}, + {OV5693_8BIT, 0x3813, 0x02}, + {OV5693_8BIT, 0x3814, 0x11}, + {OV5693_8BIT, 0x3815, 0x11}, + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x80}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +/*DS from 2624x1492*/ +static struct ov5693_reg const ov5693_1296x736[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + + {OV5693_8BIT, 0x3800, 0x00}, + {OV5693_8BIT, 0x3801, 0x00}, + {OV5693_8BIT, 0x3802, 0x00}, + {OV5693_8BIT, 0x3803, 0x00}, + + {OV5693_8BIT, 0x3804, 0x0a}, + {OV5693_8BIT, 0x3805, 0x3f}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0xA3}, + + {OV5693_8BIT, 0x3808, 0x05}, + {OV5693_8BIT, 0x3809, 0x10}, + {OV5693_8BIT, 0x380a, 0x02}, + {OV5693_8BIT, 0x380b, 0xe0}, + + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + + {OV5693_8BIT, 0x3813, 0xE8}, + + {OV5693_8BIT, 0x3814, 0x11}, /*X subsample control*/ + {OV5693_8BIT, 0x3815, 0x11}, /*Y subsample control*/ + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_8BIT, 0x5041, 0x84}, /* scale is auto enabled */ + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +static struct ov5693_reg const ov5693_1636p_30fps[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3803, 0xf0}, + {OV5693_8BIT, 0x3806, 0x06}, + {OV5693_8BIT, 0x3807, 0xa7}, + {OV5693_8BIT, 0x3808, 0x06}, + {OV5693_8BIT, 0x3809, 0x64}, + {OV5693_8BIT, 0x380a, 0x04}, + {OV5693_8BIT, 0x380b, 0x48}, + {OV5693_8BIT, 0x380c, 0x0a}, /*hts*/ + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, /*vts*/ + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x02}, + {OV5693_8BIT, 0x3813, 0x02}, + {OV5693_8BIT, 0x3814, 0x11}, + {OV5693_8BIT, 0x3815, 0x11}, + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x80}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; +#endif + +static struct ov5693_reg const ov5693_1616x1216_30fps[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x80}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3800, 0x00}, /*{3800,3801} Array X start*/ + {OV5693_8BIT, 0x3801, 0x08}, /* 04 //{3800,3801} Array X start*/ + {OV5693_8BIT, 0x3802, 0x00}, /*{3802,3803} Array Y start*/ + {OV5693_8BIT, 0x3803, 0x04}, /* 00 //{3802,3803} Array Y start*/ + {OV5693_8BIT, 0x3804, 0x0a}, /*{3804,3805} Array X end*/ + {OV5693_8BIT, 0x3805, 0x37}, /* 3b //{3804,3805} Array X end*/ + {OV5693_8BIT, 0x3806, 0x07}, /*{3806,3807} Array Y end*/ + {OV5693_8BIT, 0x3807, 0x9f}, /* a3 //{3806,3807} Array Y end*/ + {OV5693_8BIT, 0x3808, 0x06}, /*{3808,3809} Final output H size*/ + {OV5693_8BIT, 0x3809, 0x50}, /*{3808,3809} Final output H size*/ + {OV5693_8BIT, 0x380a, 0x04}, /*{380a,380b} Final output V size*/ + {OV5693_8BIT, 0x380b, 0xc0}, /*{380a,380b} Final output V size*/ + {OV5693_8BIT, 0x380c, 0x0a}, /*{380c,380d} HTS*/ + {OV5693_8BIT, 0x380d, 0x80}, /*{380c,380d} HTS*/ + {OV5693_8BIT, 0x380e, 0x07}, /*{380e,380f} VTS*/ + {OV5693_8BIT, 0x380f, 0xc0}, /* bc //{380e,380f} VTS*/ + {OV5693_8BIT, 0x3810, 0x00}, /*{3810,3811} windowing X offset*/ + {OV5693_8BIT, 0x3811, 0x10}, /*{3810,3811} windowing X offset*/ + {OV5693_8BIT, 0x3812, 0x00}, /*{3812,3813} windowing Y offset*/ + {OV5693_8BIT, 0x3813, 0x06}, /*{3812,3813} windowing Y offset*/ + {OV5693_8BIT, 0x3814, 0x11}, /*X subsample control*/ + {OV5693_8BIT, 0x3815, 0x11}, /*Y subsample control*/ + {OV5693_8BIT, 0x3820, 0x00}, /*FLIP/Binning control*/ + {OV5693_8BIT, 0x3821, 0x1e}, /*MIRROR control*/ + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_8BIT, 0x5041, 0x84}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +/* + * 1940x1096 30fps 8.8ms VBlanking 2lane 10bit (Scaling) + */ +#if ENABLE_NON_PREVIEW +static struct ov5693_reg const ov5693_1940x1096[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3803, 0xf0}, + {OV5693_8BIT, 0x3806, 0x06}, + {OV5693_8BIT, 0x3807, 0xa7}, + {OV5693_8BIT, 0x3808, 0x07}, + {OV5693_8BIT, 0x3809, 0x94}, + {OV5693_8BIT, 0x380a, 0x04}, + {OV5693_8BIT, 0x380b, 0x48}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x02}, + {OV5693_8BIT, 0x3813, 0x02}, + {OV5693_8BIT, 0x3814, 0x11}, + {OV5693_8BIT, 0x3815, 0x11}, + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x80}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +static struct ov5693_reg const ov5693_2592x1456_30fps[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3800, 0x00}, + {OV5693_8BIT, 0x3801, 0x00}, + {OV5693_8BIT, 0x3802, 0x00}, + {OV5693_8BIT, 0x3803, 0xf0}, + {OV5693_8BIT, 0x3804, 0x0a}, + {OV5693_8BIT, 0x3805, 0x3f}, + {OV5693_8BIT, 0x3806, 0x06}, + {OV5693_8BIT, 0x3807, 0xa4}, + {OV5693_8BIT, 0x3808, 0x0a}, + {OV5693_8BIT, 0x3809, 0x20}, + {OV5693_8BIT, 0x380a, 0x05}, + {OV5693_8BIT, 0x380b, 0xb0}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x10}, + {OV5693_8BIT, 0x3813, 0x00}, + {OV5693_8BIT, 0x3814, 0x11}, + {OV5693_8BIT, 0x3815, 0x11}, + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_TOK_TERM, 0, 0} +}; +#endif + +static struct ov5693_reg const ov5693_2576x1456_30fps[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3800, 0x00}, + {OV5693_8BIT, 0x3801, 0x00}, + {OV5693_8BIT, 0x3802, 0x00}, + {OV5693_8BIT, 0x3803, 0xf0}, + {OV5693_8BIT, 0x3804, 0x0a}, + {OV5693_8BIT, 0x3805, 0x3f}, + {OV5693_8BIT, 0x3806, 0x06}, + {OV5693_8BIT, 0x3807, 0xa4}, + {OV5693_8BIT, 0x3808, 0x0a}, + {OV5693_8BIT, 0x3809, 0x10}, + {OV5693_8BIT, 0x380a, 0x05}, + {OV5693_8BIT, 0x380b, 0xb0}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x18}, + {OV5693_8BIT, 0x3813, 0x00}, + {OV5693_8BIT, 0x3814, 0x11}, + {OV5693_8BIT, 0x3815, 0x11}, + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_TOK_TERM, 0, 0} +}; + +/* + * 2592x1944 30fps 0.6ms VBlanking 2lane 10Bit + */ +#if ENABLE_NON_PREVIEW +static struct ov5693_reg const ov5693_2592x1944_30fps[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3803, 0x00}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0xa3}, + {OV5693_8BIT, 0x3808, 0x0a}, + {OV5693_8BIT, 0x3809, 0x20}, + {OV5693_8BIT, 0x380a, 0x07}, + {OV5693_8BIT, 0x380b, 0x98}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x10}, + {OV5693_8BIT, 0x3813, 0x00}, + {OV5693_8BIT, 0x3814, 0x11}, + {OV5693_8BIT, 0x3815, 0x11}, + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; +#endif + +/* + * 11:9 Full FOV Output, expected FOV Res: 2346x1920 + * ISP Effect Res: 1408x1152 + * Sensor out: 1424x1168, DS From: 2380x1952 + * + * WA: Left Offset: 8, Hor scal: 64 + */ +#if ENABLE_NON_PREVIEW +static struct ov5693_reg const ov5693_1424x1168_30fps[] = { + {OV5693_8BIT, 0x3501, 0x3b}, /* long exposure[15:8] */ + {OV5693_8BIT, 0x3502, 0x80}, /* long exposure[7:0] */ + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3800, 0x00}, /* TIMING_X_ADDR_START */ + {OV5693_8BIT, 0x3801, 0x50}, /* 80 */ + {OV5693_8BIT, 0x3802, 0x00}, /* TIMING_Y_ADDR_START */ + {OV5693_8BIT, 0x3803, 0x02}, /* 2 */ + {OV5693_8BIT, 0x3804, 0x09}, /* TIMING_X_ADDR_END */ + {OV5693_8BIT, 0x3805, 0xdd}, /* 2525 */ + {OV5693_8BIT, 0x3806, 0x07}, /* TIMING_Y_ADDR_END */ + {OV5693_8BIT, 0x3807, 0xa1}, /* 1953 */ + {OV5693_8BIT, 0x3808, 0x05}, /* TIMING_X_OUTPUT_SIZE */ + {OV5693_8BIT, 0x3809, 0x90}, /* 1424 */ + {OV5693_8BIT, 0x380a, 0x04}, /* TIMING_Y_OUTPUT_SIZE */ + {OV5693_8BIT, 0x380b, 0x90}, /* 1168 */ + {OV5693_8BIT, 0x380c, 0x0a}, /* TIMING_HTS */ + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, /* TIMING_VTS */ + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3810, 0x00}, /* TIMING_ISP_X_WIN */ + {OV5693_8BIT, 0x3811, 0x02}, /* 2 */ + {OV5693_8BIT, 0x3812, 0x00}, /* TIMING_ISP_Y_WIN */ + {OV5693_8BIT, 0x3813, 0x00}, /* 0 */ + {OV5693_8BIT, 0x3814, 0x11}, /* TIME_X_INC */ + {OV5693_8BIT, 0x3815, 0x11}, /* TIME_Y_INC */ + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_8BIT, 0x5041, 0x84}, /* scale is auto enabled */ + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; +#endif + +/* + * 3:2 Full FOV Output, expected FOV Res: 2560x1706 + * ISP Effect Res: 720x480 + * Sensor out: 736x496, DS From 2616x1764 + */ +static struct ov5693_reg const ov5693_736x496_30fps[] = { + {OV5693_8BIT, 0x3501, 0x3b}, /* long exposure[15:8] */ + {OV5693_8BIT, 0x3502, 0x80}, /* long exposure[7:0] */ + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3800, 0x00}, /* TIMING_X_ADDR_START */ + {OV5693_8BIT, 0x3801, 0x02}, /* 2 */ + {OV5693_8BIT, 0x3802, 0x00}, /* TIMING_Y_ADDR_START */ + {OV5693_8BIT, 0x3803, 0x62}, /* 98 */ + {OV5693_8BIT, 0x3804, 0x0a}, /* TIMING_X_ADDR_END */ + {OV5693_8BIT, 0x3805, 0x3b}, /* 2619 */ + {OV5693_8BIT, 0x3806, 0x07}, /* TIMING_Y_ADDR_END */ + {OV5693_8BIT, 0x3807, 0x43}, /* 1859 */ + {OV5693_8BIT, 0x3808, 0x02}, /* TIMING_X_OUTPUT_SIZE */ + {OV5693_8BIT, 0x3809, 0xe0}, /* 736 */ + {OV5693_8BIT, 0x380a, 0x01}, /* TIMING_Y_OUTPUT_SIZE */ + {OV5693_8BIT, 0x380b, 0xf0}, /* 496 */ + {OV5693_8BIT, 0x380c, 0x0a}, /* TIMING_HTS */ + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, /* TIMING_VTS */ + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3810, 0x00}, /* TIMING_ISP_X_WIN */ + {OV5693_8BIT, 0x3811, 0x02}, /* 2 */ + {OV5693_8BIT, 0x3812, 0x00}, /* TIMING_ISP_Y_WIN */ + {OV5693_8BIT, 0x3813, 0x00}, /* 0 */ + {OV5693_8BIT, 0x3814, 0x11}, /* TIME_X_INC */ + {OV5693_8BIT, 0x3815, 0x11}, /* TIME_Y_INC */ + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_8BIT, 0x5041, 0x84}, /* scale is auto enabled */ + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +static struct ov5693_reg const ov5693_2576x1936_30fps[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3803, 0x00}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0xa3}, + {OV5693_8BIT, 0x3808, 0x0a}, + {OV5693_8BIT, 0x3809, 0x10}, + {OV5693_8BIT, 0x380a, 0x07}, + {OV5693_8BIT, 0x380b, 0x90}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x18}, + {OV5693_8BIT, 0x3813, 0x00}, + {OV5693_8BIT, 0x3814, 0x11}, + {OV5693_8BIT, 0x3815, 0x11}, + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +static struct ov5693_resolution ov5693_res_preview[] = { + { + .desc = "ov5693_736x496_30fps", + .width = 736, + .height = 496, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_736x496_30fps, + }, + { + .desc = "ov5693_1616x1216_30fps", + .width = 1616, + .height = 1216, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_1616x1216_30fps, + }, + { + .desc = "ov5693_5M_30fps", + .width = 2576, + .height = 1456, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_2576x1456_30fps, + }, + { + .desc = "ov5693_5M_30fps", + .width = 2576, + .height = 1936, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_2576x1936_30fps, + }, +}; + +#define N_RES_PREVIEW (ARRAY_SIZE(ov5693_res_preview)) + +/* + * Disable non-preview configurations until the configuration selection is + * improved. + */ +#if ENABLE_NON_PREVIEW +struct ov5693_resolution ov5693_res_still[] = { + { + .desc = "ov5693_736x496_30fps", + .width = 736, + .height = 496, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_736x496_30fps, + }, + { + .desc = "ov5693_1424x1168_30fps", + .width = 1424, + .height = 1168, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_1424x1168_30fps, + }, + { + .desc = "ov5693_1616x1216_30fps", + .width = 1616, + .height = 1216, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_1616x1216_30fps, + }, + { + .desc = "ov5693_5M_30fps", + .width = 2592, + .height = 1456, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_2592x1456_30fps, + }, + { + .desc = "ov5693_5M_30fps", + .width = 2592, + .height = 1944, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_2592x1944_30fps, + }, +}; + +#define N_RES_STILL (ARRAY_SIZE(ov5693_res_still)) + +struct ov5693_resolution ov5693_res_video[] = { + { + .desc = "ov5693_736x496_30fps", + .width = 736, + .height = 496, + .fps = 30, + .pix_clk_freq = 160, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 2, + .bin_factor_y = 2, + .bin_mode = 1, + .regs = ov5693_736x496, + }, + { + .desc = "ov5693_336x256_30fps", + .width = 336, + .height = 256, + .fps = 30, + .pix_clk_freq = 160, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 2, + .bin_factor_y = 2, + .bin_mode = 1, + .regs = ov5693_336x256, + }, + { + .desc = "ov5693_368x304_30fps", + .width = 368, + .height = 304, + .fps = 30, + .pix_clk_freq = 160, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 2, + .bin_factor_y = 2, + .bin_mode = 1, + .regs = ov5693_368x304, + }, + { + .desc = "ov5693_192x160_30fps", + .width = 192, + .height = 160, + .fps = 30, + .pix_clk_freq = 160, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 2, + .bin_factor_y = 2, + .bin_mode = 1, + .regs = ov5693_192x160, + }, + { + .desc = "ov5693_1296x736_30fps", + .width = 1296, + .height = 736, + .fps = 30, + .pix_clk_freq = 160, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 2, + .bin_factor_y = 2, + .bin_mode = 0, + .regs = ov5693_1296x736, + }, + { + .desc = "ov5693_1296x976_30fps", + .width = 1296, + .height = 976, + .fps = 30, + .pix_clk_freq = 160, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 2, + .bin_factor_y = 2, + .bin_mode = 0, + .regs = ov5693_1296x976, + }, + { + .desc = "ov5693_1636P_30fps", + .width = 1636, + .height = 1096, + .fps = 30, + .pix_clk_freq = 160, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_1636p_30fps, + }, + { + .desc = "ov5693_1080P_30fps", + .width = 1940, + .height = 1096, + .fps = 30, + .pix_clk_freq = 160, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_1940x1096, + }, + { + .desc = "ov5693_5M_30fps", + .width = 2592, + .height = 1456, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_2592x1456_30fps, + }, + { + .desc = "ov5693_5M_30fps", + .width = 2592, + .height = 1944, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_2592x1944_30fps, + }, +}; + +#define N_RES_VIDEO (ARRAY_SIZE(ov5693_res_video)) +#endif + +static struct ov5693_resolution *ov5693_res = ov5693_res_preview; +static unsigned long N_RES = N_RES_PREVIEW; +#endif |