From 2c3c1048746a4622d8c89a29670120dc8fab93c4 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sun, 7 Apr 2024 20:49:45 +0200 Subject: Adding upstream version 6.1.76. Signed-off-by: Daniel Baumann --- .../devicetree/bindings/iio/dac/fsl,vf610-dac.yaml | 55 ++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/dac/fsl,vf610-dac.yaml (limited to 'Documentation/devicetree/bindings/iio/dac/fsl,vf610-dac.yaml') diff --git a/Documentation/devicetree/bindings/iio/dac/fsl,vf610-dac.yaml b/Documentation/devicetree/bindings/iio/dac/fsl,vf610-dac.yaml new file mode 100644 index 000000000..999c715c6 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/dac/fsl,vf610-dac.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/fsl,vf610-dac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale vf610 Digital to Analog Converter + +maintainers: + - Sanchayan Maity + +properties: + compatible: + const: fsl,vf610-dac + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: dac + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + bus@40000000 { + compatible = "fsl,aips-bus", "simple-bus"; + reg = <0x40000000 0x00070000>; + ranges; + #address-cells = <1>; + #size-cells = <1>; + dac@400cc000 { + compatible = "fsl,vf610-dac"; + reg = <0x400cc000 0x1000>; + interrupts = <55 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "dac"; + clocks = <&clks VF610_CLK_DAC0>; + }; + }; +... -- cgit v1.2.3