From 2c3c1048746a4622d8c89a29670120dc8fab93c4 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sun, 7 Apr 2024 20:49:45 +0200 Subject: Adding upstream version 6.1.76. Signed-off-by: Daniel Baumann --- .../devicetree/bindings/rng/ti,keystone-rng.yaml | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/rng/ti,keystone-rng.yaml (limited to 'Documentation/devicetree/bindings/rng/ti,keystone-rng.yaml') diff --git a/Documentation/devicetree/bindings/rng/ti,keystone-rng.yaml b/Documentation/devicetree/bindings/rng/ti,keystone-rng.yaml new file mode 100644 index 000000000..e749818fc --- /dev/null +++ b/Documentation/devicetree/bindings/rng/ti,keystone-rng.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/ti,keystone-rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Keystone SoC Hardware Random Number Generator + +maintainers: + - Nishanth Menon + - Santosh Shilimkar + +properties: + compatible: + const: ti,keystone-rng + + clocks: + maxItems: 1 + + clock-names: + items: + - const: fck + + reg: + maxItems: 1 + + ti,syscon-sa-cfg: + $ref: "/schemas/types.yaml#/definitions/phandle" + description: | + Phandle to syscon node of the SA configuration registers. These + registers are shared between HWRNG and crypto drivers. + +required: + - compatible + - clocks + - clock-names + - reg + - ti,syscon-sa-cfg + +additionalProperties: false + +examples: + - | + rng@24000 { + compatible = "ti,keystone-rng"; + ti,syscon-sa-cfg = <&sa_config>; + clocks = <&clksa>; + clock-names = "fck"; + reg = <0x24000 0x1000>; + }; -- cgit v1.2.3