From 2c3c1048746a4622d8c89a29670120dc8fab93c4 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sun, 7 Apr 2024 20:49:45 +0200 Subject: Adding upstream version 6.1.76. Signed-off-by: Daniel Baumann --- .../devicetree/bindings/timer/renesas,mtu2.yaml | 76 ++++++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/renesas,mtu2.yaml (limited to 'Documentation/devicetree/bindings/timer/renesas,mtu2.yaml') diff --git a/Documentation/devicetree/bindings/timer/renesas,mtu2.yaml b/Documentation/devicetree/bindings/timer/renesas,mtu2.yaml new file mode 100644 index 000000000..15d8dddf4 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/renesas,mtu2.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/renesas,mtu2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas Multi-Function Timer Pulse Unit 2 (MTU2) + +maintainers: + - Geert Uytterhoeven + - Laurent Pinchart + +description: + The MTU2 is a multi-purpose, multi-channel timer/counter with configurable clock inputs + and programmable compare match. + + Channels share hardware resources but their counter and compare match value are + independent. The MTU2 hardware supports five channels indexed from 0 to 4. + +properties: + compatible: + items: + - enum: + - renesas,mtu2-r7s72100 # RZ/A1H + - const: renesas,mtu2 + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 5 + description: One entry for each enabled channel. + + interrupt-names: + minItems: 1 + items: + - const: tgi0a + - const: tgi1a + - const: tgi2a + - const: tgi3a + - const: tgi4a + + clocks: + maxItems: 1 + + clock-names: + const: fck + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - power-domains + +additionalProperties: false + +examples: + - | + #include + #include + mtu2: timer@fcff0000 { + compatible = "renesas,mtu2-r7s72100", "renesas,mtu2"; + reg = <0xfcff0000 0x400>; + interrupts = ; + interrupt-names = "tgi0a"; + clocks = <&mstp3_clks R7S72100_CLK_MTU2>; + clock-names = "fck"; + power-domains = <&cpg_clocks>; + }; -- cgit v1.2.3