From 2c3c1048746a4622d8c89a29670120dc8fab93c4 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sun, 7 Apr 2024 20:49:45 +0200 Subject: Adding upstream version 6.1.76. Signed-off-by: Daniel Baumann --- arch/mips/fw/arc/Makefile | 15 ++ arch/mips/fw/arc/arc_con.c | 54 +++++ arch/mips/fw/arc/cmdline.c | 110 ++++++++++ arch/mips/fw/arc/env.c | 21 ++ arch/mips/fw/arc/file.c | 25 +++ arch/mips/fw/arc/identify.c | 111 ++++++++++ arch/mips/fw/arc/init.c | 51 +++++ arch/mips/fw/arc/memory.c | 192 +++++++++++++++++ arch/mips/fw/arc/misc.c | 36 ++++ arch/mips/fw/arc/promlib.c | 61 ++++++ arch/mips/fw/cfe/Makefile | 6 + arch/mips/fw/cfe/cfe_api.c | 480 +++++++++++++++++++++++++++++++++++++++++ arch/mips/fw/cfe/cfe_api_int.h | 135 ++++++++++++ arch/mips/fw/lib/Makefile | 8 + arch/mips/fw/lib/call_o32.S | 104 +++++++++ arch/mips/fw/lib/cmdline.c | 103 +++++++++ arch/mips/fw/sni/Makefile | 6 + arch/mips/fw/sni/sniprom.c | 149 +++++++++++++ 18 files changed, 1667 insertions(+) create mode 100644 arch/mips/fw/arc/Makefile create mode 100644 arch/mips/fw/arc/arc_con.c create mode 100644 arch/mips/fw/arc/cmdline.c create mode 100644 arch/mips/fw/arc/env.c create mode 100644 arch/mips/fw/arc/file.c create mode 100644 arch/mips/fw/arc/identify.c create mode 100644 arch/mips/fw/arc/init.c create mode 100644 arch/mips/fw/arc/memory.c create mode 100644 arch/mips/fw/arc/misc.c create mode 100644 arch/mips/fw/arc/promlib.c create mode 100644 arch/mips/fw/cfe/Makefile create mode 100644 arch/mips/fw/cfe/cfe_api.c create mode 100644 arch/mips/fw/cfe/cfe_api_int.h create mode 100644 arch/mips/fw/lib/Makefile create mode 100644 arch/mips/fw/lib/call_o32.S create mode 100644 arch/mips/fw/lib/cmdline.c create mode 100644 arch/mips/fw/sni/Makefile create mode 100644 arch/mips/fw/sni/sniprom.c (limited to 'arch/mips/fw') diff --git a/arch/mips/fw/arc/Makefile b/arch/mips/fw/arc/Makefile new file mode 100644 index 000000000..64d685efc --- /dev/null +++ b/arch/mips/fw/arc/Makefile @@ -0,0 +1,15 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Makefile for the ARC prom monitor library routines under Linux. +# + +ifdef CONFIG_ARC_CMDLINE_ONLY +lib-y += cmdline.o +else +lib-y += cmdline.o env.o file.o identify.o init.o \ + misc.o +endif + +lib-$(CONFIG_ARC_MEMORY) += memory.o +lib-$(CONFIG_ARC_CONSOLE) += arc_con.o +lib-$(CONFIG_ARC_PROMLIB) += promlib.o diff --git a/arch/mips/fw/arc/arc_con.c b/arch/mips/fw/arc/arc_con.c new file mode 100644 index 000000000..7fdce236b --- /dev/null +++ b/arch/mips/fw/arc/arc_con.c @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Wrap-around code for a console using the + * ARC io-routines. + * + * Copyright (c) 1998 Harald Koerfgen + * Copyright (c) 2001 Ralf Baechle + * Copyright (c) 2002 Thiemo Seufer + */ +#include +#include +#include +#include +#include +#include +#include + +static void prom_console_write(struct console *co, const char *s, + unsigned count) +{ + /* Do each character */ + while (count--) { + if (*s == '\n') + prom_putchar('\r'); + prom_putchar(*s++); + } +} + +static int prom_console_setup(struct console *co, char *options) +{ + if (prom_flags & PROM_FLAG_USE_AS_CONSOLE) + return 0; + return -ENODEV; +} + +static struct console arc_cons = { + .name = "arc", + .write = prom_console_write, + .setup = prom_console_setup, + .flags = CON_PRINTBUFFER, + .index = -1, +}; + +/* + * Register console. + */ + +static int __init arc_console_init(void) +{ + register_console(&arc_cons); + + return 0; +} +console_initcall(arc_console_init); diff --git a/arch/mips/fw/arc/cmdline.c b/arch/mips/fw/arc/cmdline.c new file mode 100644 index 000000000..155c5e911 --- /dev/null +++ b/arch/mips/fw/arc/cmdline.c @@ -0,0 +1,110 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * cmdline.c: Kernel command line creation using ARCS argc/argv. + * + * Copyright (C) 1996 David S. Miller (davem@davemloft.net) + */ +#include +#include +#include +#include + +#include +#include + +#undef DEBUG_CMDLINE + +/* + * A 32-bit ARC PROM pass arguments and environment as 32-bit pointer. + * These macro take care of sign extension. + */ +#define prom_argv(index) ((char *) (long)argv[(index)]) + +static char *ignored[] = { + "ConsoleIn=", + "ConsoleOut=", + "SystemPartition=", + "OSLoader=", + "OSLoadPartition=", + "OSLoadFilename=", + "OSLoadOptions=" +}; + +static char *used_arc[][2] = { + { "OSLoadPartition=", "root=" }, + { "OSLoadOptions=", "" } +}; + +static char __init *move_firmware_args(int argc, LONG *argv, char *cp) +{ + char *s; + int actr, i; + + actr = 1; /* Always ignore argv[0] */ + + while (actr < argc) { + for(i = 0; i < ARRAY_SIZE(used_arc); i++) { + int len = strlen(used_arc[i][0]); + + if (!strncmp(prom_argv(actr), used_arc[i][0], len)) { + /* Ok, we want it. First append the replacement... */ + strcat(cp, used_arc[i][1]); + cp += strlen(used_arc[i][1]); + /* ... and now the argument */ + s = strchr(prom_argv(actr), '='); + if (s) { + s++; + strcpy(cp, s); + cp += strlen(s); + } + *cp++ = ' '; + break; + } + } + actr++; + } + + return cp; +} + +void __init prom_init_cmdline(int argc, LONG *argv) +{ + char *cp; + int actr, i; + + actr = 1; /* Always ignore argv[0] */ + + cp = arcs_cmdline; + /* + * Move ARC variables to the beginning to make sure they can be + * overridden by later arguments. + */ + cp = move_firmware_args(argc, argv, cp); + + while (actr < argc) { + for (i = 0; i < ARRAY_SIZE(ignored); i++) { + int len = strlen(ignored[i]); + + if (!strncmp(prom_argv(actr), ignored[i], len)) + goto pic_cont; + } + /* Ok, we want it. */ + strcpy(cp, prom_argv(actr)); + cp += strlen(prom_argv(actr)); + *cp++ = ' '; + + pic_cont: + actr++; + } + + if (cp != arcs_cmdline) /* get rid of trailing space */ + --cp; + *cp = '\0'; + +#ifdef DEBUG_CMDLINE + printk(KERN_DEBUG "prom cmdline: %s\n", arcs_cmdline); +#endif +} diff --git a/arch/mips/fw/arc/env.c b/arch/mips/fw/arc/env.c new file mode 100644 index 000000000..02407a7bb --- /dev/null +++ b/arch/mips/fw/arc/env.c @@ -0,0 +1,21 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * env.c: ARCS environment variable routines. + * + * Copyright (C) 1996 David S. Miller (davem@davemloft.net) + */ +#include +#include +#include + +#include +#include + +PCHAR __init +ArcGetEnvironmentVariable(CHAR *name) +{ + return (CHAR *) ARC_CALL1(get_evar, name); +} diff --git a/arch/mips/fw/arc/file.c b/arch/mips/fw/arc/file.c new file mode 100644 index 000000000..b0d8535c8 --- /dev/null +++ b/arch/mips/fw/arc/file.c @@ -0,0 +1,25 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * ARC firmware interface. + * + * Copyright (C) 1994, 1995, 1996, 1999 Ralf Baechle + * Copyright (C) 1999 Silicon Graphics, Inc. + */ + +#include +#include + +LONG +ArcRead(ULONG FileID, VOID *Buffer, ULONG N, ULONG *Count) +{ + return ARC_CALL4(read, FileID, Buffer, N, Count); +} + +LONG +ArcWrite(ULONG FileID, PVOID Buffer, ULONG N, PULONG Count) +{ + return ARC_CALL4(write, FileID, Buffer, N, Count); +} diff --git a/arch/mips/fw/arc/identify.c b/arch/mips/fw/arc/identify.c new file mode 100644 index 000000000..5527e0f54 --- /dev/null +++ b/arch/mips/fw/arc/identify.c @@ -0,0 +1,111 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * identify.c: identify machine by looking up system identifier + * + * Copyright (C) 1998 Thomas Bogendoerfer + * + * This code is based on arch/mips/sgi/kernel/system.c, which is + * + * Copyright (C) 1996 David S. Miller (davem@davemloft.net) + */ +#include +#include +#include +#include +#include + +#include +#include + +struct smatch { + char *arcname; + char *liname; + int flags; +}; + +static struct smatch mach_table[] = { + { + .arcname = "SGI-IP22", + .liname = "SGI Indy", + .flags = PROM_FLAG_ARCS, + }, { + .arcname = "SGI-IP28", + .liname = "SGI IP28", + .flags = PROM_FLAG_ARCS, + }, { + .arcname = "SGI-IP30", + .liname = "SGI Octane", + .flags = PROM_FLAG_ARCS, + }, { + .arcname = "SGI-IP32", + .liname = "SGI O2", + .flags = PROM_FLAG_ARCS, + }, { + .arcname = "Microsoft-Jazz", + .liname = "Jazz MIPS_Magnum_4000", + .flags = 0, + }, { + .arcname = "PICA-61", + .liname = "Jazz Acer_PICA_61", + .flags = 0, + }, { + .arcname = "RM200PCI", + .liname = "SNI RM200_PCI", + .flags = PROM_FLAG_DONT_FREE_TEMP, + }, { + .arcname = "RM200PCI-R5K", + .liname = "SNI RM200_PCI-R5K", + .flags = PROM_FLAG_DONT_FREE_TEMP, + } +}; + +int prom_flags; + +static struct smatch * __init string_to_mach(const char *s) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(mach_table); i++) { + if (!strcmp(s, mach_table[i].arcname)) + return &mach_table[i]; + } + + panic("Yeee, could not determine architecture type <%s>", s); +} + +char *system_type; + +const char *get_system_type(void) +{ + return system_type; +} + +static pcomponent * __init ArcGetChild(pcomponent *Current) +{ + return (pcomponent *) ARC_CALL1(child_component, Current); +} + +void __init prom_identify_arch(void) +{ + pcomponent *p; + struct smatch *mach; + const char *iname; + + /* + * The root component tells us what machine architecture we have here. + */ + p = ArcGetChild(PROM_NULL_COMPONENT); + if (p == NULL) { + iname = "Unknown"; + } else + iname = (char *) (long) p->iname; + + printk("ARCH: %s\n", iname); + mach = string_to_mach(iname); + system_type = mach->liname; + + prom_flags = mach->flags; +} diff --git a/arch/mips/fw/arc/init.c b/arch/mips/fw/arc/init.c new file mode 100644 index 000000000..f9d1dea9b --- /dev/null +++ b/arch/mips/fw/arc/init.c @@ -0,0 +1,51 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * PROM library initialisation code. + * + * Copyright (C) 1996 David S. Miller (davem@davemloft.net) + */ +#include +#include + +#include +#include +#include + +#undef DEBUG_PROM_INIT + +/* Master romvec interface. */ +struct linux_romvec *romvec; + +#if defined(CONFIG_64BIT) && defined(CONFIG_FW_ARC32) +/* stack for calling 32bit ARC prom */ +u64 o32_stk[4096]; +#endif + +void __init prom_init(void) +{ + PSYSTEM_PARAMETER_BLOCK pb = PROMBLOCK; + + romvec = ROMVECTOR; + + if (pb->magic != 0x53435241) { + printk(KERN_CRIT "Aieee, bad prom vector magic %08lx\n", + (unsigned long) pb->magic); + while(1) + ; + } + + prom_init_cmdline(fw_arg0, (LONG *)fw_arg1); + prom_identify_arch(); + printk(KERN_INFO "PROMLIB: ARC firmware Version %d Revision %d\n", + pb->ver, pb->rev); + prom_meminit(); + +#ifdef DEBUG_PROM_INIT + pr_info("Press a key to reboot\n"); + ArcRead(0, &c, 1, &cnt); + ArcEnterInteractiveMode(); +#endif +} diff --git a/arch/mips/fw/arc/memory.c b/arch/mips/fw/arc/memory.c new file mode 100644 index 000000000..66188739f --- /dev/null +++ b/arch/mips/fw/arc/memory.c @@ -0,0 +1,192 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * memory.c: PROM library functions for acquiring/using memory descriptors + * given to us from the ARCS firmware. + * + * Copyright (C) 1996 by David S. Miller + * Copyright (C) 1999, 2000, 2001 by Ralf Baechle + * Copyright (C) 1999, 2000 by Silicon Graphics, Inc. + * + * PROM library functions for acquiring/using memory descriptors given to us + * from the ARCS firmware. This is only used when CONFIG_ARC_MEMORY is set + * because on some machines like SGI IP27 the ARC memory configuration data + * completely bogus and alternate easier to use mechanisms are available. + */ +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#undef DEBUG + +#define MAX_PROM_MEM 5 +static phys_addr_t prom_mem_base[MAX_PROM_MEM] __initdata; +static phys_addr_t prom_mem_size[MAX_PROM_MEM] __initdata; +static unsigned int nr_prom_mem __initdata; + +/* + * For ARC firmware memory functions the unit of measuring memory is always + * a 4k page of memory + */ +#define ARC_PAGE_SHIFT 12 + +struct linux_mdesc * __init ArcGetMemoryDescriptor(struct linux_mdesc *Current) +{ + return (struct linux_mdesc *) ARC_CALL1(get_mdesc, Current); +} + +#ifdef DEBUG /* convenient for debugging */ +static char *arcs_mtypes[8] = { + "Exception Block", + "ARCS Romvec Page", + "Free/Contig RAM", + "Generic Free RAM", + "Bad Memory", + "Standalone Program Pages", + "ARCS Temp Storage Area", + "ARCS Permanent Storage Area" +}; + +static char *arc_mtypes[8] = { + "Exception Block", + "SystemParameterBlock", + "FreeMemory", + "Bad Memory", + "LoadedProgram", + "FirmwareTemporary", + "FirmwarePermanent", + "FreeContiguous" +}; +#define mtypes(a) (prom_flags & PROM_FLAG_ARCS) ? arcs_mtypes[a.arcs] \ + : arc_mtypes[a.arc] +#endif + +enum { + mem_free, mem_prom_used, mem_reserved +}; + +static inline int memtype_classify_arcs(union linux_memtypes type) +{ + switch (type.arcs) { + case arcs_fcontig: + case arcs_free: + return mem_free; + case arcs_atmp: + return mem_prom_used; + case arcs_eblock: + case arcs_rvpage: + case arcs_bmem: + case arcs_prog: + case arcs_aperm: + return mem_reserved; + default: + BUG(); + } + while(1); /* Nuke warning. */ +} + +static inline int memtype_classify_arc(union linux_memtypes type) +{ + switch (type.arc) { + case arc_free: + case arc_fcontig: + return mem_free; + case arc_atmp: + return mem_prom_used; + case arc_eblock: + case arc_rvpage: + case arc_bmem: + case arc_prog: + case arc_aperm: + return mem_reserved; + default: + BUG(); + } + while(1); /* Nuke warning. */ +} + +static int __init prom_memtype_classify(union linux_memtypes type) +{ + if (prom_flags & PROM_FLAG_ARCS) /* SGI is ``different'' ... */ + return memtype_classify_arcs(type); + + return memtype_classify_arc(type); +} + +void __weak __init prom_meminit(void) +{ + struct linux_mdesc *p; + +#ifdef DEBUG + int i = 0; + + printk("ARCS MEMORY DESCRIPTOR dump:\n"); + p = ArcGetMemoryDescriptor(PROM_NULL_MDESC); + while(p) { + printk("[%d,%p]: base<%08lx> pages<%08lx> type<%s>\n", + i, p, p->base, p->pages, mtypes(p->type)); + p = ArcGetMemoryDescriptor(p); + i++; + } +#endif + + nr_prom_mem = 0; + p = PROM_NULL_MDESC; + while ((p = ArcGetMemoryDescriptor(p))) { + unsigned long base, size; + long type; + + base = p->base << ARC_PAGE_SHIFT; + size = p->pages << ARC_PAGE_SHIFT; + type = prom_memtype_classify(p->type); + + /* ignore mirrored RAM on IP28/IP30 */ + if (base < PHYS_OFFSET) + continue; + + memblock_add(base, size); + + if (type == mem_reserved) + memblock_reserve(base, size); + + if (type == mem_prom_used) { + memblock_reserve(base, size); + if (nr_prom_mem >= 5) { + pr_err("Too many ROM DATA regions"); + continue; + } + prom_mem_base[nr_prom_mem] = base; + prom_mem_size[nr_prom_mem] = size; + nr_prom_mem++; + } + } +} + +void __weak __init prom_cleanup(void) +{ +} + +void __init prom_free_prom_memory(void) +{ + int i; + + if (prom_flags & PROM_FLAG_DONT_FREE_TEMP) + return; + + for (i = 0; i < nr_prom_mem; i++) { + free_init_pages("prom memory", + prom_mem_base[i], prom_mem_base[i] + prom_mem_size[i]); + } + /* + * at this point it isn't safe to call PROM functions + * give platforms a way to do PROM cleanups + */ + prom_cleanup(); +} diff --git a/arch/mips/fw/arc/misc.c b/arch/mips/fw/arc/misc.c new file mode 100644 index 000000000..d5b2d5901 --- /dev/null +++ b/arch/mips/fw/arc/misc.c @@ -0,0 +1,36 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Miscellaneous ARCS PROM routines. + * + * Copyright (C) 1996 David S. Miller (davem@davemloft.net) + * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org) + * Copyright (C) 1999 Silicon Graphics, Inc. + */ +#include +#include +#include +#include + +#include + +#include +#include +#include + +VOID __noreturn +ArcEnterInteractiveMode(VOID) +{ + bc_disable(); + local_irq_disable(); + ARC_CALL0(imode); + + unreachable(); +} + +DISPLAY_STATUS * __init ArcGetDisplayStatus(ULONG FileID) +{ + return (DISPLAY_STATUS *) ARC_CALL1(GetDisplayStatus, FileID); +} diff --git a/arch/mips/fw/arc/promlib.c b/arch/mips/fw/arc/promlib.c new file mode 100644 index 000000000..5e9e840a9 --- /dev/null +++ b/arch/mips/fw/arc/promlib.c @@ -0,0 +1,61 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1996 David S. Miller (dm@sgi.com) + * Compatibility with board caches, Ulf Carlsson + */ +#include +#include +#include +#include + +#if defined(CONFIG_64BIT) && defined(CONFIG_FW_ARC32) +/* + * For 64bit kernels working with a 32bit ARC PROM pointer arguments + * for ARC calls need to reside in CKEG0/1. But as soon as the kernel + * switches to it's first kernel thread stack is set to an address in + * XKPHYS, so anything on stack can't be used anymore. This is solved + * by using a * static declartion variables are put into BSS, which is + * linked to a CKSEG0 address. Since this is only used on UP platforms + * there is not spinlock needed + */ +#define O32_STATIC static +#else +#define O32_STATIC +#endif + +/* + * IP22 boardcache is not compatible with board caches. Thus we disable it + * during romvec action. Since r4xx0.c is always compiled and linked with your + * kernel, this shouldn't cause any harm regardless what MIPS processor you + * have. + * + * The ARC write and read functions seem to interfere with the serial lines + * in some way. You should be careful with them. + */ + +void prom_putchar(char c) +{ + O32_STATIC ULONG cnt; + O32_STATIC CHAR it; + + it = c; + + bc_disable(); + ArcWrite(1, &it, 1, &cnt); + bc_enable(); +} + +char prom_getchar(void) +{ + O32_STATIC ULONG cnt; + O32_STATIC CHAR c; + + bc_disable(); + ArcRead(0, &c, 1, &cnt); + bc_enable(); + + return c; +} diff --git a/arch/mips/fw/cfe/Makefile b/arch/mips/fw/cfe/Makefile new file mode 100644 index 000000000..55b77633e --- /dev/null +++ b/arch/mips/fw/cfe/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Makefile for the Broadcom Common Firmware Environment support +# + +lib-y += cfe_api.o diff --git a/arch/mips/fw/cfe/cfe_api.c b/arch/mips/fw/cfe/cfe_api.c new file mode 100644 index 000000000..dcdfd962d --- /dev/null +++ b/arch/mips/fw/cfe/cfe_api.c @@ -0,0 +1,480 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2000, 2001, 2002 Broadcom Corporation + */ + +/* + * + * Broadcom Common Firmware Environment (CFE) + * + * This module contains device function stubs (small routines to + * call the standard "iocb" interface entry point to CFE). + * There should be one routine here per iocb function call. + * + * Authors: Mitch Lichtenberg, Chris Demetriou + */ +#include +#include +#include +#include +#include +#include "cfe_api_int.h" + +unsigned long __initdata cfe_seal; + +/* Cast from a native pointer to a cfe_xptr_t and back. */ +#define XPTR_FROM_NATIVE(n) ((cfe_xptr_t) (intptr_t) (n)) +#define NATIVE_FROM_XPTR(x) ((void *) (intptr_t) (x)) + +int cfe_iocb_dispatch(struct cfe_xiocb *xiocb); + +/* + * Declare the dispatch function with args of "intptr_t". + * This makes sure whatever model we're compiling in + * puts the pointers in a single register. For example, + * combining -mlong64 and -mips1 or -mips2 would lead to + * trouble, since the handle and IOCB pointer will be + * passed in two registers each, and CFE expects one. + */ + +static int (*cfe_dispfunc) (intptr_t handle, intptr_t xiocb); +static u64 cfe_handle; + +int cfe_init(u64 handle, u64 ept) +{ + cfe_dispfunc = NATIVE_FROM_XPTR(ept); + cfe_handle = handle; + return 0; +} + +int cfe_iocb_dispatch(struct cfe_xiocb * xiocb) +{ + if (!cfe_dispfunc) + return -1; + return (*cfe_dispfunc) ((intptr_t) cfe_handle, (intptr_t) xiocb); +} + +int cfe_close(int handle) +{ + struct cfe_xiocb xiocb; + + xiocb.xiocb_fcode = CFE_CMD_DEV_CLOSE; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = handle; + xiocb.xiocb_flags = 0; + xiocb.xiocb_psize = 0; + + cfe_iocb_dispatch(&xiocb); + + return xiocb.xiocb_status; + +} + +int cfe_cpu_start(int cpu, void (*fn) (void), long sp, long gp, long a1) +{ + struct cfe_xiocb xiocb; + + xiocb.xiocb_fcode = CFE_CMD_FW_CPUCTL; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = 0; + xiocb.xiocb_flags = 0; + xiocb.xiocb_psize = sizeof(struct xiocb_cpuctl); + xiocb.plist.xiocb_cpuctl.cpu_number = cpu; + xiocb.plist.xiocb_cpuctl.cpu_command = CFE_CPU_CMD_START; + xiocb.plist.xiocb_cpuctl.gp_val = gp; + xiocb.plist.xiocb_cpuctl.sp_val = sp; + xiocb.plist.xiocb_cpuctl.a1_val = a1; + xiocb.plist.xiocb_cpuctl.start_addr = (long) fn; + + cfe_iocb_dispatch(&xiocb); + + return xiocb.xiocb_status; +} + +int cfe_cpu_stop(int cpu) +{ + struct cfe_xiocb xiocb; + + xiocb.xiocb_fcode = CFE_CMD_FW_CPUCTL; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = 0; + xiocb.xiocb_flags = 0; + xiocb.xiocb_psize = sizeof(struct xiocb_cpuctl); + xiocb.plist.xiocb_cpuctl.cpu_number = cpu; + xiocb.plist.xiocb_cpuctl.cpu_command = CFE_CPU_CMD_STOP; + + cfe_iocb_dispatch(&xiocb); + + return xiocb.xiocb_status; +} + +int cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen) +{ + struct cfe_xiocb xiocb; + + xiocb.xiocb_fcode = CFE_CMD_ENV_SET; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = 0; + xiocb.xiocb_flags = 0; + xiocb.xiocb_psize = sizeof(struct xiocb_envbuf); + xiocb.plist.xiocb_envbuf.enum_idx = idx; + xiocb.plist.xiocb_envbuf.name_ptr = XPTR_FROM_NATIVE(name); + xiocb.plist.xiocb_envbuf.name_length = namelen; + xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(val); + xiocb.plist.xiocb_envbuf.val_length = vallen; + + cfe_iocb_dispatch(&xiocb); + + return xiocb.xiocb_status; +} + +int +cfe_enummem(int idx, int flags, u64 *start, u64 *length, u64 *type) +{ + struct cfe_xiocb xiocb; + + xiocb.xiocb_fcode = CFE_CMD_FW_MEMENUM; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = 0; + xiocb.xiocb_flags = flags; + xiocb.xiocb_psize = sizeof(struct xiocb_meminfo); + xiocb.plist.xiocb_meminfo.mi_idx = idx; + + cfe_iocb_dispatch(&xiocb); + + if (xiocb.xiocb_status < 0) + return xiocb.xiocb_status; + + *start = xiocb.plist.xiocb_meminfo.mi_addr; + *length = xiocb.plist.xiocb_meminfo.mi_size; + *type = xiocb.plist.xiocb_meminfo.mi_type; + + return 0; +} + +int cfe_exit(int warm, int status) +{ + struct cfe_xiocb xiocb; + + xiocb.xiocb_fcode = CFE_CMD_FW_RESTART; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = 0; + xiocb.xiocb_flags = warm ? CFE_FLG_WARMSTART : 0; + xiocb.xiocb_psize = sizeof(struct xiocb_exitstat); + xiocb.plist.xiocb_exitstat.status = status; + + cfe_iocb_dispatch(&xiocb); + + return xiocb.xiocb_status; +} + +int cfe_flushcache(int flg) +{ + struct cfe_xiocb xiocb; + + xiocb.xiocb_fcode = CFE_CMD_FW_FLUSHCACHE; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = 0; + xiocb.xiocb_flags = flg; + xiocb.xiocb_psize = 0; + + cfe_iocb_dispatch(&xiocb); + + return xiocb.xiocb_status; +} + +int cfe_getdevinfo(char *name) +{ + struct cfe_xiocb xiocb; + + xiocb.xiocb_fcode = CFE_CMD_DEV_GETINFO; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = 0; + xiocb.xiocb_flags = 0; + xiocb.xiocb_psize = sizeof(struct xiocb_buffer); + xiocb.plist.xiocb_buffer.buf_offset = 0; + xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(name); + xiocb.plist.xiocb_buffer.buf_length = strlen(name); + + cfe_iocb_dispatch(&xiocb); + + if (xiocb.xiocb_status < 0) + return xiocb.xiocb_status; + return xiocb.plist.xiocb_buffer.buf_ioctlcmd; +} + +int cfe_getenv(char *name, char *dest, int destlen) +{ + struct cfe_xiocb xiocb; + + *dest = 0; + + xiocb.xiocb_fcode = CFE_CMD_ENV_GET; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = 0; + xiocb.xiocb_flags = 0; + xiocb.xiocb_psize = sizeof(struct xiocb_envbuf); + xiocb.plist.xiocb_envbuf.enum_idx = 0; + xiocb.plist.xiocb_envbuf.name_ptr = XPTR_FROM_NATIVE(name); + xiocb.plist.xiocb_envbuf.name_length = strlen(name); + xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(dest); + xiocb.plist.xiocb_envbuf.val_length = destlen; + + cfe_iocb_dispatch(&xiocb); + + return xiocb.xiocb_status; +} + +int cfe_getfwinfo(cfe_fwinfo_t * info) +{ + struct cfe_xiocb xiocb; + + xiocb.xiocb_fcode = CFE_CMD_FW_GETINFO; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = 0; + xiocb.xiocb_flags = 0; + xiocb.xiocb_psize = sizeof(struct xiocb_fwinfo); + + cfe_iocb_dispatch(&xiocb); + + if (xiocb.xiocb_status < 0) + return xiocb.xiocb_status; + + info->fwi_version = xiocb.plist.xiocb_fwinfo.fwi_version; + info->fwi_totalmem = xiocb.plist.xiocb_fwinfo.fwi_totalmem; + info->fwi_flags = xiocb.plist.xiocb_fwinfo.fwi_flags; + info->fwi_boardid = xiocb.plist.xiocb_fwinfo.fwi_boardid; + info->fwi_bootarea_va = xiocb.plist.xiocb_fwinfo.fwi_bootarea_va; + info->fwi_bootarea_pa = xiocb.plist.xiocb_fwinfo.fwi_bootarea_pa; + info->fwi_bootarea_size = + xiocb.plist.xiocb_fwinfo.fwi_bootarea_size; + + return 0; +} + +int cfe_getstdhandle(int flg) +{ + struct cfe_xiocb xiocb; + + xiocb.xiocb_fcode = CFE_CMD_DEV_GETHANDLE; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = 0; + xiocb.xiocb_flags = flg; + xiocb.xiocb_psize = 0; + + cfe_iocb_dispatch(&xiocb); + + if (xiocb.xiocb_status < 0) + return xiocb.xiocb_status; + return xiocb.xiocb_handle; +} + +int64_t +cfe_getticks(void) +{ + struct cfe_xiocb xiocb; + + xiocb.xiocb_fcode = CFE_CMD_FW_GETTIME; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = 0; + xiocb.xiocb_flags = 0; + xiocb.xiocb_psize = sizeof(struct xiocb_time); + xiocb.plist.xiocb_time.ticks = 0; + + cfe_iocb_dispatch(&xiocb); + + return xiocb.plist.xiocb_time.ticks; + +} + +int cfe_inpstat(int handle) +{ + struct cfe_xiocb xiocb; + + xiocb.xiocb_fcode = CFE_CMD_DEV_INPSTAT; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = handle; + xiocb.xiocb_flags = 0; + xiocb.xiocb_psize = sizeof(struct xiocb_inpstat); + xiocb.plist.xiocb_inpstat.inp_status = 0; + + cfe_iocb_dispatch(&xiocb); + + if (xiocb.xiocb_status < 0) + return xiocb.xiocb_status; + return xiocb.plist.xiocb_inpstat.inp_status; +} + +int +cfe_ioctl(int handle, unsigned int ioctlnum, unsigned char *buffer, + int length, int *retlen, u64 offset) +{ + struct cfe_xiocb xiocb; + + xiocb.xiocb_fcode = CFE_CMD_DEV_IOCTL; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = handle; + xiocb.xiocb_flags = 0; + xiocb.xiocb_psize = sizeof(struct xiocb_buffer); + xiocb.plist.xiocb_buffer.buf_offset = offset; + xiocb.plist.xiocb_buffer.buf_ioctlcmd = ioctlnum; + xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(buffer); + xiocb.plist.xiocb_buffer.buf_length = length; + + cfe_iocb_dispatch(&xiocb); + + if (retlen) + *retlen = xiocb.plist.xiocb_buffer.buf_retlen; + return xiocb.xiocb_status; +} + +int cfe_open(char *name) +{ + struct cfe_xiocb xiocb; + + xiocb.xiocb_fcode = CFE_CMD_DEV_OPEN; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = 0; + xiocb.xiocb_flags = 0; + xiocb.xiocb_psize = sizeof(struct xiocb_buffer); + xiocb.plist.xiocb_buffer.buf_offset = 0; + xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(name); + xiocb.plist.xiocb_buffer.buf_length = strlen(name); + + cfe_iocb_dispatch(&xiocb); + + if (xiocb.xiocb_status < 0) + return xiocb.xiocb_status; + return xiocb.xiocb_handle; +} + +int cfe_read(int handle, unsigned char *buffer, int length) +{ + return cfe_readblk(handle, 0, buffer, length); +} + +int cfe_readblk(int handle, s64 offset, unsigned char *buffer, int length) +{ + struct cfe_xiocb xiocb; + + xiocb.xiocb_fcode = CFE_CMD_DEV_READ; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = handle; + xiocb.xiocb_flags = 0; + xiocb.xiocb_psize = sizeof(struct xiocb_buffer); + xiocb.plist.xiocb_buffer.buf_offset = offset; + xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(buffer); + xiocb.plist.xiocb_buffer.buf_length = length; + + cfe_iocb_dispatch(&xiocb); + + if (xiocb.xiocb_status < 0) + return xiocb.xiocb_status; + return xiocb.plist.xiocb_buffer.buf_retlen; +} + +int cfe_setenv(char *name, char *val) +{ + struct cfe_xiocb xiocb; + + xiocb.xiocb_fcode = CFE_CMD_ENV_SET; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = 0; + xiocb.xiocb_flags = 0; + xiocb.xiocb_psize = sizeof(struct xiocb_envbuf); + xiocb.plist.xiocb_envbuf.enum_idx = 0; + xiocb.plist.xiocb_envbuf.name_ptr = XPTR_FROM_NATIVE(name); + xiocb.plist.xiocb_envbuf.name_length = strlen(name); + xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(val); + xiocb.plist.xiocb_envbuf.val_length = strlen(val); + + cfe_iocb_dispatch(&xiocb); + + return xiocb.xiocb_status; +} + +int cfe_write(int handle, const char *buffer, int length) +{ + return cfe_writeblk(handle, 0, buffer, length); +} + +int cfe_writeblk(int handle, s64 offset, const char *buffer, int length) +{ + struct cfe_xiocb xiocb; + + xiocb.xiocb_fcode = CFE_CMD_DEV_WRITE; + xiocb.xiocb_status = 0; + xiocb.xiocb_handle = handle; + xiocb.xiocb_flags = 0; + xiocb.xiocb_psize = sizeof(struct xiocb_buffer); + xiocb.plist.xiocb_buffer.buf_offset = offset; + xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(buffer); + xiocb.plist.xiocb_buffer.buf_length = length; + + cfe_iocb_dispatch(&xiocb); + + if (xiocb.xiocb_status < 0) + return xiocb.xiocb_status; + return xiocb.plist.xiocb_buffer.buf_retlen; +} + +void __init cfe_die(char *fmt, ...) +{ + unsigned int prid, __maybe_unused rev; + char msg[128]; + va_list ap; + int handle; + unsigned int count; + + va_start(ap, fmt); + vsprintf(msg, fmt, ap); + strcat(msg, "\r\n"); + + if (cfe_seal != CFE_EPTSEAL) + goto no_cfe; + + prid = read_c0_prid(); + if ((prid & PRID_COMP_MASK) != PRID_COMP_BROADCOM) + goto no_cfe; + + rev = prid & PRID_REV_MASK; + + /* disable XKS01 so that CFE can access the registers */ + switch (prid & PRID_IMP_MASK) { +#ifdef CONFIG_CPU_BMIPS4380 + case PRID_IMP_BMIPS43XX: + if (rev >= PRID_REV_BMIPS4380_LO && + rev <= PRID_REV_BMIPS4380_HI) + __write_32bit_c0_register($22, 3, + __read_32bit_c0_register($22, 3) & ~BIT(12)); + break; +#endif +#ifdef CONFIG_CPU_BMIPS5000 + case PRID_IMP_BMIPS5000: + case PRID_IMP_BMIPS5200: + __write_32bit_c0_register($22, 5, + __read_32bit_c0_register($22, 5) & ~BIT(8)); + break; +#endif + default: + break; + } + + handle = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE); + if (handle < 0) + goto no_cfe; + + cfe_write(handle, msg, strlen(msg)); + + for (count = 0; count < 0x7fffffff; count++) + mb(); + cfe_exit(0, 1); + while (1) + ; + +no_cfe: + /* probably won't print anywhere useful */ + panic("%s", msg); + + va_end(ap); +} diff --git a/arch/mips/fw/cfe/cfe_api_int.h b/arch/mips/fw/cfe/cfe_api_int.h new file mode 100644 index 000000000..61a665d44 --- /dev/null +++ b/arch/mips/fw/cfe/cfe_api_int.h @@ -0,0 +1,135 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) 2000, 2001, 2002 Broadcom Corporation + */ +#ifndef CFE_API_INT_H +#define CFE_API_INT_H + +/* + * Constants. + */ +#define CFE_CMD_FW_GETINFO 0 +#define CFE_CMD_FW_RESTART 1 +#define CFE_CMD_FW_BOOT 2 +#define CFE_CMD_FW_CPUCTL 3 +#define CFE_CMD_FW_GETTIME 4 +#define CFE_CMD_FW_MEMENUM 5 +#define CFE_CMD_FW_FLUSHCACHE 6 + +#define CFE_CMD_DEV_GETHANDLE 9 +#define CFE_CMD_DEV_ENUM 10 +#define CFE_CMD_DEV_OPEN 11 +#define CFE_CMD_DEV_INPSTAT 12 +#define CFE_CMD_DEV_READ 13 +#define CFE_CMD_DEV_WRITE 14 +#define CFE_CMD_DEV_IOCTL 15 +#define CFE_CMD_DEV_CLOSE 16 +#define CFE_CMD_DEV_GETINFO 17 + +#define CFE_CMD_ENV_ENUM 20 +#define CFE_CMD_ENV_GET 22 +#define CFE_CMD_ENV_SET 23 +#define CFE_CMD_ENV_DEL 24 + +#define CFE_CMD_MAX 32 + +#define CFE_CMD_VENDOR_USE 0x8000 /* codes above this are for customer use */ + +/* + * Structures. + */ + +/* eeek, signed "pointers" */ +typedef s64 cfe_xptr_t; + +struct xiocb_buffer { + u64 buf_offset; /* offset on device (bytes) */ + cfe_xptr_t buf_ptr; /* pointer to a buffer */ + u64 buf_length; /* length of this buffer */ + u64 buf_retlen; /* returned length (for read ops) */ + u64 buf_ioctlcmd; /* IOCTL command (used only for IOCTLs) */ +}; + +struct xiocb_inpstat { + u64 inp_status; /* 1 means input available */ +}; + +struct xiocb_envbuf { + s64 enum_idx; /* 0-based enumeration index */ + cfe_xptr_t name_ptr; /* name string buffer */ + s64 name_length; /* size of name buffer */ + cfe_xptr_t val_ptr; /* value string buffer */ + s64 val_length; /* size of value string buffer */ +}; + +struct xiocb_cpuctl { + u64 cpu_number; /* cpu number to control */ + u64 cpu_command; /* command to issue to CPU */ + u64 start_addr; /* CPU start address */ + u64 gp_val; /* starting GP value */ + u64 sp_val; /* starting SP value */ + u64 a1_val; /* starting A1 value */ +}; + +struct xiocb_time { + s64 ticks; /* current time in ticks */ +}; + +struct xiocb_exitstat{ + s64 status; +}; + +struct xiocb_meminfo { + s64 mi_idx; /* 0-based enumeration index */ + s64 mi_type; /* type of memory block */ + u64 mi_addr; /* physical start address */ + u64 mi_size; /* block size */ +}; + +struct xiocb_fwinfo { + s64 fwi_version; /* major, minor, eco version */ + s64 fwi_totalmem; /* total installed mem */ + s64 fwi_flags; /* various flags */ + s64 fwi_boardid; /* board ID */ + s64 fwi_bootarea_va; /* VA of boot area */ + s64 fwi_bootarea_pa; /* PA of boot area */ + s64 fwi_bootarea_size; /* size of boot area */ + s64 fwi_reserved1; + s64 fwi_reserved2; + s64 fwi_reserved3; +}; + +struct cfe_xiocb { + u64 xiocb_fcode; /* IOCB function code */ + s64 xiocb_status; /* return status */ + s64 xiocb_handle; /* file/device handle */ + u64 xiocb_flags; /* flags for this IOCB */ + u64 xiocb_psize; /* size of parameter list */ + union { + /* buffer parameters */ + struct xiocb_buffer xiocb_buffer; + + /* input status parameters */ + struct xiocb_inpstat xiocb_inpstat; + + /* environment function parameters */ + struct xiocb_envbuf xiocb_envbuf; + + /* CPU control parameters */ + struct xiocb_cpuctl xiocb_cpuctl; + + /* timer parameters */ + struct xiocb_time xiocb_time; + + /* memory arena info parameters */ + struct xiocb_meminfo xiocb_meminfo; + + /* firmware information */ + struct xiocb_fwinfo xiocb_fwinfo; + + /* Exit Status */ + struct xiocb_exitstat xiocb_exitstat; + } plist; +}; + +#endif /* CFE_API_INT_H */ diff --git a/arch/mips/fw/lib/Makefile b/arch/mips/fw/lib/Makefile new file mode 100644 index 000000000..cf9634548 --- /dev/null +++ b/arch/mips/fw/lib/Makefile @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Makefile for generic prom monitor library routines under Linux. +# + +lib-y += cmdline.o + +lib-$(CONFIG_64BIT) += call_o32.o diff --git a/arch/mips/fw/lib/call_o32.S b/arch/mips/fw/lib/call_o32.S new file mode 100644 index 000000000..ee856709e --- /dev/null +++ b/arch/mips/fw/lib/call_o32.S @@ -0,0 +1,104 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * O32 interface for the 64 (or N32) ABI. + * + * Copyright (C) 2002, 2014 Maciej W. Rozycki + */ + +#include +#include + +/* O32 register size. */ +#define O32_SZREG 4 +/* Maximum number of arguments supported. Must be even! */ +#define O32_ARGC 32 +/* Number of static registers we save. */ +#define O32_STATC 11 +/* Argument area frame size. */ +#define O32_ARGSZ (O32_SZREG * O32_ARGC) +/* Static register save area frame size. */ +#define O32_STATSZ (SZREG * O32_STATC) +/* Stack pointer register save area frame size. */ +#define O32_SPSZ SZREG +/* Combined area frame size. */ +#define O32_FRAMESZ (O32_ARGSZ + O32_SPSZ + O32_STATSZ) +/* Switched stack frame size. */ +#define O32_NFRAMESZ (O32_ARGSZ + O32_SPSZ) + + .text + +/* + * O32 function call dispatcher, for interfacing 32-bit ROM routines. + * + * The standard 64 (N32) calling sequence is supported, with a0 holding + * a function pointer, a1 a pointer to the new stack to call the + * function with or 0 if no stack switching is requested, a2-a7 -- the + * function call's first six arguments, and the stack -- the remaining + * arguments (up to O32_ARGC, including a2-a7). Static registers, gp + * and fp are preserved, v0 holds the result. This code relies on the + * called o32 function for sp and ra restoration and this dispatcher has + * to be placed in a KSEGx (or KUSEG) address space. Any pointers + * passed have to point to addresses within one of these spaces as well. + */ +NESTED(call_o32, O32_FRAMESZ, ra) + REG_SUBU sp,O32_FRAMESZ + + REG_S ra,O32_FRAMESZ-1*SZREG(sp) + REG_S fp,O32_FRAMESZ-2*SZREG(sp) + REG_S gp,O32_FRAMESZ-3*SZREG(sp) + REG_S s7,O32_FRAMESZ-4*SZREG(sp) + REG_S s6,O32_FRAMESZ-5*SZREG(sp) + REG_S s5,O32_FRAMESZ-6*SZREG(sp) + REG_S s4,O32_FRAMESZ-7*SZREG(sp) + REG_S s3,O32_FRAMESZ-8*SZREG(sp) + REG_S s2,O32_FRAMESZ-9*SZREG(sp) + REG_S s1,O32_FRAMESZ-10*SZREG(sp) + REG_S s0,O32_FRAMESZ-11*SZREG(sp) + + move jp,a0 + + move fp,sp + beqz a1,0f + REG_SUBU fp,a1,O32_NFRAMESZ +0: + REG_S sp,O32_NFRAMESZ-1*SZREG(fp) + + sll a0,a2,zero + sll a1,a3,zero + sll a2,a4,zero + sll a3,a5,zero + sw a6,4*O32_SZREG(fp) + sw a7,5*O32_SZREG(fp) + + PTR_LA t0,O32_FRAMESZ(sp) + PTR_LA t1,6*O32_SZREG(fp) + li t2,O32_ARGC-6 +1: + lw t3,(t0) + REG_ADDU t0,SZREG + sw t3,(t1) + REG_SUBU t2,1 + REG_ADDU t1,O32_SZREG + bnez t2,1b + + move sp,fp + + jalr jp + + REG_L sp,O32_NFRAMESZ-1*SZREG(sp) + + REG_L s0,O32_FRAMESZ-11*SZREG(sp) + REG_L s1,O32_FRAMESZ-10*SZREG(sp) + REG_L s2,O32_FRAMESZ-9*SZREG(sp) + REG_L s3,O32_FRAMESZ-8*SZREG(sp) + REG_L s4,O32_FRAMESZ-7*SZREG(sp) + REG_L s5,O32_FRAMESZ-6*SZREG(sp) + REG_L s6,O32_FRAMESZ-5*SZREG(sp) + REG_L s7,O32_FRAMESZ-4*SZREG(sp) + REG_L gp,O32_FRAMESZ-3*SZREG(sp) + REG_L fp,O32_FRAMESZ-2*SZREG(sp) + REG_L ra,O32_FRAMESZ-1*SZREG(sp) + + REG_ADDU sp,O32_FRAMESZ + jr ra +END(call_o32) diff --git a/arch/mips/fw/lib/cmdline.c b/arch/mips/fw/lib/cmdline.c new file mode 100644 index 000000000..892765b74 --- /dev/null +++ b/arch/mips/fw/lib/cmdline.c @@ -0,0 +1,103 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved. + */ +#include +#include +#include + +#include +#include + +int fw_argc; +int *_fw_argv; +int *_fw_envp; + +#ifndef CONFIG_HAVE_PLAT_FW_INIT_CMDLINE +void __init fw_init_cmdline(void) +{ + int i; + + /* Validate command line parameters. */ + if ((fw_arg0 >= CKSEG0) || (fw_arg1 < CKSEG0)) { + fw_argc = 0; + _fw_argv = NULL; + } else { + fw_argc = (fw_arg0 & 0x0000ffff); + _fw_argv = (int *)fw_arg1; + } + + /* Validate environment pointer. */ + if (fw_arg2 < CKSEG0) + _fw_envp = NULL; + else + _fw_envp = (int *)fw_arg2; + + for (i = 1; i < fw_argc; i++) { + strlcat(arcs_cmdline, fw_argv(i), COMMAND_LINE_SIZE); + if (i < (fw_argc - 1)) + strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE); + } +} +#endif + +char * __init fw_getcmdline(void) +{ + return &(arcs_cmdline[0]); +} + +char *fw_getenv(char *envname) +{ + char *result = NULL; + + if (_fw_envp != NULL && fw_envp(0) != NULL) { + /* + * Return a pointer to the given environment variable. + * YAMON uses "name", "value" pairs, while U-Boot uses + * "name=value". + */ + int i, yamon, index = 0; + + yamon = (strchr(fw_envp(index), '=') == NULL); + i = strlen(envname); + + while (fw_envp(index)) { + if (strncmp(envname, fw_envp(index), i) == 0) { + if (yamon) { + result = fw_envp(index + 1); + break; + } else if (fw_envp(index)[i] == '=') { + result = fw_envp(index) + i + 1; + break; + } + } + + /* Increment array index. */ + if (yamon) + index += 2; + else + index += 1; + } + } + + return result; +} + +unsigned long fw_getenvl(char *envname) +{ + unsigned long envl = 0UL; + char *str; + int tmp; + + str = fw_getenv(envname); + if (str) { + tmp = kstrtoul(str, 0, &envl); + if (tmp) + envl = 0; + } + + return envl; +} diff --git a/arch/mips/fw/sni/Makefile b/arch/mips/fw/sni/Makefile new file mode 100644 index 000000000..e5ba8e86b --- /dev/null +++ b/arch/mips/fw/sni/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Makefile for the SNI prom monitor routines under Linux. +# + +lib-$(CONFIG_FW_SNIPROM) += sniprom.o diff --git a/arch/mips/fw/sni/sniprom.c b/arch/mips/fw/sni/sniprom.c new file mode 100644 index 000000000..74975e115 --- /dev/null +++ b/arch/mips/fw/sni/sniprom.c @@ -0,0 +1,149 @@ +/* + * Big Endian PROM code for SNI RM machines + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2005-2006 Florian Lohoff (flo@rfc822.org) + * Copyright (C) 2005-2006 Thomas Bogendoerfer (tsbogend@alpha.franken.de) + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +/* special SNI prom calls */ +/* + * This does not exist in all proms - SINIX compares + * the prom env variable "version" against "2.0008" + * or greater. If lesser it tries to probe interesting + * registers + */ +#define PROM_GET_MEMCONF 58 +#define PROM_GET_HWCONF 61 + +#define PROM_VEC (u64 *)CKSEG1ADDR(0x1fc00000) +#define PROM_ENTRY(x) (PROM_VEC + (x)) + +#define ___prom_putchar ((int *(*)(int))PROM_ENTRY(PROM_PUTCHAR)) +#define ___prom_getenv ((char *(*)(char *))PROM_ENTRY(PROM_GETENV)) +#define ___prom_get_memconf ((void (*)(void *))PROM_ENTRY(PROM_GET_MEMCONF)) +#define ___prom_get_hwconf ((u32 (*)(void))PROM_ENTRY(PROM_GET_HWCONF)) + +#ifdef CONFIG_64BIT + +/* O32 stack has to be 8-byte aligned. */ +static u64 o32_stk[4096]; +#define O32_STK (&o32_stk[ARRAY_SIZE(o32_stk)]) + +#define __PROM_O32(fun, arg) fun arg __asm__(#fun); \ + __asm__(#fun " = call_o32") + +int __PROM_O32(__prom_putchar, (int *(*)(int), void *, int)); +char *__PROM_O32(__prom_getenv, (char *(*)(char *), void *, char *)); +void __PROM_O32(__prom_get_memconf, (void (*)(void *), void *, void *)); +u32 __PROM_O32(__prom_get_hwconf, (u32 (*)(void), void *)); + +#define _prom_putchar(x) __prom_putchar(___prom_putchar, O32_STK, x) +#define _prom_getenv(x) __prom_getenv(___prom_getenv, O32_STK, x) +#define _prom_get_memconf(x) __prom_get_memconf(___prom_get_memconf, O32_STK, x) +#define _prom_get_hwconf() __prom_get_hwconf(___prom_get_hwconf, O32_STK) + +#else +#define _prom_putchar(x) ___prom_putchar(x) +#define _prom_getenv(x) ___prom_getenv(x) +#define _prom_get_memconf(x) ___prom_get_memconf(x) +#define _prom_get_hwconf(x) ___prom_get_hwconf(x) +#endif + +void prom_putchar(char c) +{ + _prom_putchar(c); +} + + +char *prom_getenv(char *s) +{ + return _prom_getenv(s); +} + +void *prom_get_hwconf(void) +{ + u32 hwconf = _prom_get_hwconf(); + + if (hwconf == 0xffffffff) + return NULL; + + return (void *)CKSEG1ADDR(hwconf); +} + +/* + * /proc/cpuinfo system type + * + */ +char *system_type = "Unknown"; +const char *get_system_type(void) +{ + return system_type; +} + +static void __init sni_mem_init(void) +{ + int i, memsize; + struct membank { + u32 size; + u32 base; + u32 size2; + u32 pad1; + u32 pad2; + } memconf[8]; + int brd_type = *(unsigned char *)SNI_IDPROM_BRDTYPE; + + + /* MemSIZE from prom in 16MByte chunks */ + memsize = *((unsigned char *) SNI_IDPROM_MEMSIZE) * 16; + + pr_debug("IDProm memsize: %u MByte\n", memsize); + + /* get memory bank layout from prom */ + _prom_get_memconf(&memconf); + + pr_debug("prom_get_mem_conf memory configuration:\n"); + for (i = 0; i < 8 && memconf[i].size; i++) { + if (brd_type == SNI_BRD_PCI_TOWER || + brd_type == SNI_BRD_PCI_TOWER_CPLUS) { + if (memconf[i].base >= 0x20000000 && + memconf[i].base < 0x30000000) + memconf[i].base -= 0x20000000; + } + pr_debug("Bank%d: %08x @ %08x\n", i, + memconf[i].size, memconf[i].base); + memblock_add(memconf[i].base, memconf[i].size); + } +} + +void __init prom_init(void) +{ + int argc = fw_arg0; + u32 *argv = (u32 *)CKSEG0ADDR(fw_arg1); + int i; + + sni_mem_init(); + + /* copy prom cmdline parameters to kernel cmdline */ + for (i = 1; i < argc; i++) { + strcat(arcs_cmdline, (char *)CKSEG0ADDR(argv[i])); + if (i < (argc - 1)) + strcat(arcs_cmdline, " "); + } +} -- cgit v1.2.3