From 2c3c1048746a4622d8c89a29670120dc8fab93c4 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sun, 7 Apr 2024 20:49:45 +0200 Subject: Adding upstream version 6.1.76. Signed-off-by: Daniel Baumann --- drivers/gpu/drm/msm/msm_fence.h | 78 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) create mode 100644 drivers/gpu/drm/msm/msm_fence.h (limited to 'drivers/gpu/drm/msm/msm_fence.h') diff --git a/drivers/gpu/drm/msm/msm_fence.h b/drivers/gpu/drm/msm/msm_fence.h new file mode 100644 index 000000000..7f1798c54 --- /dev/null +++ b/drivers/gpu/drm/msm/msm_fence.h @@ -0,0 +1,78 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2013-2016 Red Hat + * Author: Rob Clark + */ + +#ifndef __MSM_FENCE_H__ +#define __MSM_FENCE_H__ + +#include "msm_drv.h" + +/** + * struct msm_fence_context - fence context for gpu + * + * Each ringbuffer has a single fence context, with the GPU writing an + * incrementing fence seqno at the end of each submit + */ +struct msm_fence_context { + struct drm_device *dev; + /** name: human readable name for fence timeline */ + char name[32]; + /** context: see dma_fence_context_alloc() */ + unsigned context; + /** index: similar to context, but local to msm_fence_context's */ + unsigned index; + + /** + * last_fence: + * + * Last assigned fence, incremented each time a fence is created + * on this fence context. If last_fence == completed_fence, + * there is no remaining pending work + */ + uint32_t last_fence; + + /** + * completed_fence: + * + * The last completed fence, updated from the CPU after interrupt + * from GPU + */ + uint32_t completed_fence; + + /** + * fenceptr: + * + * The address that the GPU directly writes with completed fence + * seqno. This can be ahead of completed_fence. We can peek at + * this to see if a fence has already signaled but the CPU hasn't + * gotten around to handling the irq and updating completed_fence + */ + volatile uint32_t *fenceptr; + + spinlock_t spinlock; +}; + +struct msm_fence_context * msm_fence_context_alloc(struct drm_device *dev, + volatile uint32_t *fenceptr, const char *name); +void msm_fence_context_free(struct msm_fence_context *fctx); + +bool msm_fence_completed(struct msm_fence_context *fctx, uint32_t fence); +void msm_update_fence(struct msm_fence_context *fctx, uint32_t fence); + +struct dma_fence * msm_fence_alloc(struct msm_fence_context *fctx); + +static inline bool +fence_before(uint32_t a, uint32_t b) +{ + return (int32_t)(a - b) < 0; +} + +static inline bool +fence_after(uint32_t a, uint32_t b) +{ + return (int32_t)(a - b) > 0; +} + +#endif -- cgit v1.2.3