From 2c3c1048746a4622d8c89a29670120dc8fab93c4 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sun, 7 Apr 2024 20:49:45 +0200 Subject: Adding upstream version 6.1.76. Signed-off-by: Daniel Baumann --- .../asic_reg/dcore0_mme_qm_axuser_secured_regs.h | 61 ++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 drivers/misc/habanalabs/include/gaudi2/asic_reg/dcore0_mme_qm_axuser_secured_regs.h (limited to 'drivers/misc/habanalabs/include/gaudi2/asic_reg/dcore0_mme_qm_axuser_secured_regs.h') diff --git a/drivers/misc/habanalabs/include/gaudi2/asic_reg/dcore0_mme_qm_axuser_secured_regs.h b/drivers/misc/habanalabs/include/gaudi2/asic_reg/dcore0_mme_qm_axuser_secured_regs.h new file mode 100644 index 000000000..e168c1cc2 --- /dev/null +++ b/drivers/misc/habanalabs/include/gaudi2/asic_reg/dcore0_mme_qm_axuser_secured_regs.h @@ -0,0 +1,61 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright 2016-2020 HabanaLabs, Ltd. + * All Rights Reserved. + * + */ + +/************************************ + ** This is an auto-generated file ** + ** DO NOT EDIT BELOW ** + ************************************/ + +#ifndef ASIC_REG_DCORE0_MME_QM_AXUSER_SECURED_REGS_H_ +#define ASIC_REG_DCORE0_MME_QM_AXUSER_SECURED_REGS_H_ + +/* + ***************************************** + * DCORE0_MME_QM_AXUSER_SECURED + * (Prototype: AXUSER) + ***************************************** + */ + +#define mmDCORE0_MME_QM_AXUSER_SECURED_HB_ASID 0x40CAB00 + +#define mmDCORE0_MME_QM_AXUSER_SECURED_HB_MMU_BP 0x40CAB04 + +#define mmDCORE0_MME_QM_AXUSER_SECURED_HB_STRONG_ORDER 0x40CAB08 + +#define mmDCORE0_MME_QM_AXUSER_SECURED_HB_NO_SNOOP 0x40CAB0C + +#define mmDCORE0_MME_QM_AXUSER_SECURED_HB_WR_REDUCTION 0x40CAB10 + +#define mmDCORE0_MME_QM_AXUSER_SECURED_HB_RD_ATOMIC 0x40CAB14 + +#define mmDCORE0_MME_QM_AXUSER_SECURED_HB_QOS 0x40CAB18 + +#define mmDCORE0_MME_QM_AXUSER_SECURED_HB_RSVD 0x40CAB1C + +#define mmDCORE0_MME_QM_AXUSER_SECURED_HB_EMEM_CPAGE 0x40CAB20 + +#define mmDCORE0_MME_QM_AXUSER_SECURED_HB_CORE 0x40CAB24 + +#define mmDCORE0_MME_QM_AXUSER_SECURED_E2E_COORD 0x40CAB28 + +#define mmDCORE0_MME_QM_AXUSER_SECURED_HB_WR_OVRD_LO 0x40CAB30 + +#define mmDCORE0_MME_QM_AXUSER_SECURED_HB_WR_OVRD_HI 0x40CAB34 + +#define mmDCORE0_MME_QM_AXUSER_SECURED_HB_RD_OVRD_LO 0x40CAB38 + +#define mmDCORE0_MME_QM_AXUSER_SECURED_HB_RD_OVRD_HI 0x40CAB3C + +#define mmDCORE0_MME_QM_AXUSER_SECURED_LB_COORD 0x40CAB40 + +#define mmDCORE0_MME_QM_AXUSER_SECURED_LB_LOCK 0x40CAB44 + +#define mmDCORE0_MME_QM_AXUSER_SECURED_LB_RSVD 0x40CAB48 + +#define mmDCORE0_MME_QM_AXUSER_SECURED_LB_OVRD 0x40CAB4C + +#endif /* ASIC_REG_DCORE0_MME_QM_AXUSER_SECURED_REGS_H_ */ -- cgit v1.2.3