From 2c3c1048746a4622d8c89a29670120dc8fab93c4 Mon Sep 17 00:00:00 2001
From: Daniel Baumann <daniel.baumann@progress-linux.org>
Date: Sun, 7 Apr 2024 20:49:45 +0200
Subject: Adding upstream version 6.1.76.

Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
---
 .../perf/pmu-events/arch/x86/nehalemex/other.json  | 146 +++++++++++++++++++++
 1 file changed, 146 insertions(+)
 create mode 100644 tools/perf/pmu-events/arch/x86/nehalemex/other.json

(limited to 'tools/perf/pmu-events/arch/x86/nehalemex/other.json')

diff --git a/tools/perf/pmu-events/arch/x86/nehalemex/other.json b/tools/perf/pmu-events/arch/x86/nehalemex/other.json
new file mode 100644
index 000000000..f6887b234
--- /dev/null
+++ b/tools/perf/pmu-events/arch/x86/nehalemex/other.json
@@ -0,0 +1,146 @@
+[
+    {
+        "BriefDescription": "ES segment renames",
+        "Counter": "0,1,2,3",
+        "EventCode": "0xD5",
+        "EventName": "ES_REG_RENAMES",
+        "SampleAfterValue": "2000000",
+        "UMask": "0x1"
+    },
+    {
+        "BriefDescription": "I/O transactions",
+        "Counter": "0,1,2,3",
+        "EventCode": "0x6C",
+        "EventName": "IO_TRANSACTIONS",
+        "SampleAfterValue": "2000000",
+        "UMask": "0x1"
+    },
+    {
+        "BriefDescription": "L1I instruction fetch stall cycles",
+        "Counter": "0,1,2,3",
+        "EventCode": "0x80",
+        "EventName": "L1I.CYCLES_STALLED",
+        "SampleAfterValue": "2000000",
+        "UMask": "0x4"
+    },
+    {
+        "BriefDescription": "L1I instruction fetch hits",
+        "Counter": "0,1,2,3",
+        "EventCode": "0x80",
+        "EventName": "L1I.HITS",
+        "SampleAfterValue": "2000000",
+        "UMask": "0x1"
+    },
+    {
+        "BriefDescription": "L1I instruction fetch misses",
+        "Counter": "0,1,2,3",
+        "EventCode": "0x80",
+        "EventName": "L1I.MISSES",
+        "SampleAfterValue": "2000000",
+        "UMask": "0x2"
+    },
+    {
+        "BriefDescription": "L1I Instruction fetches",
+        "Counter": "0,1,2,3",
+        "EventCode": "0x80",
+        "EventName": "L1I.READS",
+        "SampleAfterValue": "2000000",
+        "UMask": "0x3"
+    },
+    {
+        "BriefDescription": "Large ITLB hit",
+        "Counter": "0,1,2,3",
+        "EventCode": "0x82",
+        "EventName": "LARGE_ITLB.HIT",
+        "SampleAfterValue": "200000",
+        "UMask": "0x1"
+    },
+    {
+        "BriefDescription": "All loads dispatched",
+        "Counter": "0,1,2,3",
+        "EventCode": "0x13",
+        "EventName": "LOAD_DISPATCH.ANY",
+        "SampleAfterValue": "2000000",
+        "UMask": "0x7"
+    },
+    {
+        "BriefDescription": "Loads dispatched from the MOB",
+        "Counter": "0,1,2,3",
+        "EventCode": "0x13",
+        "EventName": "LOAD_DISPATCH.MOB",
+        "SampleAfterValue": "2000000",
+        "UMask": "0x4"
+    },
+    {
+        "BriefDescription": "Loads dispatched that bypass the MOB",
+        "Counter": "0,1,2,3",
+        "EventCode": "0x13",
+        "EventName": "LOAD_DISPATCH.RS",
+        "SampleAfterValue": "2000000",
+        "UMask": "0x1"
+    },
+    {
+        "BriefDescription": "Loads dispatched from stage 305",
+        "Counter": "0,1,2,3",
+        "EventCode": "0x13",
+        "EventName": "LOAD_DISPATCH.RS_DELAYED",
+        "SampleAfterValue": "2000000",
+        "UMask": "0x2"
+    },
+    {
+        "BriefDescription": "False dependencies due to partial address aliasing",
+        "Counter": "0,1,2,3",
+        "EventCode": "0x7",
+        "EventName": "PARTIAL_ADDRESS_ALIAS",
+        "SampleAfterValue": "200000",
+        "UMask": "0x1"
+    },
+    {
+        "BriefDescription": "All Store buffer stall cycles",
+        "Counter": "0,1,2,3",
+        "EventCode": "0x4",
+        "EventName": "SB_DRAIN.ANY",
+        "SampleAfterValue": "200000",
+        "UMask": "0x7"
+    },
+    {
+        "BriefDescription": "Segment rename stall cycles",
+        "Counter": "0,1,2,3",
+        "EventCode": "0xD4",
+        "EventName": "SEG_RENAME_STALLS",
+        "SampleAfterValue": "2000000",
+        "UMask": "0x1"
+    },
+    {
+        "BriefDescription": "Thread responded HIT to snoop",
+        "Counter": "0,1,2,3",
+        "EventCode": "0xB8",
+        "EventName": "SNOOP_RESPONSE.HIT",
+        "SampleAfterValue": "100000",
+        "UMask": "0x1"
+    },
+    {
+        "BriefDescription": "Thread responded HITE to snoop",
+        "Counter": "0,1,2,3",
+        "EventCode": "0xB8",
+        "EventName": "SNOOP_RESPONSE.HITE",
+        "SampleAfterValue": "100000",
+        "UMask": "0x2"
+    },
+    {
+        "BriefDescription": "Thread responded HITM to snoop",
+        "Counter": "0,1,2,3",
+        "EventCode": "0xB8",
+        "EventName": "SNOOP_RESPONSE.HITM",
+        "SampleAfterValue": "100000",
+        "UMask": "0x4"
+    },
+    {
+        "BriefDescription": "Super Queue full stall cycles",
+        "Counter": "0,1,2,3",
+        "EventCode": "0xF6",
+        "EventName": "SQ_FULL_STALL_CYCLES",
+        "SampleAfterValue": "2000000",
+        "UMask": "0x1"
+    }
+]
-- 
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