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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* PPA8548 Device Tree Source (36-bit address map)
* Copyright 2013 Prodrive B.V.
*
* Based on:
* MPC8548 CDS Device Tree Source (36-bit address map)
* Copyright 2012 Freescale Semiconductor Inc.
*/
/include/ "mpc8548si-pre.dtsi"
/ {
model = "ppa8548";
compatible = "ppa8548";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&mpic>;
memory {
device_type = "memory";
reg = <0 0 0x0 0x40000000>;
};
lbc: localbus@fe0005000 {
reg = <0xf 0xe0005000 0 0x1000>;
ranges = <0x0 0x0 0xf 0xff800000 0x00800000>;
};
soc: soc8548@fe0000000 {
ranges = <0 0xf 0xe0000000 0x100000>;
};
pci0: pci@fe0008000 {
/* ppa8548 board doesn't support PCI */
status = "disabled";
};
pci1: pci@fe0009000 {
/* ppa8548 board doesn't support PCI */
status = "disabled";
};
pci2: pcie@fe000a000 {
/* ppa8548 board doesn't support PCI */
status = "disabled";
};
rio: rapidio@fe00c0000 {
reg = <0xf 0xe00c0000 0x0 0x11000>;
port1 {
ranges = <0x0 0x0 0x0 0x80000000 0x0 0x40000000>;
};
};
};
&lbc {
nor@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x00800000>;
bank-width = <2>;
device-width = <2>;
partition@0 {
reg = <0x0 0x7A0000>;
label = "user";
};
partition@7A0000 {
reg = <0x7A0000 0x20000>;
label = "env";
read-only;
};
partition@7C0000 {
reg = <0x7C0000 0x40000>;
label = "u-boot";
read-only;
};
};
};
&soc {
i2c@3000 {
rtc@6f {
compatible = "intersil,isl1208";
reg = <0x6f>;
};
};
i2c@3100 {
};
/*
* Only ethernet controller @25000 and @26000 are used.
* Use alias enet2 and enet3 for the remainig controllers,
* to stay compatible with mpc8548si-pre.dtsi.
*/
enet2: ethernet@24000 {
status = "disabled";
};
mdio@24520 {
phy0: ethernet-phy@0 {
interrupts = <7 1 0 0>;
reg = <0x0>;
};
phy1: ethernet-phy@1 {
interrupts = <8 1 0 0>;
reg = <0x1>;
};
tbi0: tbi-phy@11 {
reg = <0x11>;
device_type = "tbi-phy";
};
};
enet0: ethernet@25000 {
tbi-handle = <&tbi1>;
phy-handle = <&phy0>;
};
mdio@25520 {
tbi1: tbi-phy@11 {
reg = <0x11>;
device_type = "tbi-phy";
};
};
enet1: ethernet@26000 {
tbi-handle = <&tbi2>;
phy-handle = <&phy1>;
};
mdio@26520 {
tbi2: tbi-phy@11 {
reg = <0x11>;
device_type = "tbi-phy";
};
};
enet3: ethernet@27000 {
status = "disabled";
};
mdio@27520 {
tbi3: tbi-phy@11 {
reg = <0x11>;
device_type = "tbi-phy";
};
};
crypto@30000 {
status = "disabled";
};
};
/include/ "mpc8548si-post.dtsi"
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