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/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
/*
* Copyright (c) 2020 huangzhenwei@allwinnertech.com
* Copyright (C) 2021 Samuel Holland <samuel@sholland.org>
*/
#ifndef _DT_BINDINGS_RST_SUN20I_D1_CCU_H_
#define _DT_BINDINGS_RST_SUN20I_D1_CCU_H_
#define RST_MBUS 0
#define RST_BUS_DE 1
#define RST_BUS_DI 2
#define RST_BUS_G2D 3
#define RST_BUS_CE 4
#define RST_BUS_VE 5
#define RST_BUS_DMA 6
#define RST_BUS_MSGBOX0 7
#define RST_BUS_MSGBOX1 8
#define RST_BUS_MSGBOX2 9
#define RST_BUS_SPINLOCK 10
#define RST_BUS_HSTIMER 11
#define RST_BUS_DBG 12
#define RST_BUS_PWM 13
#define RST_BUS_DRAM 14
#define RST_BUS_MMC0 15
#define RST_BUS_MMC1 16
#define RST_BUS_MMC2 17
#define RST_BUS_UART0 18
#define RST_BUS_UART1 19
#define RST_BUS_UART2 20
#define RST_BUS_UART3 21
#define RST_BUS_UART4 22
#define RST_BUS_UART5 23
#define RST_BUS_I2C0 24
#define RST_BUS_I2C1 25
#define RST_BUS_I2C2 26
#define RST_BUS_I2C3 27
#define RST_BUS_SPI0 28
#define RST_BUS_SPI1 29
#define RST_BUS_EMAC 30
#define RST_BUS_IR_TX 31
#define RST_BUS_GPADC 32
#define RST_BUS_THS 33
#define RST_BUS_I2S0 34
#define RST_BUS_I2S1 35
#define RST_BUS_I2S2 36
#define RST_BUS_SPDIF 37
#define RST_BUS_DMIC 38
#define RST_BUS_AUDIO 39
#define RST_USB_PHY0 40
#define RST_USB_PHY1 41
#define RST_BUS_OHCI0 42
#define RST_BUS_OHCI1 43
#define RST_BUS_EHCI0 44
#define RST_BUS_EHCI1 45
#define RST_BUS_OTG 46
#define RST_BUS_LRADC 47
#define RST_BUS_DPSS_TOP 48
#define RST_BUS_HDMI_SUB 49
#define RST_BUS_HDMI_MAIN 50
#define RST_BUS_MIPI_DSI 51
#define RST_BUS_TCON_LCD0 52
#define RST_BUS_TCON_TV 53
#define RST_BUS_LVDS0 54
#define RST_BUS_TVE 55
#define RST_BUS_TVE_TOP 56
#define RST_BUS_TVD 57
#define RST_BUS_TVD_TOP 58
#define RST_BUS_LEDC 59
#define RST_BUS_CSI 60
#define RST_BUS_TPADC 61
#define RST_DSP 62
#define RST_BUS_DSP_CFG 63
#define RST_BUS_DSP_DBG 64
#define RST_BUS_RISCV_CFG 65
#endif /* _DT_BINDINGS_RST_SUN20I_D1_CCU_H_ */
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