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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-07 17:32:43 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-07 17:32:43 +0000 |
commit | 6bf0a5cb5034a7e684dcc3500e841785237ce2dd (patch) | |
tree | a68f146d7fa01f0134297619fbe7e33db084e0aa /js/src/jit/riscv64/Architecture-riscv64.cpp | |
parent | Initial commit. (diff) | |
download | thunderbird-6bf0a5cb5034a7e684dcc3500e841785237ce2dd.tar.xz thunderbird-6bf0a5cb5034a7e684dcc3500e841785237ce2dd.zip |
Adding upstream version 1:115.7.0.upstream/1%115.7.0upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to '')
-rw-r--r-- | js/src/jit/riscv64/Architecture-riscv64.cpp | 100 |
1 files changed, 100 insertions, 0 deletions
diff --git a/js/src/jit/riscv64/Architecture-riscv64.cpp b/js/src/jit/riscv64/Architecture-riscv64.cpp new file mode 100644 index 0000000000..ea4a364b92 --- /dev/null +++ b/js/src/jit/riscv64/Architecture-riscv64.cpp @@ -0,0 +1,100 @@ +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- + * vim: set ts=8 sts=2 et sw=2 tw=80: + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v. 2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ + +#include "jit/riscv64/Architecture-riscv64.h" + +#include "jit/FlushICache.h" // js::jit::FlushICache +#include "jit/RegisterSets.h" +#include "jit/Simulator.h" +namespace js { +namespace jit { +Registers::Code Registers::FromName(const char* name) { + for (size_t i = 0; i < Total; i++) { + if (strcmp(GetName(i), name) == 0) { + return Code(i); + } + } + + return Invalid; +} + +FloatRegisters::Code FloatRegisters::FromName(const char* name) { + for (size_t i = 0; i < Total; i++) { + if (strcmp(GetName(i), name) == 0) { + return Code(i); + } + } + + return Invalid; +} + +FloatRegisterSet FloatRegister::ReduceSetForPush(const FloatRegisterSet& s) { +#ifdef ENABLE_WASM_SIMD +# error "Needs more careful logic if SIMD is enabled" +#endif + + LiveFloatRegisterSet mod; + for (FloatRegisterIterator iter(s); iter.more(); ++iter) { + if ((*iter).isSingle()) { + // Even for single size registers save complete double register. + mod.addUnchecked((*iter).doubleOverlay()); + } else { + mod.addUnchecked(*iter); + } + } + return mod.set(); +} + +FloatRegister FloatRegister::singleOverlay() const { + MOZ_ASSERT(!isInvalid()); + if (kind_ == Codes::Double) { + return FloatRegister(encoding_, Codes::Single); + } + return *this; +} + +FloatRegister FloatRegister::doubleOverlay() const { + MOZ_ASSERT(!isInvalid()); + if (kind_ != Codes::Double) { + return FloatRegister(encoding_, Codes::Double); + } + return *this; +} + +uint32_t FloatRegister::GetPushSizeInBytes( + const TypedRegisterSet<FloatRegister>& s) { +#ifdef ENABLE_WASM_SIMD +# error "Needs more careful logic if SIMD is enabled" +#endif + + return s.size() * sizeof(double); +} +void FlushICache(void* code, size_t size) { +#if defined(JS_SIMULATOR) + js::jit::SimulatorProcess::FlushICache(code, size); + +#elif defined(__linux__) +# if defined(__GNUC__) + intptr_t end = reinterpret_cast<intptr_t>(code) + size; + __builtin___clear_cache(reinterpret_cast<char*>(code), + reinterpret_cast<char*>(end)); + +# else + _flush_cache(reinterpret_cast<char*>(code), size, BCACHE); +# endif +#else +# error "Unsupported platform" +#endif +} + +bool CPUFlagsHaveBeenComputed() { + // TODO Add CPU flags support + // Flags were computed above. + return true; +} + +} // namespace jit +} // namespace js |