summaryrefslogtreecommitdiffstats
path: root/js/src/jit/mips32/Assembler-mips32.cpp
blob: 8073b8e4ecdad3a83a624bb43cca70783aef21e0 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
 * vim: set ts=8 sts=2 et sw=2 tw=80:
 * This Source Code Form is subject to the terms of the Mozilla Public
 * License, v. 2.0. If a copy of the MPL was not distributed with this
 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */

#include "jit/mips32/Assembler-mips32.h"

#include "mozilla/DebugOnly.h"
#include "mozilla/Maybe.h"

#include "jit/AutoWritableJitCode.h"

using mozilla::DebugOnly;

using namespace js;
using namespace js::jit;

ABIArgGenerator::ABIArgGenerator()
    : usedArgSlots_(0),
      firstArgFloatSize_(0),
      useGPRForFloats_(false),
      current_() {}

ABIArg ABIArgGenerator::next(MIRType type) {
  Register destReg;
  switch (type) {
    case MIRType::Int32:
    case MIRType::Pointer:
    case MIRType::RefOrNull:
    case MIRType::StackResults:
      if (GetIntArgReg(usedArgSlots_, &destReg)) {
        current_ = ABIArg(destReg);
      } else {
        current_ = ABIArg(usedArgSlots_ * sizeof(intptr_t));
      }
      usedArgSlots_++;
      break;
    case MIRType::Int64:
      if (!usedArgSlots_) {
        current_ = ABIArg(a0, a1);
        usedArgSlots_ = 2;
      } else if (usedArgSlots_ <= 2) {
        current_ = ABIArg(a2, a3);
        usedArgSlots_ = 4;
      } else {
        if (usedArgSlots_ < NumIntArgRegs) {
          usedArgSlots_ = NumIntArgRegs;
        }
        usedArgSlots_ += usedArgSlots_ % 2;
        current_ = ABIArg(usedArgSlots_ * sizeof(intptr_t));
        usedArgSlots_ += 2;
      }
      break;
    case MIRType::Float32:
      if (!usedArgSlots_) {
        current_ = ABIArg(f12.asSingle());
        firstArgFloatSize_ = 1;
      } else if (usedArgSlots_ == firstArgFloatSize_) {
        current_ = ABIArg(f14.asSingle());
      } else if (useGPRForFloats_ && GetIntArgReg(usedArgSlots_, &destReg)) {
        current_ = ABIArg(destReg);
      } else {
        if (usedArgSlots_ < NumIntArgRegs) {
          usedArgSlots_ = NumIntArgRegs;
        }
        current_ = ABIArg(usedArgSlots_ * sizeof(intptr_t));
      }
      usedArgSlots_++;
      break;
    case MIRType::Double:
      if (!usedArgSlots_) {
        current_ = ABIArg(f12);
        usedArgSlots_ = 2;
        firstArgFloatSize_ = 2;
      } else if (usedArgSlots_ == firstArgFloatSize_) {
        current_ = ABIArg(f14);
        usedArgSlots_ = 4;
      } else if (useGPRForFloats_ && usedArgSlots_ <= 2) {
        current_ = ABIArg(a2, a3);
        usedArgSlots_ = 4;
      } else {
        if (usedArgSlots_ < NumIntArgRegs) {
          usedArgSlots_ = NumIntArgRegs;
        }
        usedArgSlots_ += usedArgSlots_ % 2;
        current_ = ABIArg(usedArgSlots_ * sizeof(intptr_t));
        usedArgSlots_ += 2;
      }
      break;
    default:
      MOZ_CRASH("Unexpected argument type");
  }
  return current_;
}

uint32_t js::jit::RT(FloatRegister r) {
  MOZ_ASSERT(r.id() < FloatRegisters::RegisterIdLimit);
  return r.id() << RTShift;
}

uint32_t js::jit::RD(FloatRegister r) {
  MOZ_ASSERT(r.id() < FloatRegisters::RegisterIdLimit);
  return r.id() << RDShift;
}

uint32_t js::jit::RZ(FloatRegister r) {
  MOZ_ASSERT(r.id() < FloatRegisters::RegisterIdLimit);
  return r.id() << RZShift;
}

uint32_t js::jit::SA(FloatRegister r) {
  MOZ_ASSERT(r.id() < FloatRegisters::RegisterIdLimit);
  return r.id() << SAShift;
}

void Assembler::executableCopy(uint8_t* buffer) {
  MOZ_ASSERT(isFinished);
  m_buffer.executableCopy(buffer);
}

uintptr_t Assembler::GetPointer(uint8_t* instPtr) {
  Instruction* inst = (Instruction*)instPtr;
  return Assembler::ExtractLuiOriValue(inst, inst->next());
}

static JitCode* CodeFromJump(Instruction* jump) {
  uint8_t* target = (uint8_t*)Assembler::ExtractLuiOriValue(jump, jump->next());
  return JitCode::FromExecutable(target);
}

void Assembler::TraceJumpRelocations(JSTracer* trc, JitCode* code,
                                     CompactBufferReader& reader) {
  while (reader.more()) {
    JitCode* child =
        CodeFromJump((Instruction*)(code->raw() + reader.readUnsigned()));
    TraceManuallyBarrieredEdge(trc, &child, "rel32");
  }
}

static void TraceOneDataRelocation(JSTracer* trc,
                                   mozilla::Maybe<AutoWritableJitCode>& awjc,
                                   JitCode* code, Instruction* inst) {
  void* ptr = (void*)Assembler::ExtractLuiOriValue(inst, inst->next());
  void* prior = ptr;

  // No barrier needed since these are constants.
  TraceManuallyBarrieredGenericPointerEdge(
      trc, reinterpret_cast<gc::Cell**>(&ptr), "jit-masm-ptr");
  if (ptr != prior) {
    if (awjc.isNothing()) {
      awjc.emplace(code);
    }
    AssemblerMIPSShared::UpdateLuiOriValue(inst, inst->next(), uint32_t(ptr));
  }
}

/* static */
void Assembler::TraceDataRelocations(JSTracer* trc, JitCode* code,
                                     CompactBufferReader& reader) {
  mozilla::Maybe<AutoWritableJitCode> awjc;
  while (reader.more()) {
    size_t offset = reader.readUnsigned();
    Instruction* inst = (Instruction*)(code->raw() + offset);
    TraceOneDataRelocation(trc, awjc, code, inst);
  }
}

Assembler::Condition Assembler::UnsignedCondition(Condition cond) {
  switch (cond) {
    case Zero:
    case NonZero:
      return cond;
    case LessThan:
    case Below:
      return Below;
    case LessThanOrEqual:
    case BelowOrEqual:
      return BelowOrEqual;
    case GreaterThan:
    case Above:
      return Above;
    case AboveOrEqual:
    case GreaterThanOrEqual:
      return AboveOrEqual;
    default:
      MOZ_CRASH("unexpected condition");
  }
}

Assembler::Condition Assembler::ConditionWithoutEqual(Condition cond) {
  switch (cond) {
    case LessThan:
    case LessThanOrEqual:
      return LessThan;
    case Below:
    case BelowOrEqual:
      return Below;
    case GreaterThan:
    case GreaterThanOrEqual:
      return GreaterThan;
    case Above:
    case AboveOrEqual:
      return Above;
    default:
      MOZ_CRASH("unexpected condition");
  }
}

void Assembler::Bind(uint8_t* rawCode, const CodeLabel& label) {
  if (label.patchAt().bound()) {
    auto mode = label.linkMode();
    intptr_t offset = label.patchAt().offset();
    intptr_t target = label.target().offset();

    if (mode == CodeLabel::RawPointer) {
      *reinterpret_cast<const void**>(rawCode + offset) = rawCode + target;
    } else {
      MOZ_ASSERT(mode == CodeLabel::MoveImmediate ||
                 mode == CodeLabel::JumpImmediate);
      Instruction* inst = (Instruction*)(rawCode + offset);
      AssemblerMIPSShared::UpdateLuiOriValue(inst, inst->next(),
                                             (uint32_t)(rawCode + target));
    }
  }
}

void Assembler::bind(InstImm* inst, uintptr_t branch, uintptr_t target) {
  int32_t offset = target - branch;
  InstImm inst_bgezal = InstImm(op_regimm, zero, rt_bgezal, BOffImm16(0));
  InstImm inst_beq = InstImm(op_beq, zero, zero, BOffImm16(0));

  // If encoded offset is 4, then the jump must be short
  if (BOffImm16(inst[0]).decode() == 4) {
    MOZ_ASSERT(BOffImm16::IsInRange(offset));
    inst[0].setBOffImm16(BOffImm16(offset));
    inst[1].makeNop();
    return;
  }

  // Generate the long jump for calls because return address has to be the
  // address after the reserved block.
  if (inst[0].encode() == inst_bgezal.encode()) {
    addLongJump(BufferOffset(branch), BufferOffset(target));
    Assembler::WriteLuiOriInstructions(inst, &inst[1], ScratchRegister,
                                       LabelBase::INVALID_OFFSET);
    inst[2] = InstReg(op_special, ScratchRegister, zero, ra, ff_jalr).encode();
    // There is 1 nop after this.
    return;
  }

  if (BOffImm16::IsInRange(offset)) {
    bool conditional = (inst[0].encode() != inst_bgezal.encode() &&
                        inst[0].encode() != inst_beq.encode());

    inst[0].setBOffImm16(BOffImm16(offset));
    inst[1].makeNop();

    // Skip the trailing nops in conditional branches.
    if (conditional) {
      inst[2] = InstImm(op_regimm, zero, rt_bgez, BOffImm16(3 * sizeof(void*)))
                    .encode();
      // There are 2 nops after this
    }
    return;
  }

  if (inst[0].encode() == inst_beq.encode()) {
    // Handle long unconditional jump.
    addLongJump(BufferOffset(branch), BufferOffset(target));
    Assembler::WriteLuiOriInstructions(inst, &inst[1], ScratchRegister,
                                       LabelBase::INVALID_OFFSET);
    inst[2] = InstReg(op_special, ScratchRegister, zero, zero, ff_jr).encode();
    // There is 1 nop after this.
  } else {
    // Handle long conditional jump.
    inst[0] = invertBranch(inst[0], BOffImm16(5 * sizeof(void*)));
    // No need for a "nop" here because we can clobber scratch.
    addLongJump(BufferOffset(branch + sizeof(void*)), BufferOffset(target));
    Assembler::WriteLuiOriInstructions(&inst[1], &inst[2], ScratchRegister,
                                       LabelBase::INVALID_OFFSET);
    inst[3] = InstReg(op_special, ScratchRegister, zero, zero, ff_jr).encode();
    // There is 1 nop after this.
  }
}

void Assembler::processCodeLabels(uint8_t* rawCode) {
  for (const CodeLabel& label : codeLabels_) {
    Bind(rawCode, label);
  }
}

uint32_t Assembler::PatchWrite_NearCallSize() { return 4 * sizeof(uint32_t); }

void Assembler::PatchWrite_NearCall(CodeLocationLabel start,
                                    CodeLocationLabel toCall) {
  Instruction* inst = (Instruction*)start.raw();
  uint8_t* dest = toCall.raw();

  // Overwrite whatever instruction used to be here with a call.
  // Always use long jump for two reasons:
  // - Jump has to be the same size because of PatchWrite_NearCallSize.
  // - Return address has to be at the end of replaced block.
  // Short jump wouldn't be more efficient.
  Assembler::WriteLuiOriInstructions(inst, &inst[1], ScratchRegister,
                                     (uint32_t)dest);
  inst[2] = InstReg(op_special, ScratchRegister, zero, ra, ff_jalr);
  inst[3] = InstNOP();
}

uint32_t Assembler::ExtractLuiOriValue(Instruction* inst0, Instruction* inst1) {
  InstImm* i0 = (InstImm*)inst0;
  InstImm* i1 = (InstImm*)inst1;
  MOZ_ASSERT(i0->extractOpcode() == ((uint32_t)op_lui >> OpcodeShift));
  MOZ_ASSERT(i1->extractOpcode() == ((uint32_t)op_ori >> OpcodeShift));

  uint32_t value = i0->extractImm16Value() << 16;
  value = value | i1->extractImm16Value();
  return value;
}

void Assembler::WriteLuiOriInstructions(Instruction* inst0, Instruction* inst1,
                                        Register reg, uint32_t value) {
  *inst0 = InstImm(op_lui, zero, reg, Imm16::Upper(Imm32(value)));
  *inst1 = InstImm(op_ori, reg, reg, Imm16::Lower(Imm32(value)));
}

void Assembler::PatchDataWithValueCheck(CodeLocationLabel label,
                                        ImmPtr newValue, ImmPtr expectedValue) {
  PatchDataWithValueCheck(label, PatchedImmPtr(newValue.value),
                          PatchedImmPtr(expectedValue.value));
}

void Assembler::PatchDataWithValueCheck(CodeLocationLabel label,
                                        PatchedImmPtr newValue,
                                        PatchedImmPtr expectedValue) {
  Instruction* inst = (Instruction*)label.raw();

  // Extract old Value
  DebugOnly<uint32_t> value = Assembler::ExtractLuiOriValue(&inst[0], &inst[1]);
  MOZ_ASSERT(value == uint32_t(expectedValue.value));

  // Replace with new value
  AssemblerMIPSShared::UpdateLuiOriValue(inst, inst->next(),
                                         uint32_t(newValue.value));
}

uint32_t Assembler::ExtractInstructionImmediate(uint8_t* code) {
  InstImm* inst = (InstImm*)code;
  return Assembler::ExtractLuiOriValue(inst, inst->next());
}

void Assembler::ToggleCall(CodeLocationLabel inst_, bool enabled) {
  Instruction* inst = (Instruction*)inst_.raw();
  InstImm* i0 = (InstImm*)inst;
  InstImm* i1 = (InstImm*)i0->next();
  Instruction* i2 = (Instruction*)i1->next();

  MOZ_ASSERT(i0->extractOpcode() == ((uint32_t)op_lui >> OpcodeShift));
  MOZ_ASSERT(i1->extractOpcode() == ((uint32_t)op_ori >> OpcodeShift));

  if (enabled) {
    InstReg jalr = InstReg(op_special, ScratchRegister, zero, ra, ff_jalr);
    *i2 = jalr;
  } else {
    InstNOP nop;
    *i2 = nop;
  }
}