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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-07 14:30:35 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-07 14:30:35 +0000
commit378c18e5f024ac5a8aef4cb40d7c9aa9633d144c (patch)
tree44dfb6ca500d32cabd450649b322a42e70a30683 /tests/expected/lscpu/lscpu-armv7
parentInitial commit. (diff)
downloadutil-linux-378c18e5f024ac5a8aef4cb40d7c9aa9633d144c.tar.xz
util-linux-378c18e5f024ac5a8aef4cb40d7c9aa9633d144c.zip
Adding upstream version 2.38.1.upstream/2.38.1upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'tests/expected/lscpu/lscpu-armv7')
-rw-r--r--tests/expected/lscpu/lscpu-armv728
1 files changed, 28 insertions, 0 deletions
diff --git a/tests/expected/lscpu/lscpu-armv7 b/tests/expected/lscpu/lscpu-armv7
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--- /dev/null
+++ b/tests/expected/lscpu/lscpu-armv7
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+CPU(s): 2
+On-line CPU(s) list: 0,1
+Vendor ID: ARM
+Model name: Cortex-A15
+Model: 4
+Thread(s) per core: 1
+Core(s) per socket: 2
+Socket(s): 1
+Stepping: r0p4
+CPU(s) scaling MHz: 12%
+CPU max MHz: 1700.0000
+CPU min MHz: 200.0000
+BogoMIPS: 1694.10
+Flags: swp half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpv4 idiva idivt
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting usually from zero.
+# CPU,Core,Socket,Node
+0,0,0,
+1,1,0,
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting usually from zero.
+# CPU,Core,Socket,Node
+0,0,0,
+1,1,0,