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-rw-r--r--tests/expected/lscpu/lscpu-sparc6433
1 files changed, 33 insertions, 0 deletions
diff --git a/tests/expected/lscpu/lscpu-sparc64 b/tests/expected/lscpu/lscpu-sparc64
new file mode 100644
index 0000000..5a3460f
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-sparc64
@@ -0,0 +1,33 @@
+CPU op-mode(s): 32-bit, 64-bit
+CPU(s): 6
+On-line CPU(s) list: 6,7,10,11,14,15
+Model name: TI UltraSparc II (BlackBird)
+Thread(s) per core: 1
+Core(s) per socket: 1
+Socket(s): 6
+Flags: sun4u
+L1d cache: 96 KiB (6 instances)
+L1i cache: 96 KiB (6 instances)
+L2 cache: 6 MiB (6 instances)
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting usually from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2
+6,0,0,,,0,0,0
+7,1,1,,,1,1,1
+10,2,2,,,2,2,2
+11,3,3,,,3,3,3
+14,4,4,,,4,4,4
+15,5,5,,,5,5,5
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting usually from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2
+6,0,-,,,0,0,0
+7,0,-,,,1,1,1
+10,0,-,,,2,2,2
+11,0,-,,,3,3,3
+14,0,-,,,4,4,4
+15,0,-,,,5,5,5