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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-02-19 10:37:58 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-02-19 10:37:58 +0000 |
commit | 8c21fd00c98582703f1d0f701cd5bbfca2644b40 (patch) | |
tree | c5b54e8b4b235232b057a9c534d9a16d2208463d /doc/man/nvme_register_offsets.2 | |
parent | Adding upstream version 1.7.1. (diff) | |
download | libnvme-8c21fd00c98582703f1d0f701cd5bbfca2644b40.tar.xz libnvme-8c21fd00c98582703f1d0f701cd5bbfca2644b40.zip |
Adding upstream version 1.8.upstream/1.8
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to '')
-rw-r--r-- | doc/man/nvme_register_offsets.2 | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/doc/man/nvme_register_offsets.2 b/doc/man/nvme_register_offsets.2 index c0f7ef3..692443b 100644 --- a/doc/man/nvme_register_offsets.2 +++ b/doc/man/nvme_register_offsets.2 @@ -1,4 +1,4 @@ -.TH "libnvme" 9 "enum nvme_register_offsets" "December 2023" "API Manual" LINUX +.TH "libnvme" 9 "enum nvme_register_offsets" "February 2024" "API Manual" LINUX .SH NAME enum nvme_register_offsets \- controller registers for all transports. This is the layout of BAR0/1 for PCIe, and properties for fabrics. .SH SYNOPSIS @@ -72,6 +72,18 @@ enum nvme_register_offsets { , .br .br +.BI " NVME_REG_CMBEBS" +, +.br +.br +.BI " NVME_REG_CMBSWTP" +, +.br +.br +.BI " NVME_REG_NSSD" +, +.br +.br .BI " NVME_REG_CRTO" , .br @@ -138,6 +150,12 @@ Boot Partition Memory Buffer Location Controller Memory Buffer Memory Space Control .IP "NVME_REG_CMBSTS" 12 Controller Memory Buffer Status +.IP "NVME_REG_CMBEBS" 12 +Controller Memory Buffer Elasticity Buffer Size +.IP "NVME_REG_CMBSWTP" 12 +Controller Memory Buffer Sustained Write Throughput +.IP "NVME_REG_NSSD" 12 +NVM Subsystem Shutdown .IP "NVME_REG_CRTO" 12 Controller Ready Timeouts .IP "NVME_REG_PMRCAP" 12 |