From fb32fdeba1f428a3f6c30c8951e82f2a2eec23a8 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Thu, 12 Aug 2021 14:01:09 +0200 Subject: Merging upstream version 1.15. Signed-off-by: Daniel Baumann --- linux/nvme.h | 133 ++++++++++++++++++++++++++++++++++++++++------------- linux/nvme_ioctl.h | 16 ------- 2 files changed, 100 insertions(+), 49 deletions(-) (limited to 'linux') diff --git a/linux/nvme.h b/linux/nvme.h index 4ad09ee..589108b 100644 --- a/linux/nvme.h +++ b/linux/nvme.h @@ -147,6 +147,8 @@ enum { NVME_IOCS_ZONED = 0x02, }; +#define NVME_NUM_IOCS_COMBINATIONS 512 + #define NVME_AQ_DEPTH 32 #define NVME_NR_AEN_COMMANDS 1 #define NVME_AQ_BLK_MQ_DEPTH (NVME_AQ_DEPTH - NVME_NR_AEN_COMMANDS) @@ -288,7 +290,10 @@ struct nvme_id_ctrl { __le16 crdt1; __le16 crdt2; __le16 crdt3; - __u8 rsvd134[122]; + __u8 rsvd134[119]; + __u8 nvmsr; + __u8 vwci; + __u8 mec; __le16 oacs; __u8 acl; __u8 aerl; @@ -323,7 +328,10 @@ struct nvme_id_ctrl { __le32 anagrpmax; __le32 nanagrpid; __le32 pels; - __u8 rsvd356[156]; + __le16 domainid; + __u8 rsvd358[10]; + __u8 megcap[16]; + __u8 rsvd384[128]; __u8 sqes; __u8 cqes; __le16 maxcmd; @@ -337,10 +345,12 @@ struct nvme_id_ctrl { __u8 icsvscc; __u8 nwpc; __le16 acwu; - __u8 rsvd534[2]; + __le16 ocfs; __le32 sgls; __le32 mnan; - __u8 rsvd544[224]; + __u8 maxdna[16]; + __le32 maxcna; + __u8 rsvd564[204]; char subnqn[256]; __u8 rsvd1024[768]; __le32 ioccsz; @@ -425,7 +435,7 @@ struct nvme_id_ns { }; struct nvme_id_iocs { - __le64 iocs[512]; + __le64 iocs[NVME_NUM_IOCS_COMBINATIONS]; }; enum { @@ -445,6 +455,7 @@ enum { NVME_ID_CNS_SCNDRY_CTRL_LIST = 0x15, NVME_ID_CNS_NS_GRANULARITY = 0x16, NVME_ID_CNS_UUID_LIST = 0x17, + NVME_ID_CNS_DOMAIN_LIST = 0x18, NVME_ID_CNS_CSI_NS_PRESENT_LIST = 0x1a, NVME_ID_CNS_CSI_NS_PRESENT = 0x1b, NVME_ID_CNS_CSI = 0x1c, @@ -672,17 +683,17 @@ struct nvme_fw_slot_info_log { }; struct nvme_lba_status_desc { - __u64 dslba; - __u32 nlb; - __u8 rsvd_12; - __u8 status; - __u8 rsvd_15_14[2]; + __le64 dslba; + __le32 nlb; + __u8 rsvd_12; + __u8 status; + __u8 rsvd_15_14[2]; }; struct nvme_lba_status { - __u32 nlsd; - __u8 cmpc; - __u8 rsvd_7_5[3]; + __le32 nlsd; + __u8 cmpc; + __u8 rsvd_7_5[3]; struct nvme_lba_status_desc descs[0]; }; @@ -964,8 +975,8 @@ struct nvme_lba_range_type { __u8 type; __u8 attributes; __u8 rsvd2[14]; - __u64 slba; - __u64 nlb; + __le64 slba; + __le64 nlb; __u8 guid[16]; __u8 rsvd48[16]; }; @@ -1160,6 +1171,7 @@ enum { NVME_RW_PRINFO_PRCHK_GUARD = 1 << 12, NVME_RW_PRINFO_PRACT = 1 << 13, NVME_RW_DTYPE_STREAMS = 1 << 4, + NVME_RW_STORAGE_TAG_CHECK = 1 << 8, }; enum { @@ -1191,6 +1203,31 @@ struct nvme_feat_auto_pst { __le64 entries[32]; }; +struct nvme_mi_host_metadata_element_desc { + __u8 type; /* Element Type */ + __u8 rev; /* Element Revision */ + __u16 len; /* Element Length */ + __u8 val[0]; /* Element Value (UTF-8) */ +}; + +struct nvme_mi_host_metadata { + __u8 ndesc; + __u8 rsvd1; + struct nvme_mi_host_metadata_element_desc descs[0]; +}; + +enum { + NVME_MI_CTRL_METADATA_OS_CTRL_NAME = 0x01, + NVME_MI_CTRL_METADATA_OS_DRIVER_NAME = 0x02, + NVME_MI_CTRL_METADATA_OS_DRIVER_VER = 0x03, + NVME_MI_CTRL_METADATA_PRE_BOOT_CTRL_NAME = 0x04, + NVME_MI_CTRL_METADATA_PRE_BOOT_DRIVER_NAME = 0x05, + NVME_MI_CTRL_METADATA_PRE_BOOT_DRIVER_VER = 0x06, + + NVME_MI_NS_METADATA_OS_NS_NAME = 0x01, + NVME_MI_NS_METADATA_PRE_BOOT_NS_NAME = 0x02, +}; + enum { NVME_HOST_MEM_ENABLE = (1 << 0), NVME_HOST_MEM_RETURN = (1 << 1), @@ -1220,6 +1257,7 @@ enum nvme_admin_opcode { nvme_admin_virtual_mgmt = 0x1c, nvme_admin_nvme_mi_send = 0x1d, nvme_admin_nvme_mi_recv = 0x1e, + nvme_admin_capacity_mgmt = 0x20, nvme_admin_dbbuf = 0x7C, nvme_admin_format_nvm = 0x80, nvme_admin_security_send = 0x81, @@ -1284,13 +1322,17 @@ enum nvme_feat { NVME_LBA_STATUS_INFO = 0x15, NVME_FEAT_HOST_BEHAVIOR = 0x16, NVME_FEAT_SANITIZE = 0x17, - NVME_FEAT_ENDURANCE = 0x18, + NVME_FEAT_ENDURANCE = 0x18, NVME_FEAT_IOCS_PROFILE = 0x19, NVME_FEAT_SW_PROGRESS = 0x80, NVME_FEAT_HOST_ID = 0x81, NVME_FEAT_RESV_MASK = 0x82, NVME_FEAT_RESV_PERSIST = 0x83, NVME_FEAT_WRITE_PROTECT = 0x84, + + NVME_MI_FEAT_CTRL_METADATA = 0x7E, + NVME_MI_FEAT_NS_METADATA = 0x7F, + } __attribute__ ((__packed__)); enum { @@ -1329,7 +1371,7 @@ enum { struct nvme_host_mem_buf_desc { __le64 addr; __le32 size; - __u32 rsvd; + __u8 rsvd[4]; }; /* Sanitize Log Page */ @@ -1392,7 +1434,7 @@ struct nvmf_disc_rsp_page_entry { __u8 prtype; __u8 cms; __u8 resv3[5]; - __u16 pkey; + __le16 pkey; __u8 resv10[246]; } rdma; struct tcp { @@ -1456,21 +1498,21 @@ struct nvme_error_log_page { struct nvme_firmware_log_page { __u8 afi; __u8 resv[7]; - __u64 frs[7]; + __u8 frs[7][8]; __u8 resv2[448]; }; struct nvme_host_mem_buffer { - __u32 hsize; - __u32 hmdlal; - __u32 hmdlau; - __u32 hmdlec; + __le32 hsize; + __le32 hmdlal; + __le32 hmdlau; + __le32 hmdlec; __u8 rsvd16[4080]; }; struct nvme_auto_pst { - __u32 data; - __u32 rsvd32; + __le32 data; + __u8 rsvd[4]; }; struct nvme_timestamp { @@ -1498,10 +1540,10 @@ struct nvme_primary_ctrl_caps { __u8 rsvd48[16]; __le32 vifrt; /* VI Resources Flexible Total */ __le32 virfa; /* VI Resources Flexible Assigned */ - __u16 virfap; /* VI Resources Flexible Allocated to Primary */ - __u16 viprt; /* VI Resources Private Total */ - __u16 vifrsm; /* VI Resources Flexible Secondary Maximum */ - __u16 vigran; /* VI Flexible Resource Preferred Granularity */ + __le16 virfap; /* VI Resources Flexible Allocated to Primary */ + __le16 viprt; /* VI Resources Private Total */ + __le16 vifrsm; /* VI Resources Flexible Secondary Maximum */ + __le16 vigran; /* VI Flexible Resource Preferred Granularity */ __u8 rsvd80[4016]; }; @@ -1523,10 +1565,10 @@ struct nvme_secondary_controllers_list { }; struct nvme_bar_cap { - __u16 mqes; + __le16 mqes; __u8 ams_cqr; __u8 to; - __u16 bps_css_nssrs_dstrd; + __le16 bps_css_nssrs_dstrd; __u8 mpsmax_mpsmin; __u8 rsvd_cmbs_pmrs; }; @@ -1595,10 +1637,14 @@ enum { NVME_SC_PREEMPT_ABORT = 0x1B, NVME_SC_SANITIZE_FAILED = 0x1C, NVME_SC_SANITIZE_IN_PROGRESS = 0x1D, + NVME_SC_SGL_DATA_BLK_GRAN_INVALID= 0x1e, + NVME_SC_CMD_NOT_SUP_QUEUE_IN_CMB = 0x1f, NVME_SC_NS_WRITE_PROTECTED = 0x20, NVME_SC_CMD_INTERRUPTED = 0x21, NVME_SC_TRANSIENT_TRANSPORT = 0x22, + NVME_SC_PROHIBITED_BY_CMD_AND_FEAT = 0x23, + NVME_SC_ADMIN_CMD_MEDIA_NOT_READY = 0x24, NVME_SC_LBA_RANGE = 0x80, NVME_SC_CAP_EXCEEDED = 0x81, @@ -1646,6 +1692,9 @@ enum { NVME_SC_PMR_SAN_PROHIBITED = 0x123, NVME_SC_ANA_INVALID_GROUP_ID= 0x124, NVME_SC_ANA_ATTACH_FAIL = 0x125, + NVME_SC_INSUFFICIENT_CAP = 0x126, + NVME_SC_NS_ATTACHMENT_LIMIT_EXCEEDED = 0x127, + NVME_SC_PROHIBIT_CMD_EXEC_NOT_SUPPORTED = 0x128, /* * Command Set Specific - Namespace Types commands: @@ -1654,6 +1703,7 @@ enum { NVME_SC_IOCS_NOT_ENABLED = 0x12A, NVME_SC_IOCS_COMBINATION_REJECTED = 0x12B, NVME_SC_INVALID_IOCS = 0x12C, + NVME_SC_ID_UNAVAILABLE = 0x12D, /* * I/O Command Set Specific - NVM commands: @@ -1698,6 +1748,7 @@ enum { NVME_SC_COMPARE_FAILED = 0x285, NVME_SC_ACCESS_DENIED = 0x286, NVME_SC_UNWRITTEN_BLOCK = 0x287, + NVME_SC_STORAGE_TAG_CHECK = 0x288, /* * Path-related Errors: @@ -1770,8 +1821,8 @@ struct nvme_id_ctrl_nvm { __u8 wzsl; __u8 wusl; __u8 dmrl; - __u32 dmrsl; - __u64 dmsl; + __le32 dmrsl; + __le64 dmsl; __u8 rsvd16[4080]; }; @@ -1874,4 +1925,20 @@ enum nvme_zns_report_options { NVME_ZNS_ZRAS_REPORT_READ_ONLY = 0x6, NVME_ZNS_ZRAS_REPORT_OFFLINE = 0x7, }; + +struct nvme_id_domain_attr_entry { + __le16 dom_id; + __u8 rsvd2[14]; + __u8 dom_cap[16]; + __u8 unalloc_dom_cap[16]; + __u8 max_egrp_dom_cap[16]; + __u8 rsvd64[64]; +}; + +struct nvme_id_domain_list { + __u8 num_entries; + __u8 rsvd1[127]; + struct nvme_id_domain_attr_entry domain_attr[]; +}; + #endif /* _LINUX_NVME_H */ diff --git a/linux/nvme_ioctl.h b/linux/nvme_ioctl.h index d569414..b4fd4e2 100644 --- a/linux/nvme_ioctl.h +++ b/linux/nvme_ioctl.h @@ -18,21 +18,6 @@ #include #include -struct nvme_user_io { - __u8 opcode; - __u8 flags; - __u16 control; - __u16 nblocks; - __u16 rsvd; - __u64 metadata; - __u64 addr; - __u64 slba; - __u32 dsmgmt; - __u32 reftag; - __u16 apptag; - __u16 appmask; -}; - struct nvme_passthru_cmd { __u8 opcode; __u8 flags; @@ -80,7 +65,6 @@ struct nvme_passthru_cmd64 { #define NVME_IOCTL_ID _IO('N', 0x40) #define NVME_IOCTL_ADMIN_CMD _IOWR('N', 0x41, struct nvme_admin_cmd) -#define NVME_IOCTL_SUBMIT_IO _IOW('N', 0x42, struct nvme_user_io) #define NVME_IOCTL_IO_CMD _IOWR('N', 0x43, struct nvme_passthru_cmd) #define NVME_IOCTL_RESET _IO('N', 0x44) #define NVME_IOCTL_SUBSYS_RESET _IO('N', 0x45) -- cgit v1.2.3