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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-05-08 04:15:09 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-05-08 04:15:09 +0000
commitd78786f17f03109c3e9c7043b1b63f947afb0ee0 (patch)
tree58709afdbb58c9a8b795c712d281a6b5710d36cc /arch/arm/mach-mmp/time.c
parentAdding debian version 4.19.269-1. (diff)
downloadlinux-d78786f17f03109c3e9c7043b1b63f947afb0ee0.tar.xz
linux-d78786f17f03109c3e9c7043b1b63f947afb0ee0.zip
Merging upstream version 4.19.282.
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'arch/arm/mach-mmp/time.c')
-rw-r--r--arch/arm/mach-mmp/time.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 96ad1db0b..edd280e75 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -52,18 +52,21 @@
static void __iomem *mmp_timer_base = TIMERS_VIRT_BASE;
/*
- * FIXME: the timer needs some delay to stablize the counter capture
+ * Read the timer through the CVWR register. Delay is required after requesting
+ * a read. The CR register cannot be directly read due to metastability issues
+ * documented in the PXA168 software manual.
*/
static inline uint32_t timer_read(void)
{
- int delay = 100;
+ uint32_t val;
+ int delay = 3;
__raw_writel(1, mmp_timer_base + TMR_CVWR(1));
while (delay--)
- cpu_relax();
+ val = __raw_readl(mmp_timer_base + TMR_CVWR(1));
- return __raw_readl(mmp_timer_base + TMR_CVWR(1));
+ return val;
}
static u64 notrace mmp_read_sched_clock(void)