diff options
Diffstat (limited to 'debian/patches/bugfix/arm')
3 files changed, 145 insertions, 0 deletions
diff --git a/debian/patches/bugfix/arm/ARM-dts-sun8i-h3-add-sy8106a-to-orange-pi-plus.patch b/debian/patches/bugfix/arm/ARM-dts-sun8i-h3-add-sy8106a-to-orange-pi-plus.patch new file mode 100644 index 000000000..1329c9390 --- /dev/null +++ b/debian/patches/bugfix/arm/ARM-dts-sun8i-h3-add-sy8106a-to-orange-pi-plus.patch @@ -0,0 +1,77 @@ +From: Jorik Jonker <jorik@kippendief.biz> +Date: Sat, 29 Sep 2018 15:18:30 +0200 +Subject: ARM: dts: sun8i-h3: add sy8106a to orange pi plus +Origin: https://git.kernel.org/linus/e98d72d98a25890308941080d3a17b4c77e3f460 + +The Orange Pi Plus board lacks voltage scaling capabilities in its +current form. This results in random freezes during boot when cpufreq is +enabled, probably due to wrong voltages. + +This patch (more or less copy/paste from 06139c) does the following +things on this board: +- enable r_i2c +- add sy8106a to the r_i2c bus +- have the sy8106a regulate VDD of cpu + +Since the Orange Pi Plus has the same PMU setup as the Orange Pi PC, I +simply took min/max/fixed/ramp from the latter DTS. In that file the +origin of the values are described by the following comment: + + "The datasheet uses 1.1V as the minimum value of VDD-CPUX, + however both the Armbian DVFS table and the official one + have operating points with voltage under 1.1V, and both + DVFS table are known to work properly at the lowest + operating point. + Use 1.0V as the minimum voltage instead." + +I have tested this on patch two Orange Pi Plus boards, by running a +kernel with this patch and do intermettent runs of cpuburn while +monitoring voltage, frequency and temperature. The board runs stable +across its operatiing points while showing a reasonable (< 40C) +temperature. My Orange Pi PC, when put to the same test, yields similar +stable results. + +Signed-off-by: Jorik Jonker <jorik@kippendief.biz> +Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> +--- + arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 20 ++++++++++++++++++++ + 1 file changed, 20 insertions(+) + +Index: linux/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +=================================================================== +--- linux.orig/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts ++++ linux/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +@@ -74,6 +74,10 @@ + }; + }; + ++&cpu0 { ++ cpu-supply = <®_vdd_cpux>; ++}; ++ + &ehci3 { + status = "okay"; + }; +@@ -119,6 +123,22 @@ + }; + }; + ++&r_i2c { ++ status = "okay"; ++ ++ reg_vdd_cpux: regulator@65 { ++ compatible = "silergy,sy8106a"; ++ reg = <0x65>; ++ regulator-name = "vdd-cpux"; ++ silergy,fixed-microvolt = <1200000>; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1400000>; ++ regulator-ramp-delay = <200>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++}; ++ + &usbphy { + usb3_vbus-supply = <®_usb3_vbus>; + }; diff --git a/debian/patches/bugfix/arm/arm-dts-kirkwood-fix-sata-pinmux-ing-for-ts419.patch b/debian/patches/bugfix/arm/arm-dts-kirkwood-fix-sata-pinmux-ing-for-ts419.patch new file mode 100644 index 000000000..a8fc875a3 --- /dev/null +++ b/debian/patches/bugfix/arm/arm-dts-kirkwood-fix-sata-pinmux-ing-for-ts419.patch @@ -0,0 +1,37 @@ +From: Ben Hutchings <ben@decadent.org.uk> +Date: Fri, 17 Feb 2017 01:30:30 +0000 +Subject: ARM: dts: kirkwood: Fix SATA pinmux-ing for TS419 +Forwarded: https://www.spinics.net/lists/arm-kernel/msg563610.html +Bug-Debian: https://bugs.debian.org/855017 + +The old board code for the TS419 assigns MPP pins 15 and 16 as SATA +activity signals (and none as SATA presence signals). Currently the +device tree assigns the SoC's default pinmux groups for SATA, which +conflict with the second Ethernet port. + +Reported-by: gmbh@gazeta.pl +Tested-by: gmbh@gazeta.pl +References: https://bugs.debian.org/855017 +Cc: stable@vger.kernel.org # 3.15+ +Fixes: 934b524b3f49 ("ARM: Kirkwood: Add DT description of QNAP 419") +Signed-off-by: Ben Hutchings <ben@decadent.org.uk> +--- + arch/arm/boot/dts/kirkwood-ts419.dtsi | 8 ++++++++ + 1 file changed, 8 insertions(+) + +Index: linux/arch/arm/boot/dts/kirkwood-ts419.dtsi +=================================================================== +--- linux.orig/arch/arm/boot/dts/kirkwood-ts419.dtsi ++++ linux/arch/arm/boot/dts/kirkwood-ts419.dtsi +@@ -69,3 +69,11 @@ + phy-handle = <ðphy1>; + }; + }; ++ ++&pmx_sata0 { ++ marvell,pins = "mpp15"; ++}; ++ ++&pmx_sata1 { ++ marvell,pins = "mpp16"; ++}; diff --git a/debian/patches/bugfix/arm/arm-mm-export-__sync_icache_dcache-for-xen-privcmd.patch b/debian/patches/bugfix/arm/arm-mm-export-__sync_icache_dcache-for-xen-privcmd.patch new file mode 100644 index 000000000..2e8771b55 --- /dev/null +++ b/debian/patches/bugfix/arm/arm-mm-export-__sync_icache_dcache-for-xen-privcmd.patch @@ -0,0 +1,31 @@ +From: Ben Hutchings <ben@decadent.org.uk> +Date: Wed, 11 Jul 2018 23:40:55 +0100 +Subject: ARM: mm: Export __sync_icache_dcache() for xen-privcmd +Forwarded: https://marc.info/?l=linux-arm-kernel&m=153134944429241 + +The xen-privcmd driver, which can be modular, calls set_pte_at() +which in turn may call __sync_icache_dcache(). + +The call to __sync_icache_dcache() may be optimised out because it is +conditional on !pte_special(), and xen-privcmd calls pte_mkspecial(). +However, in a non-LPAE configuration there is no "special" bit and the +call is really unconditional. + +Fixes: 3ad0876554ca ("xen/privcmd: add IOCTL_PRIVCMD_MMAP_RESOURCE") +Signed-off-by: Ben Hutchings <ben@decadent.org.uk> +--- + arch/arm/mm/flush.c | 1 + + 1 file changed, 1 insertion(+) + +Index: linux/arch/arm/mm/flush.c +=================================================================== +--- linux.orig/arch/arm/mm/flush.c ++++ linux/arch/arm/mm/flush.c +@@ -295,6 +295,7 @@ void __sync_icache_dcache(pte_t pteval) + if (pte_exec(pteval)) + __flush_icache_all(); + } ++EXPORT_SYMBOL_GPL(__sync_icache_dcache); + #endif + + /* |