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/*
* BSD LICENSE
*
* Copyright (c) 2016 Broadcom. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Broadcom Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <dt-bindings/clock/bcm-ns2.h>
osc: oscillator {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <25000000>;
};
lcpll_ddr: lcpll_ddr@6501d058 {
#clock-cells = <1>;
compatible = "brcm,ns2-lcpll-ddr";
reg = <0x6501d058 0x20>,
<0x6501c020 0x4>,
<0x6501d04c 0x4>;
clocks = <&osc>;
clock-output-names = "lcpll_ddr", "pcie_sata_usb",
"ddr", "ddr_ch2_unused",
"ddr_ch3_unused", "ddr_ch4_unused",
"ddr_ch5_unused";
};
lcpll_ports: lcpll_ports@6501d078 {
#clock-cells = <1>;
compatible = "brcm,ns2-lcpll-ports";
reg = <0x6501d078 0x20>,
<0x6501c020 0x4>,
<0x6501d054 0x4>;
clocks = <&osc>;
clock-output-names = "lcpll_ports", "wan", "rgmii",
"ports_ch2_unused",
"ports_ch3_unused",
"ports_ch4_unused",
"ports_ch5_unused";
};
genpll_scr: genpll_scr@6501d098 {
#clock-cells = <1>;
compatible = "brcm,ns2-genpll-scr";
reg = <0x6501d098 0x32>,
<0x6501c020 0x4>,
<0x6501d044 0x4>;
clocks = <&osc>;
clock-output-names = "genpll_scr", "scr", "fs",
"audio_ref", "scr_ch3_unused",
"scr_ch4_unused", "scr_ch5_unused";
};
iprocmed: iprocmed {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
clock-div = <2>;
clock-mult = <1>;
};
iprocslow: iprocslow {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
clock-div = <4>;
clock-mult = <1>;
};
genpll_sw: genpll_sw@6501d0c4 {
#clock-cells = <1>;
compatible = "brcm,ns2-genpll-sw";
reg = <0x6501d0c4 0x32>,
<0x6501c020 0x4>,
<0x6501d044 0x4>;
clocks = <&osc>;
clock-output-names = "genpll_sw", "rpe", "250", "nic",
"chimp", "port", "sdio";
};
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