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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-05-06 02:42:50 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-05-06 02:42:50 +0000 |
commit | 8cb83eee5a58b1fad74c34094ce3afb9e430b5a4 (patch) | |
tree | a9b2e7baeca1be40eb734371e3c8b11b02294497 /tests/expected/lscpu/lscpu-s390-lpar-drawer | |
parent | Initial commit. (diff) | |
download | util-linux-upstream.tar.xz util-linux-upstream.zip |
Adding upstream version 2.33.1.upstream/2.33.1upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'tests/expected/lscpu/lscpu-s390-lpar-drawer')
-rw-r--r-- | tests/expected/lscpu/lscpu-s390-lpar-drawer | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/tests/expected/lscpu/lscpu-s390-lpar-drawer b/tests/expected/lscpu/lscpu-s390-lpar-drawer new file mode 100644 index 0000000..d223009 --- /dev/null +++ b/tests/expected/lscpu/lscpu-s390-lpar-drawer @@ -0,0 +1,52 @@ +CPU op-mode(s): 32-bit, 64-bit +CPU(s): 8 +On-line CPU(s) list: 0-7 +Thread(s) per core: 1 +Core(s) per socket: 8 +Socket(s) per book: 3 +Book(s) per drawer: 2 +Drawer(s): 4 +NUMA node(s): 1 +Vendor ID: IBM/S390 +Machine type: 2964 +CPU dynamic MHz: 5000 +CPU static MHz: 5000 +BogoMIPS: 20325.00 +Hypervisor: PR/SM +Hypervisor vendor: IBM +Virtualization type: full +Dispatching mode: horizontal +L1d cache: 128K +L1i cache: 96K +L2d cache: 2048K +L2i cache: 2048K +L3 cache: 65536K +L4 cache: 491520K +NUMA node0 CPU(s): 0-140 +Flags: esan3 zarch stfle msa ldisp eimm dfp edat etf3eh highgprs te vx sie + +# The following is the parsable format, which can be fed to other +# programs. Each different item in every column has an unique ID +# starting from zero. +# CPU,Core,Socket,Node,,L1d,L1i,L2d,L2i +0,0,0,0,,0,0,0,0 +1,1,0,0,,1,1,1,1 +2,2,1,0,,2,2,2,2 +3,3,1,0,,3,3,3,3 +4,4,1,0,,4,4,4,4 +5,5,1,0,,5,5,5,5 +6,6,1,0,,6,6,6,6 +7,7,1,0,,7,7,7,7 + +# The following is the parsable format, which can be fed to other +# programs. Each different item in every column has an unique ID +# starting from zero. +# CPU,Core,Socket,Node,,L1d,L1i,L2d,L2i +0,0,2,0,,0,0,0,0 +1,1,2,0,,1,1,1,1 +2,2,3,0,,2,2,2,2 +3,3,3,0,,3,3,3,3 +4,4,3,0,,4,4,4,4 +5,5,3,0,,5,5,5,5 +6,6,3,0,,6,6,6,6 +7,7,3,0,,7,7,7,7 |