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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-05-05 18:37:14 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-05-05 18:37:14 +0000
commitea648e70a989cca190cd7403fe892fd2dcc290b4 (patch)
treee2b6b1c647da68b0d4d66082835e256eb30970e8 /lib/isc/powerpc
parentInitial commit. (diff)
downloadbind9-ea648e70a989cca190cd7403fe892fd2dcc290b4.tar.xz
bind9-ea648e70a989cca190cd7403fe892fd2dcc290b4.zip
Adding upstream version 1:9.11.5.P4+dfsg.upstream/1%9.11.5.P4+dfsgupstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'lib/isc/powerpc')
-rw-r--r--lib/isc/powerpc/Makefile.in17
-rw-r--r--lib/isc/powerpc/include/Makefile.in17
-rw-r--r--lib/isc/powerpc/include/isc/Makefile.in34
-rw-r--r--lib/isc/powerpc/include/isc/atomic.h193
4 files changed, 261 insertions, 0 deletions
diff --git a/lib/isc/powerpc/Makefile.in b/lib/isc/powerpc/Makefile.in
new file mode 100644
index 0000000..419cf9f
--- /dev/null
+++ b/lib/isc/powerpc/Makefile.in
@@ -0,0 +1,17 @@
+# Copyright (C) Internet Systems Consortium, Inc. ("ISC")
+#
+# This Source Code Form is subject to the terms of the Mozilla Public
+# License, v. 2.0. If a copy of the MPL was not distributed with this
+# file, You can obtain one at http://mozilla.org/MPL/2.0/.
+#
+# See the COPYRIGHT file distributed with this work for additional
+# information regarding copyright ownership.
+
+srcdir = @srcdir@
+VPATH = @srcdir@
+top_srcdir = @top_srcdir@
+
+SUBDIRS = include
+TARGETS =
+
+@BIND9_MAKE_RULES@
diff --git a/lib/isc/powerpc/include/Makefile.in b/lib/isc/powerpc/include/Makefile.in
new file mode 100644
index 0000000..d33c0fc
--- /dev/null
+++ b/lib/isc/powerpc/include/Makefile.in
@@ -0,0 +1,17 @@
+# Copyright (C) Internet Systems Consortium, Inc. ("ISC")
+#
+# This Source Code Form is subject to the terms of the Mozilla Public
+# License, v. 2.0. If a copy of the MPL was not distributed with this
+# file, You can obtain one at http://mozilla.org/MPL/2.0/.
+#
+# See the COPYRIGHT file distributed with this work for additional
+# information regarding copyright ownership.
+
+srcdir = @srcdir@
+VPATH = @srcdir@
+top_srcdir = @top_srcdir@
+
+SUBDIRS = isc
+TARGETS =
+
+@BIND9_MAKE_RULES@
diff --git a/lib/isc/powerpc/include/isc/Makefile.in b/lib/isc/powerpc/include/isc/Makefile.in
new file mode 100644
index 0000000..97b6b41
--- /dev/null
+++ b/lib/isc/powerpc/include/isc/Makefile.in
@@ -0,0 +1,34 @@
+# Copyright (C) Internet Systems Consortium, Inc. ("ISC")
+#
+# This Source Code Form is subject to the terms of the Mozilla Public
+# License, v. 2.0. If a copy of the MPL was not distributed with this
+# file, You can obtain one at http://mozilla.org/MPL/2.0/.
+#
+# See the COPYRIGHT file distributed with this work for additional
+# information regarding copyright ownership.
+
+srcdir = @srcdir@
+VPATH = @srcdir@
+top_srcdir = @top_srcdir@
+
+VERSION=@BIND9_VERSION@
+
+HEADERS = atomic.h
+
+SUBDIRS =
+TARGETS =
+
+@BIND9_MAKE_RULES@
+
+installdirs:
+ $(SHELL) ${top_srcdir}/mkinstalldirs ${DESTDIR}${includedir}/isc
+
+install:: installdirs
+ for i in ${HEADERS}; do \
+ ${INSTALL_DATA} $(srcdir)/$$i ${DESTDIR}${includedir}/isc || exit 1; \
+ done
+
+uninstall::
+ for i in ${HEADERS}; do \
+ rm -f ${DESTDIR}${includedir}/isc/$$i || exit 1; \
+ done
diff --git a/lib/isc/powerpc/include/isc/atomic.h b/lib/isc/powerpc/include/isc/atomic.h
new file mode 100644
index 0000000..9899934
--- /dev/null
+++ b/lib/isc/powerpc/include/isc/atomic.h
@@ -0,0 +1,193 @@
+/*
+ * Copyright (C) Internet Systems Consortium, Inc. ("ISC")
+ *
+ * This Source Code Form is subject to the terms of the Mozilla Public
+ * License, v. 2.0. If a copy of the MPL was not distributed with this
+ * file, You can obtain one at http://mozilla.org/MPL/2.0/.
+ *
+ * See the COPYRIGHT file distributed with this work for additional
+ * information regarding copyright ownership.
+ */
+
+
+#ifndef ISC_ATOMIC_H
+#define ISC_ATOMIC_H 1
+
+#include <inttypes.h>
+
+#include <isc/platform.h>
+#include <isc/types.h>
+
+/*!\file
+ * static inline int32_t
+ * isc_atomic_xadd(int32_t *p, int32_t val);
+ *
+ * This routine atomically increments the value stored in 'p' by 'val', and
+ * returns the previous value.
+ *
+ * static inline void
+ * isc_atomic_store(void *p, int32_t val);
+ *
+ * This routine atomically stores the value 'val' in 'p'.
+ *
+ * static inline int32_t
+ * isc_atomic_cmpxchg(int32_t *p, int32_t cmpval, int32_t val);
+ *
+ * This routine atomically replaces the value in 'p' with 'val', if the
+ * original value is equal to 'cmpval'. The original value is returned in any
+ * case.
+ */
+
+#if defined(_AIX)
+
+#include <sys/atomic_op.h>
+
+#define isc_atomic_store(p, v) _clear_lock(p, v)
+
+#ifdef __GNUC__
+static inline int32_t
+#else
+static int32_t
+#endif
+isc_atomic_xadd(int32_t *p, int32_t val) {
+ int ret;
+
+#ifdef __GNUC__
+ asm("ics");
+#else
+ __isync();
+#endif
+
+ ret = fetch_and_add((atomic_p)p, (int)val);
+
+#ifdef __GNUC__
+ asm("ics");
+#else
+ __isync();
+#endif
+
+ return (ret);
+}
+
+#ifdef __GNUC__
+static inline int
+#else
+static int
+#endif
+isc_atomic_cmpxchg(atomic_p p, int old, int replacement) {
+ int orig = old;
+
+#ifdef __GNUC__
+ asm("ics");
+#else
+ __isync();
+#endif
+ if (compare_and_swap(p, &orig, replacement))
+ orig = old;
+
+#ifdef __GNUC__
+ asm("ics");
+#else
+ __isync();
+#endif
+
+ return (orig);
+}
+
+#elif defined(ISC_PLATFORM_USEGCCASM) || defined(ISC_PLATFORM_USEMACASM)
+static inline int32_t
+isc_atomic_xadd(int32_t *p, int32_t val) {
+ int32_t orig;
+
+ __asm__ volatile (
+#ifdef ISC_PLATFORM_USEMACASM
+ "1:"
+ "lwarx r6, 0, %1\n"
+ "mr %0, r6\n"
+ "add r6, r6, %2\n"
+ "stwcx. r6, 0, %1\n"
+ "bne- 1b\n"
+ "sync"
+#else
+ "1:"
+ "lwarx 6, 0, %1\n"
+ "mr %0, 6\n"
+ "add 6, 6, %2\n"
+ "stwcx. 6, 0, %1\n"
+ "bne- 1b\n"
+ "sync"
+#endif
+ : "=&r"(orig)
+ : "r"(p), "r"(val)
+ : "r6", "memory"
+ );
+
+ return (orig);
+}
+
+static inline void
+isc_atomic_store(void *p, int32_t val) {
+ __asm__ volatile (
+#ifdef ISC_PLATFORM_USEMACASM
+ "1:"
+ "lwarx r6, 0, %0\n"
+ "lwz r6, %1\n"
+ "stwcx. r6, 0, %0\n"
+ "bne- 1b\n"
+ "sync"
+#else
+ "1:"
+ "lwarx 6, 0, %0\n"
+ "lwz 6, %1\n"
+ "stwcx. 6, 0, %0\n"
+ "bne- 1b\n"
+ "sync"
+#endif
+ :
+ : "r"(p), "m"(val)
+ : "r6", "memory"
+ );
+}
+
+static inline int32_t
+isc_atomic_cmpxchg(int32_t *p, int32_t cmpval, int32_t val) {
+ int32_t orig;
+
+ __asm__ volatile (
+#ifdef ISC_PLATFORM_USEMACASM
+ "1:"
+ "lwarx r6, 0, %1\n"
+ "mr %0,r6\n"
+ "cmpw r6, %2\n"
+ "bne 2f\n"
+ "mr r6, %3\n"
+ "stwcx. r6, 0, %1\n"
+ "bne- 1b\n"
+ "2:\n"
+ "sync"
+#else
+ "1:"
+ "lwarx 6, 0, %1\n"
+ "mr %0,6\n"
+ "cmpw 6, %2\n"
+ "bne 2f\n"
+ "mr 6, %3\n"
+ "stwcx. 6, 0, %1\n"
+ "bne- 1b\n"
+ "2:\n"
+ "sync"
+#endif
+ : "=&r" (orig)
+ : "r"(p), "r"(cmpval), "r"(val)
+ : "r6", "memory"
+ );
+
+ return (orig);
+}
+
+#else
+
+#error "unsupported compiler. disable atomic ops by --disable-atomic"
+
+#endif
+#endif /* ISC_ATOMIC_H */