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-rw-r--r--drivers/clocksource/Kconfig636
1 files changed, 636 insertions, 0 deletions
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
new file mode 100644
index 000000000..06504384c
--- /dev/null
+++ b/drivers/clocksource/Kconfig
@@ -0,0 +1,636 @@
+menu "Clock Source drivers"
+ depends on GENERIC_CLOCKEVENTS
+
+config TIMER_OF
+ bool
+ select TIMER_PROBE
+
+config TIMER_ACPI
+ bool
+ select TIMER_PROBE
+
+config TIMER_PROBE
+ bool
+
+config CLKSRC_I8253
+ bool
+
+config CLKEVT_I8253
+ bool
+
+config I8253_LOCK
+ bool
+
+config OMAP_DM_TIMER
+ bool
+ select TIMER_OF
+
+config CLKBLD_I8253
+ def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK
+
+config CLKSRC_MMIO
+ bool
+
+config BCM2835_TIMER
+ bool "BCM2835 timer driver" if COMPILE_TEST
+ select CLKSRC_MMIO
+ help
+ Enables the support for the BCM2835 timer driver.
+
+config BCM_KONA_TIMER
+ bool "BCM mobile timer driver" if COMPILE_TEST
+ select CLKSRC_MMIO
+ help
+ Enables the support for the BCM Kona mobile timer driver.
+
+config DIGICOLOR_TIMER
+ bool "Digicolor timer driver" if COMPILE_TEST
+ select CLKSRC_MMIO
+ depends on HAS_IOMEM
+ help
+ Enables the support for the digicolor timer driver.
+
+config DW_APB_TIMER
+ bool "DW APB timer driver" if COMPILE_TEST
+ help
+ Enables the support for the dw_apb timer.
+
+config DW_APB_TIMER_OF
+ bool
+ select DW_APB_TIMER
+ select TIMER_OF
+
+config FTTMR010_TIMER
+ bool "Faraday Technology timer driver" if COMPILE_TEST
+ depends on HAS_IOMEM
+ select CLKSRC_MMIO
+ select TIMER_OF
+ select MFD_SYSCON
+ help
+ Enables support for the Faraday Technology timer block
+ FTTMR010.
+
+config ROCKCHIP_TIMER
+ bool "Rockchip timer driver" if COMPILE_TEST
+ depends on ARM || ARM64
+ select TIMER_OF
+ select CLKSRC_MMIO
+ help
+ Enables the support for the rockchip timer driver.
+
+config ARMADA_370_XP_TIMER
+ bool "Armada 370 and XP timer driver" if COMPILE_TEST
+ depends on ARM
+ select TIMER_OF
+ select CLKSRC_MMIO
+ help
+ Enables the support for the Armada 370 and XP timer driver.
+
+config MESON6_TIMER
+ bool "Meson6 timer driver" if COMPILE_TEST
+ select CLKSRC_MMIO
+ help
+ Enables the support for the Meson6 timer driver.
+
+config ORION_TIMER
+ bool "Orion timer driver" if COMPILE_TEST
+ depends on ARM
+ select TIMER_OF
+ select CLKSRC_MMIO
+ help
+ Enables the support for the Orion timer driver
+
+config OWL_TIMER
+ bool "Owl timer driver" if COMPILE_TEST
+ select CLKSRC_MMIO
+ help
+ Enables the support for the Actions Semi Owl timer driver.
+
+config SUN4I_TIMER
+ bool "Sun4i timer driver" if COMPILE_TEST
+ depends on HAS_IOMEM
+ select CLKSRC_MMIO
+ select TIMER_OF
+ help
+ Enables support for the Sun4i timer.
+
+config SUN5I_HSTIMER
+ bool "Sun5i timer driver" if COMPILE_TEST
+ select CLKSRC_MMIO
+ depends on COMMON_CLK
+ help
+ Enables support the Sun5i timer.
+
+config TEGRA_TIMER
+ bool "Tegra timer driver" if COMPILE_TEST
+ select CLKSRC_MMIO
+ depends on ARM
+ help
+ Enables support for the Tegra driver.
+
+config VT8500_TIMER
+ bool "VT8500 timer driver" if COMPILE_TEST
+ depends on HAS_IOMEM
+ help
+ Enables support for the VT8500 driver.
+
+config NPCM7XX_TIMER
+ bool "NPCM7xx timer driver" if COMPILE_TEST
+ depends on HAS_IOMEM
+ select TIMER_OF
+ select CLKSRC_MMIO
+ help
+ Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture,
+ While TIMER0 serves as clockevent and TIMER1 serves as clocksource.
+
+config CADENCE_TTC_TIMER
+ bool "Cadence TTC timer driver" if COMPILE_TEST
+ depends on COMMON_CLK
+ help
+ Enables support for the cadence ttc driver.
+
+config ASM9260_TIMER
+ bool "ASM9260 timer driver" if COMPILE_TEST
+ select CLKSRC_MMIO
+ select TIMER_OF
+ help
+ Enables support for the ASM9260 timer.
+
+config CLKSRC_NOMADIK_MTU
+ bool "Nomakdik clocksource driver" if COMPILE_TEST
+ depends on ARM
+ select CLKSRC_MMIO
+ help
+ Support for Multi Timer Unit. MTU provides access
+ to multiple interrupt generating programmable
+ 32-bit free running decrementing counters.
+
+config CLKSRC_NOMADIK_MTU_SCHED_CLOCK
+ bool
+ depends on CLKSRC_NOMADIK_MTU
+ help
+ Use the Multi Timer Unit as the sched_clock.
+
+config CLKSRC_DBX500_PRCMU
+ bool "Clocksource PRCMU Timer" if COMPILE_TEST
+ depends on HAS_IOMEM
+ help
+ Use the always on PRCMU Timer as clocksource
+
+config CLPS711X_TIMER
+ bool "Cirrus logic timer driver" if COMPILE_TEST
+ select CLKSRC_MMIO
+ help
+ Enables support for the Cirrus Logic PS711 timer.
+
+config ATLAS7_TIMER
+ bool "Atlas7 timer driver" if COMPILE_TEST
+ select CLKSRC_MMIO
+ help
+ Enables support for the Atlas7 timer.
+
+config MXS_TIMER
+ bool "Mxs timer driver" if COMPILE_TEST
+ select CLKSRC_MMIO
+ select STMP_DEVICE
+ help
+ Enables support for the Mxs timer.
+
+config PRIMA2_TIMER
+ bool "Prima2 timer driver" if COMPILE_TEST
+ select CLKSRC_MMIO
+ help
+ Enables support for the Prima2 timer.
+
+config U300_TIMER
+ bool "U300 timer driver" if COMPILE_TEST
+ depends on ARM
+ select CLKSRC_MMIO
+ help
+ Enables support for the U300 timer.
+
+config NSPIRE_TIMER
+ bool "NSpire timer driver" if COMPILE_TEST
+ select CLKSRC_MMIO
+ help
+ Enables support for the Nspire timer.
+
+config KEYSTONE_TIMER
+ bool "Keystone timer driver" if COMPILE_TEST
+ depends on ARM || ARM64
+ select CLKSRC_MMIO
+ help
+ Enables support for the Keystone timer.
+
+config INTEGRATOR_AP_TIMER
+ bool "Integrator-ap timer driver" if COMPILE_TEST
+ select CLKSRC_MMIO
+ help
+ Enables support for the Integrator-ap timer.
+
+config CLKSRC_DBX500_PRCMU_SCHED_CLOCK
+ bool "Clocksource PRCMU Timer sched_clock"
+ depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK)
+ default y
+ help
+ Use the always on PRCMU Timer as sched_clock
+
+config CLKSRC_EFM32
+ bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32
+ depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST)
+ select CLKSRC_MMIO
+ default ARCH_EFM32
+ help
+ Support to use the timers of EFM32 SoCs as clock source and clock
+ event device.
+
+config CLKSRC_LPC32XX
+ bool "Clocksource for LPC32XX" if COMPILE_TEST
+ depends on HAS_IOMEM
+ depends on ARM
+ select CLKSRC_MMIO
+ select TIMER_OF
+ help
+ Support for the LPC32XX clocksource.
+
+config CLKSRC_PISTACHIO
+ bool "Clocksource for Pistachio SoC" if COMPILE_TEST
+ depends on HAS_IOMEM
+ select TIMER_OF
+ help
+ Enables the clocksource for the Pistachio SoC.
+
+config CLKSRC_TI_32K
+ bool "Texas Instruments 32.768 Hz Clocksource" if COMPILE_TEST
+ depends on GENERIC_SCHED_CLOCK
+ select TIMER_OF if OF
+ help
+ This option enables support for Texas Instruments 32.768 Hz clocksource
+ available on many OMAP-like platforms.
+
+config CLKSRC_NPS
+ bool "NPS400 clocksource driver" if COMPILE_TEST
+ depends on !PHYS_ADDR_T_64BIT
+ select CLKSRC_MMIO
+ select TIMER_OF if OF
+ help
+ NPS400 clocksource support.
+ Got 64 bit counter with update rate up to 1000MHz.
+ This counter is accessed via couple of 32 bit memory mapped registers.
+
+config CLKSRC_STM32
+ bool "Clocksource for STM32 SoCs" if !ARCH_STM32
+ depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST)
+ select CLKSRC_MMIO
+ select TIMER_OF
+
+config CLKSRC_MPS2
+ bool "Clocksource for MPS2 SoCs" if COMPILE_TEST
+ depends on GENERIC_SCHED_CLOCK
+ select CLKSRC_MMIO
+ select TIMER_OF
+
+config ARC_TIMERS
+ bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST
+ depends on GENERIC_SCHED_CLOCK
+ select TIMER_OF
+ help
+ These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores
+ (ARC700 as well as ARC HS38).
+ TIMER0 serves as clockevent while TIMER1 provides clocksource
+
+config ARC_TIMERS_64BIT
+ bool "Support for 64-bit counters in ARC HS38 cores" if COMPILE_TEST
+ depends on ARC_TIMERS
+ select TIMER_OF
+ help
+ This enables 2 different 64-bit timers: RTC (for UP) and GFRC (for SMP)
+ RTC is implemented inside the core, while GFRC sits outside the core in
+ ARConnect IP block. Driver automatically picks one of them for clocksource
+ as appropriate.
+
+config ARM_ARCH_TIMER
+ bool
+ select TIMER_OF if OF
+ select TIMER_ACPI if ACPI
+
+config ARM_ARCH_TIMER_EVTSTREAM
+ bool "Enable ARM architected timer event stream generation by default"
+ default y if ARM_ARCH_TIMER
+ depends on ARM_ARCH_TIMER
+ help
+ This option enables support by default for event stream generation
+ based on the ARM architected timer. It is used for waking up CPUs
+ executing the wfe instruction at a frequency represented as a
+ power-of-2 divisor of the clock rate. The behaviour can also be
+ overridden on the command line using the
+ clocksource.arm_arch_timer.evtstream parameter.
+ The main use of the event stream is wfe-based timeouts of userspace
+ locking implementations. It might also be useful for imposing timeout
+ on wfe to safeguard against any programming errors in case an expected
+ event is not generated.
+ This must be disabled for hardware validation purposes to detect any
+ hardware anomalies of missing events.
+
+config ARM_ARCH_TIMER_OOL_WORKAROUND
+ bool
+
+config FSL_ERRATUM_A008585
+ bool "Workaround for Freescale/NXP Erratum A-008585"
+ default y
+ depends on ARM_ARCH_TIMER && ARM64
+ select ARM_ARCH_TIMER_OOL_WORKAROUND
+ help
+ This option enables a workaround for Freescale/NXP Erratum
+ A-008585 ("ARM generic timer may contain an erroneous
+ value"). The workaround will only be active if the
+ fsl,erratum-a008585 property is found in the timer node.
+
+config HISILICON_ERRATUM_161010101
+ bool "Workaround for Hisilicon Erratum 161010101"
+ default y
+ select ARM_ARCH_TIMER_OOL_WORKAROUND
+ depends on ARM_ARCH_TIMER && ARM64
+ help
+ This option enables a workaround for Hisilicon Erratum
+ 161010101. The workaround will be active if the hisilicon,erratum-161010101
+ property is found in the timer node.
+
+config ARM64_ERRATUM_858921
+ bool "Workaround for Cortex-A73 erratum 858921"
+ default y
+ select ARM_ARCH_TIMER_OOL_WORKAROUND
+ depends on ARM_ARCH_TIMER && ARM64
+ help
+ This option enables a workaround applicable to Cortex-A73
+ (all versions), whose counter may return incorrect values.
+ The workaround will be dynamically enabled when an affected
+ core is detected.
+
+config SUN50I_ERRATUM_UNKNOWN1
+ bool "Workaround for Allwinner A64 erratum UNKNOWN1"
+ default y
+ depends on ARM_ARCH_TIMER && ARM64 && ARCH_SUNXI
+ select ARM_ARCH_TIMER_OOL_WORKAROUND
+ help
+ This option enables a workaround for instability in the timer on
+ the Allwinner A64 SoC. The workaround will only be active if the
+ allwinner,erratum-unknown1 property is found in the timer node.
+
+config ARM_GLOBAL_TIMER
+ bool "Support for the ARM global timer" if COMPILE_TEST
+ select TIMER_OF if OF
+ depends on ARM
+ help
+ This options enables support for the ARM global timer unit
+
+config ARM_TIMER_SP804
+ bool "Support for Dual Timer SP804 module"
+ depends on GENERIC_SCHED_CLOCK && CLKDEV_LOOKUP
+ select CLKSRC_MMIO
+ select TIMER_OF if OF
+
+config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
+ bool
+ depends on ARM_GLOBAL_TIMER
+ default y
+ help
+ Use ARM global timer clock source as sched_clock
+
+config ARMV7M_SYSTICK
+ bool "Support for the ARMv7M system time" if COMPILE_TEST
+ select TIMER_OF if OF
+ select CLKSRC_MMIO
+ help
+ This options enables support for the ARMv7M system timer unit
+
+config ATMEL_PIT
+ select TIMER_OF if OF
+ def_bool SOC_AT91SAM9 || SOC_SAMA5
+
+config ATMEL_ST
+ bool "Atmel ST timer support" if COMPILE_TEST
+ depends on HAS_IOMEM
+ select TIMER_OF
+ select MFD_SYSCON
+ help
+ Support for the Atmel ST timer.
+
+config CLKSRC_EXYNOS_MCT
+ bool "Exynos multi core timer driver" if COMPILE_TEST
+ depends on ARM || ARM64
+ help
+ Support for Multi Core Timer controller on Exynos SoCs.
+
+config CLKSRC_SAMSUNG_PWM
+ bool "PWM timer driver for Samsung S3C, S5P" if COMPILE_TEST
+ depends on HAS_IOMEM
+ help
+ This is a new clocksource driver for the PWM timer found in
+ Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver
+ for all devicetree enabled platforms. This driver will be
+ needed only on systems that do not have the Exynos MCT available.
+
+config FSL_FTM_TIMER
+ bool "Freescale FlexTimer Module driver" if COMPILE_TEST
+ depends on HAS_IOMEM
+ select CLKSRC_MMIO
+ help
+ Support for Freescale FlexTimer Module (FTM) timer.
+
+config VF_PIT_TIMER
+ bool
+ select CLKSRC_MMIO
+ help
+ Support for Period Interrupt Timer on Freescale Vybrid Family SoCs.
+
+config OXNAS_RPS_TIMER
+ bool "Oxford Semiconductor OXNAS RPS Timers driver" if COMPILE_TEST
+ select TIMER_OF
+ select CLKSRC_MMIO
+ help
+ This enables support for the Oxford Semiconductor OXNAS RPS timers.
+
+config SYS_SUPPORTS_SH_CMT
+ bool
+
+config MTK_TIMER
+ bool "Mediatek timer driver" if COMPILE_TEST
+ depends on HAS_IOMEM
+ select TIMER_OF
+ select CLKSRC_MMIO
+ help
+ Support for Mediatek timer driver.
+
+config SPRD_TIMER
+ bool "Spreadtrum timer driver" if EXPERT
+ depends on HAS_IOMEM
+ depends on (ARCH_SPRD || COMPILE_TEST)
+ default ARCH_SPRD
+ select TIMER_OF
+ help
+ Enables support for the Spreadtrum timer driver.
+
+config SYS_SUPPORTS_SH_MTU2
+ bool
+
+config SYS_SUPPORTS_SH_TMU
+ bool
+
+config SYS_SUPPORTS_EM_STI
+ bool
+
+config CLKSRC_JCORE_PIT
+ bool "J-Core PIT timer driver" if COMPILE_TEST
+ depends on OF
+ depends on HAS_IOMEM
+ select CLKSRC_MMIO
+ help
+ This enables build of clocksource and clockevent driver for
+ the integrated PIT in the J-Core synthesizable, open source SoC.
+
+config SH_TIMER_CMT
+ bool "Renesas CMT timer driver" if COMPILE_TEST
+ depends on HAS_IOMEM
+ default SYS_SUPPORTS_SH_CMT
+ help
+ This enables build of a clocksource and clockevent driver for
+ the Compare Match Timer (CMT) hardware available in 16/32/48-bit
+ variants on a wide range of Mobile and Automotive SoCs from Renesas.
+
+config SH_TIMER_MTU2
+ bool "Renesas MTU2 timer driver" if COMPILE_TEST
+ depends on HAS_IOMEM
+ default SYS_SUPPORTS_SH_MTU2
+ help
+ This enables build of a clockevent driver for the Multi-Function
+ Timer Pulse Unit 2 (MTU2) hardware available on SoCs from Renesas.
+ This hardware comes with 16 bit-timer registers.
+
+config RENESAS_OSTM
+ bool "Renesas OSTM timer driver" if COMPILE_TEST
+ select CLKSRC_MMIO
+ help
+ Enables the support for the Renesas OSTM.
+
+config SH_TIMER_TMU
+ bool "Renesas TMU timer driver" if COMPILE_TEST
+ depends on HAS_IOMEM
+ default SYS_SUPPORTS_SH_TMU
+ help
+ This enables build of a clocksource and clockevent driver for
+ the 32-bit Timer Unit (TMU) hardware available on a wide range
+ SoCs from Renesas.
+
+config EM_TIMER_STI
+ bool "Renesas STI timer driver" if COMPILE_TEST
+ depends on HAS_IOMEM
+ default SYS_SUPPORTS_EM_STI
+ help
+ This enables build of a clocksource and clockevent driver for
+ the 48-bit System Timer (STI) hardware available on a SoCs
+ such as EMEV2 from former NEC Electronics.
+
+config CLKSRC_QCOM
+ bool "Qualcomm MSM timer" if COMPILE_TEST
+ depends on ARM
+ select TIMER_OF
+ help
+ This enables the clocksource and the per CPU clockevent driver for the
+ Qualcomm SoCs.
+
+config CLKSRC_VERSATILE
+ bool "ARM Versatile (Express) reference platforms clock source" if COMPILE_TEST
+ depends on GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET
+ select TIMER_OF
+ default y if MFD_VEXPRESS_SYSREG
+ help
+ This option enables clock source based on free running
+ counter available in the "System Registers" block of
+ ARM Versatile, RealView and Versatile Express reference
+ platforms.
+
+config CLKSRC_MIPS_GIC
+ bool
+ depends on MIPS_GIC
+ select TIMER_OF
+
+config CLKSRC_TANGO_XTAL
+ bool "Clocksource for Tango SoC" if COMPILE_TEST
+ depends on ARM
+ select TIMER_OF
+ select CLKSRC_MMIO
+ help
+ This enables the clocksource for Tango SoC
+
+config CLKSRC_PXA
+ bool "Clocksource for PXA or SA-11x0 platform" if COMPILE_TEST
+ depends on HAS_IOMEM
+ select CLKSRC_MMIO
+ help
+ This enables OST0 support available on PXA and SA-11x0
+ platforms.
+
+config H8300_TMR8
+ bool "Clockevent timer for the H8300 platform" if COMPILE_TEST
+ depends on HAS_IOMEM
+ help
+ This enables the 8 bits timer for the H8300 platform.
+
+config H8300_TMR16
+ bool "Clockevent timer for the H83069 platform" if COMPILE_TEST
+ depends on HAS_IOMEM
+ help
+ This enables the 16 bits timer for the H8300 platform with the
+ H83069 cpu.
+
+config H8300_TPU
+ bool "Clocksource for the H8300 platform" if COMPILE_TEST
+ depends on HAS_IOMEM
+ help
+ This enables the clocksource for the H8300 platform with the
+ H8S2678 cpu.
+
+config CLKSRC_IMX_GPT
+ bool "Clocksource using i.MX GPT" if COMPILE_TEST
+ depends on ARM && CLKDEV_LOOKUP
+ select CLKSRC_MMIO
+
+config CLKSRC_IMX_TPM
+ bool "Clocksource using i.MX TPM" if COMPILE_TEST
+ depends on ARM && CLKDEV_LOOKUP
+ select CLKSRC_MMIO
+ help
+ Enable this option to use IMX Timer/PWM Module (TPM) timer as
+ clocksource.
+
+config CLKSRC_ST_LPC
+ bool "Low power clocksource found in the LPC" if COMPILE_TEST
+ select TIMER_OF if OF
+ depends on HAS_IOMEM
+ select CLKSRC_MMIO
+ help
+ Enable this option to use the Low Power controller timer
+ as clocksource.
+
+config ATCPIT100_TIMER
+ bool "ATCPIT100 timer driver"
+ depends on NDS32 || COMPILE_TEST
+ depends on HAS_IOMEM
+ select TIMER_OF
+ default NDS32
+ help
+ This option enables support for the Andestech ATCPIT100 timers.
+
+config RISCV_TIMER
+ bool "Timer for the RISC-V platform"
+ depends on RISCV
+ default y
+ select TIMER_PROBE
+ select TIMER_OF
+ help
+ This enables the per-hart timer built into all RISC-V systems, which
+ is accessed via both the SBI and the rdcycle instruction. This is
+ required for all RISC-V systems.
+
+endmenu