1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
|
/* $Id: HMSVMR0.h $ */
/** @file
* HM SVM (AMD-V) - Internal header file.
*/
/*
* Copyright (C) 2006-2019 Oracle Corporation
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* you can redistribute it and/or modify it under the terms of the GNU
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
*/
#ifndef VMM_INCLUDED_SRC_VMMR0_HMSVMR0_h
#define VMM_INCLUDED_SRC_VMMR0_HMSVMR0_h
#ifndef RT_WITHOUT_PRAGMA_ONCE
# pragma once
#endif
#include <VBox/cdefs.h>
#include <VBox/types.h>
#include <VBox/vmm/hm.h>
#include <VBox/vmm/hm_svm.h>
RT_C_DECLS_BEGIN
/** @defgroup grp_svm_int Internal
* @ingroup grp_svm
* @internal
* @{
*/
#ifdef IN_RING0
VMMR0DECL(int) SVMR0GlobalInit(void);
VMMR0DECL(void) SVMR0GlobalTerm(void);
VMMR0DECL(int) SVMR0Enter(PVMCPU pVCpu);
VMMR0DECL(void) SVMR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit);
VMMR0DECL(int) SVMR0EnableCpu(PHMPHYSCPU pHostCpu, PVM pVM, void *pvPageCpu, RTHCPHYS HCPhysCpuPage,
bool fEnabledBySystem, PCSUPHWVIRTMSRS pHwvirtMsrs);
VMMR0DECL(int) SVMR0DisableCpu(void *pvPageCpu, RTHCPHYS pPageCpuPhys);
VMMR0DECL(int) SVMR0InitVM(PVM pVM);
VMMR0DECL(int) SVMR0TermVM(PVM pVM);
VMMR0DECL(int) SVMR0SetupVM(PVM pVM);
VMMR0DECL(VBOXSTRICTRC) SVMR0RunGuestCode(PVMCPU pVCpu);
VMMR0DECL(int) SVMR0ExportHostState(PVMCPU pVCpu);
VMMR0DECL(int) SVMR0ImportStateOnDemand(PVMCPU pVCpu, uint64_t fWhat);
VMMR0DECL(int) SVMR0InvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt);
#if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS)
DECLASM(int) SVMR0VMSwitcherRun64(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu);
VMMR0DECL(int) SVMR0Execute64BitsHandler(PVMCPU pVCpu, HM64ON32OP enmOp, uint32_t cbParam, uint32_t *paParam);
#endif /* HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) */
/**
* Prepares for and executes VMRUN (32-bit guests).
*
* @returns VBox status code.
* @param pVMCBHostPhys Physical address of host VMCB.
* @param pVMCBPhys Physical address of the VMCB.
* @param pCtx Pointer to the guest CPU context.
* @param pVM The cross context VM structure. (Not used.)
* @param pVCpu The cross context virtual CPU structure. (Not used.)
*/
DECLASM(int) SVMR0VMRun(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu);
/**
* Prepares for and executes VMRUN (64-bit guests).
*
* @returns VBox status code.
* @param pVMCBHostPhys Physical address of host VMCB.
* @param pVMCBPhys Physical address of the VMCB.
* @param pCtx Pointer to the guest CPU context.
* @param pVM The cross context VM structure. (Not used.)
* @param pVCpu The cross context virtual CPU structure. (Not used.)
*/
DECLASM(int) SVMR0VMRun64(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu);
/**
* Executes INVLPGA.
*
* @param pPageGC Virtual page to invalidate.
* @param u32ASID Tagged TLB id.
*/
DECLASM(void) SVMR0InvlpgA(RTGCPTR pPageGC, uint32_t u32ASID);
#endif /* IN_RING0 */
/** @} */
RT_C_DECLS_END
#endif /* !VMM_INCLUDED_SRC_VMMR0_HMSVMR0_h */
|