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; $Id: bs3-cpu-weird-1-template.mac $
;; @file
; BS3Kit - bs3-cpu-weird-1 assembly template.
;
;
; Copyright (C) 2007-2019 Oracle Corporation
;
; This file is part of VirtualBox Open Source Edition (OSE), as
; available from http://www.virtualbox.org. This file is free software;
; you can redistribute it and/or modify it under the terms of the GNU
; General Public License (GPL) as published by the Free Software
; Foundation, in version 2 as it comes in the "COPYING" file of the
; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
;
; The contents of this file may alternatively be used under the terms
; of the Common Development and Distribution License Version 1.0
; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
; VirtualBox OSE distribution, in which case the provisions of the
; CDDL are applicable instead of those of the GPL.
;
; You may elect to license modified versions of this file under the
; terms and conditions of either the GPL or the CDDL or both.
;
;*********************************************************************************************************************************
;* Header Files *
;*********************************************************************************************************************************
%include "bs3kit-template-header.mac" ; setup environment
;*********************************************************************************************************************************
;* External Symbols *
;*********************************************************************************************************************************
TMPL_BEGIN_TEXT
;
; Test code snippets containing code which differs between 16-bit, 32-bit
; and 64-bit CPUs modes.
;
%ifdef BS3_INSTANTIATING_CMN
;
; Inhibited int 80h.
;
BS3_PROC_BEGIN_CMN bs3CpuWeird1_InhibitedInt80, BS3_PBC_NEAR
; Load SS from stack. This instruction causes fusing.
%if TMPL_BITS != 64
pop ss
%else
mov ss, [rsp]
%endif
; The ring transition instruction.
BS3_GLOBAL_NAME_EX BS3_CMN_NM(bs3CpuWeird1_InhibitedInt80_int80), , 0
int 80h
; We shouldn't get here!
.ud2_again:
ud2
jmp .ud2_again
BS3_PROC_END_CMN bs3CpuWeird1_InhibitedInt80
;
; Inhibited int 3.
;
BS3_PROC_BEGIN_CMN bs3CpuWeird1_InhibitedInt3, BS3_PBC_NEAR
; Load SS from stack. This instruction causes fusing.
%if TMPL_BITS != 64
pop ss
%else
mov ss, [rsp]
%endif
; The ring transition instruction.
BS3_GLOBAL_NAME_EX BS3_CMN_NM(bs3CpuWeird1_InhibitedInt3_int3), , 0
int 3
; We shouldn't get here!
.ud2_again:
ud2
jmp .ud2_again
AssertCompile(.ud2_again - BS3_CMN_NM(bs3CpuWeird1_InhibitedInt3_int3) == 2)
BS3_PROC_END_CMN bs3CpuWeird1_InhibitedInt3
;
; Inhibited int3.
;
BS3_PROC_BEGIN_CMN bs3CpuWeird1_InhibitedBp, BS3_PBC_NEAR
; Load SS from stack. This instruction causes fusing.
%if TMPL_BITS != 64
pop ss
%else
mov ss, [rsp]
%endif
; The ring transition instruction.
BS3_GLOBAL_NAME_EX BS3_CMN_NM(bs3CpuWeird1_InhibitedBp_int3), , 0
int3
; We shouldn't get here!
.ud2_again:
ud2
jmp .ud2_again
AssertCompile(.ud2_again - BS3_CMN_NM(bs3CpuWeird1_InhibitedBp_int3) == 1)
BS3_PROC_END_CMN bs3CpuWeird1_InhibitedBp
%endif ; BS3_INSTANTIATING_CMN
%include "bs3kit-template-footer.mac" ; reset environment
|
