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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-28 09:13:47 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-28 09:13:47 +0000 |
commit | 102b0d2daa97dae68d3eed54d8fe37a9cc38a892 (patch) | |
tree | bcf648efac40ca6139842707f0eba5a4496a6dd2 /include/lib/cpus/aarch64/cortex_a65ae.h | |
parent | Initial commit. (diff) | |
download | arm-trusted-firmware-upstream.tar.xz arm-trusted-firmware-upstream.zip |
Adding upstream version 2.8.0+dfsg.upstream/2.8.0+dfsgupstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'include/lib/cpus/aarch64/cortex_a65ae.h')
-rw-r--r-- | include/lib/cpus/aarch64/cortex_a65ae.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/include/lib/cpus/aarch64/cortex_a65ae.h b/include/lib/cpus/aarch64/cortex_a65ae.h new file mode 100644 index 0000000..bd4a881 --- /dev/null +++ b/include/lib/cpus/aarch64/cortex_a65ae.h @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2019, Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef CORTEX_A65AE_H +#define CORTEX_A65AE_H + +#include <lib/utils_def.h> + +#define CORTEX_A65AE_MIDR U(0x410FD430) + +/******************************************************************************* + * CPU Extended Control register specific definitions + ******************************************************************************/ +#define CORTEX_A65AE_ECTLR_EL1 S3_0_C15_C1_4 + +/******************************************************************************* + * CPU Auxiliary Control register specific definitions + ******************************************************************************/ +#define CORTEX_A65AE_CPUACTLR_EL1 S3_0_C15_C1_0 + +/******************************************************************************* + * CPU Power Control register specific definitions + ******************************************************************************/ + +#define CORTEX_A65AE_CPUPWRCTLR_EL1 S3_0_C15_C2_7 +#define CORTEX_A65AE_CPUPWRCTLR_EL1_CORE_PWRDN_BIT (U(1) << 0) + +#endif /* CORTEX_A65AE_H */ |