summaryrefslogtreecommitdiffstats
path: root/plat/marvell/armada/a8k/a80x0/board/phy-porting-layer.h
blob: afa3be158c96f4bcdac4ded7b8a18a590c9a406f (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
/*
 * Copyright (C) 2018 Marvell International Ltd.
 *
 * SPDX-License-Identifier:     BSD-3-Clause
 * https://spdx.org/licenses
 */

#ifndef PHY_PORTING_LAYER_H
#define PHY_PORTING_LAYER_H

#define MAX_LANE_NR		6

static const struct xfi_params
	xfi_static_values_tab[AP_NUM][CP_NUM][MAX_LANE_NR] = {
	/* AP0 */
	{
		/* CP 0 */
		{
			{ 0 }, /* Comphy0 */
			{ 0 }, /* Comphy1 */
			{ .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
			  .align90 = 0x5f,
			  .g1_dfe_res = 0x2, .g1_amp = 0x1c, .g1_emph = 0xe,
			  .g1_emph_en = 0x1, .g1_tx_amp_adj = 0x1,
			  .g1_tx_emph_en = 0x1, .g1_tx_emph = 0x0,
			  .g1_rx_selmuff = 0x1, .g1_rx_selmufi = 0x0,
			  .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2,
			  .valid = 0x1 }, /* Comphy2 */
			{ 0 }, /* Comphy3 */
			{ .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
			  .align90 = 0x5f,
			  .g1_dfe_res = 0x2, .g1_amp = 0x1c, .g1_emph = 0xe,
			  .g1_emph_en = 0x1, .g1_tx_amp_adj = 0x1,
			  .g1_tx_emph_en = 0x1, .g1_tx_emph = 0x0,
			  .g1_rx_selmuff = 0x1, .g1_rx_selmufi = 0x0,
			  .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2,
			  .valid = 0x1 }, /* Comphy4 */
			{ 0 }, /* Comphy5 */
		},

		/* CP 1 */
		{
			{ 0 }, /* Comphy0 */
			{ 0 }, /* Comphy1 */
			{ .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
			  .align90 = 0x5f,
			  .g1_dfe_res = 0x2, .g1_amp = 0x1c, .g1_emph = 0xe,
			  .g1_emph_en = 0x1, .g1_tx_amp_adj = 0x1,
			  .g1_tx_emph_en = 0x1, .g1_tx_emph = 0x0,
			  .g1_rx_selmuff = 0x1, .g1_rx_selmufi = 0x0,
			  .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2,
			  .valid = 0x1 }, /* Comphy2 */
			{ 0 }, /* Comphy3 */
			{ .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
			  .align90 = 0x5f,
			  .g1_dfe_res = 0x2, .g1_amp = 0x1c, .g1_emph = 0xe,
			  .g1_emph_en = 0x1, .g1_tx_amp_adj = 0x1,
			  .g1_tx_emph_en = 0x1, .g1_tx_emph = 0x0,
			  .g1_rx_selmuff = 0x1, .g1_rx_selmufi = 0x0,
			  .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2,
			  .valid = 0x1 }, /* Comphy4 */
			{ 0 }, /* Comphy5 */
		},
	},
};

static const struct sata_params
	sata_static_values_tab[AP_NUM][CP_NUM][MAX_LANE_NR] = {
	/* AP0 */
	{
		/* CP 0 */
		{
			{ 0 }, /* Comphy0 */
			{ .g1_amp = 0x8, .g2_amp = 0xa, .g3_amp = 0x1e,
			  .g1_emph = 0x1, .g2_emph = 0x2, .g3_emph = 0xe,
			  .g1_emph_en = 0x1, .g2_emph_en = 0x1,
			  .g3_emph_en = 0x1,
			  .g1_tx_amp_adj = 0x1, .g2_tx_amp_adj = 0x1,
			  .g3_tx_amp_adj = 0x1,
			  .g1_tx_emph_en = 0x0, .g2_tx_emph_en = 0x0,
			  .g3_tx_emph_en = 0x0,
			  .g1_tx_emph = 0x1, .g2_tx_emph = 0x1,
			  .g3_tx_emph = 0x1,
			  .g3_dfe_res = 0x1, .g3_ffe_res_sel = 0x4,
			  .g3_ffe_cap_sel = 0xf,
			  .align90 = 0x61,
			  .g1_rx_selmuff = 0x3, .g2_rx_selmuff = 0x3,
			  .g3_rx_selmuff = 0x3,
			  .g1_rx_selmufi = 0x0, .g2_rx_selmufi = 0x0,
			  .g3_rx_selmufi = 0x3,
			  .g1_rx_selmupf = 0x1, .g2_rx_selmupf = 0x1,
			  .g3_rx_selmupf = 0x2,
			  .g1_rx_selmupi = 0x0, .g2_rx_selmupi = 0x0,
			  .g3_rx_selmupi = 0x2,
			  .polarity_invert = COMPHY_POLARITY_NO_INVERT,
			  .valid = 0x1
			}, /* Comphy1 */
			{ 0 }, /* Comphy2 */
			{ .g1_amp = 0x8, .g2_amp = 0xa, .g3_amp = 0x1e,
			 .g1_emph = 0x1, .g2_emph = 0x2, .g3_emph = 0xe,
			 .g1_emph_en = 0x1, .g2_emph_en = 0x1,
			 .g3_emph_en = 0x1,
			 .g1_tx_amp_adj = 0x1, .g2_tx_amp_adj = 0x1,
			 .g3_tx_amp_adj = 0x1,
			 .g1_tx_emph_en = 0x0, .g2_tx_emph_en = 0x0,
			 .g3_tx_emph_en = 0x0,
			 .g1_tx_emph = 0x1, .g2_tx_emph = 0x1,
			 .g3_tx_emph = 0x1,
			 .g3_dfe_res = 0x1, .g3_ffe_res_sel = 0x4,
			 .g3_ffe_cap_sel = 0xf,
			 .align90 = 0x61,
			 .g1_rx_selmuff = 0x3, .g2_rx_selmuff = 0x3,
			 .g3_rx_selmuff = 0x3,
			 .g1_rx_selmufi = 0x0, .g2_rx_selmufi = 0x0,
			 .g3_rx_selmufi = 0x3,
			 .g1_rx_selmupf = 0x1, .g2_rx_selmupf = 0x1,
			 .g3_rx_selmupf = 0x2,
			 .g1_rx_selmupi = 0x0, .g2_rx_selmupi = 0x0,
			 .g3_rx_selmupi = 0x2,
			 .polarity_invert = COMPHY_POLARITY_NO_INVERT,
			 .valid = 0x1
			}, /* Comphy3 */
			{ 0 }, /* Comphy4 */
			{ 0 }, /* Comphy5 */
		},

		/* CP 1 */
		{
			{ 0 }, /* Comphy0 */
			{ .g1_amp = 0x8, .g2_amp = 0xa, .g3_amp = 0x1e,
			  .g1_emph = 0x1, .g2_emph = 0x2, .g3_emph = 0xe,
			  .g1_emph_en = 0x1, .g2_emph_en = 0x1,
			  .g3_emph_en = 0x1,
			  .g1_tx_amp_adj = 0x1, .g2_tx_amp_adj = 0x1,
			  .g3_tx_amp_adj = 0x1,
			  .g1_tx_emph_en = 0x0, .g2_tx_emph_en = 0x0,
			  .g3_tx_emph_en = 0x0,
			  .g1_tx_emph = 0x1, .g2_tx_emph = 0x1,
			  .g3_tx_emph = 0x1,
			  .g3_dfe_res = 0x1, .g3_ffe_res_sel = 0x4,
			  .g3_ffe_cap_sel = 0xf,
			  .align90 = 0x61,
			  .g1_rx_selmuff = 0x3, .g2_rx_selmuff = 0x3,
			  .g3_rx_selmuff = 0x3,
			  .g1_rx_selmufi = 0x0, .g2_rx_selmufi = 0x0,
			  .g3_rx_selmufi = 0x3,
			  .g1_rx_selmupf = 0x1, .g2_rx_selmupf = 0x1,
			  .g3_rx_selmupf = 0x2,
			  .g1_rx_selmupi = 0x0, .g2_rx_selmupi = 0x0,
			  .g3_rx_selmupi = 0x2,
			  .polarity_invert = COMPHY_POLARITY_NO_INVERT,
			  .valid = 0x1
			}, /* Comphy1 */
			{ 0 }, /* Comphy2 */
			{ .g1_amp = 0x8, .g2_amp = 0xa, .g3_amp = 0x1e,
			  .g1_emph = 0x1, .g2_emph = 0x2, .g3_emph = 0xe,
			  .g1_emph_en = 0x1, .g2_emph_en = 0x1,
			  .g3_emph_en = 0x1,
			  .g1_tx_amp_adj = 0x1, .g2_tx_amp_adj = 0x1,
			  .g3_tx_amp_adj = 0x1,
			  .g1_tx_emph_en = 0x0, .g2_tx_emph_en = 0x0,
			  .g3_tx_emph_en = 0x0,
			  .g1_tx_emph = 0x1, .g2_tx_emph = 0x1,
			  .g3_tx_emph = 0x1,
			  .g3_dfe_res = 0x1, .g3_ffe_res_sel = 0x4,
			  .g3_ffe_cap_sel = 0xf,
			  .align90 = 0x61,
			  .g1_rx_selmuff = 0x3, .g2_rx_selmuff = 0x3,
			  .g3_rx_selmuff = 0x3,
			  .g1_rx_selmufi = 0x0, .g2_rx_selmufi = 0x0,
			  .g3_rx_selmufi = 0x3,
			  .g1_rx_selmupf = 0x1, .g2_rx_selmupf = 0x1,
			  .g3_rx_selmupf = 0x2,
			  .g1_rx_selmupi = 0x0, .g2_rx_selmupi = 0x0,
			  .g3_rx_selmupi = 0x2,
			  .polarity_invert = COMPHY_POLARITY_NO_INVERT,
			  .valid = 0x1
			}, /* Comphy3 */
			{ 0 }, /* Comphy4 */
			{ 0 }, /* Comphy5 */

		},
	},
};

static const struct usb_params
	usb_static_values_tab[AP_NUM][CP_NUM][MAX_LANE_NR] = {
	[0 ... AP_NUM-1][0 ... CP_NUM-1][0 ... MAX_LANE_NR-1] = {
		.polarity_invert = COMPHY_POLARITY_NO_INVERT
	},
};
#endif /* PHY_PORTING_LAYER_H */