blob: 2a7771b5cc12e5c26f9aaf918f1f2b2e90e615d6 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
|
/*
* Copyright 2018-2020 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#ifndef MMU_MAP_DEF_H
#define MMU_MAP_DEF_H
#include <lib/xlat_tables/xlat_tables_defs.h>
#include <platform_def.h>
#define LS_MAP_CCSR MAP_REGION_FLAT(NXP_CCSR_ADDR, \
NXP_CCSR_SIZE, \
MT_DEVICE | MT_RW | MT_SECURE)
#ifdef NXP_DCSR_ADDR
#define LS_MAP_DCSR MAP_REGION_FLAT(NXP_DCSR_ADDR, \
NXP_DCSR_SIZE, \
MT_DEVICE | MT_RW | MT_SECURE)
#endif
#define LS_MAP_CONSOLE MAP_REGION_FLAT(NXP_DUART1_ADDR, \
NXP_DUART_SIZE, \
MT_DEVICE | MT_RW | MT_NS)
#define LS_MAP_OCRAM MAP_REGION_FLAT(NXP_OCRAM_ADDR, \
NXP_OCRAM_SIZE, \
MT_DEVICE | MT_RW | MT_SECURE)
#endif /* MMU_MAP_DEF_H */
|