diff options
Diffstat (limited to 'decoder/include/opencsd/etmv3')
-rw-r--r-- | decoder/include/opencsd/etmv3/etmv3_decoder.h | 47 | ||||
-rw-r--r-- | decoder/include/opencsd/etmv3/trc_cmp_cfg_etmv3.h | 235 | ||||
-rw-r--r-- | decoder/include/opencsd/etmv3/trc_dcd_mngr_etmv3.h | 57 | ||||
-rw-r--r-- | decoder/include/opencsd/etmv3/trc_pkt_decode_etmv3.h | 275 | ||||
-rw-r--r-- | decoder/include/opencsd/etmv3/trc_pkt_elem_etmv3.h | 261 | ||||
-rw-r--r-- | decoder/include/opencsd/etmv3/trc_pkt_proc_etmv3.h | 81 | ||||
-rw-r--r-- | decoder/include/opencsd/etmv3/trc_pkt_types_etmv3.h | 178 |
7 files changed, 1134 insertions, 0 deletions
diff --git a/decoder/include/opencsd/etmv3/etmv3_decoder.h b/decoder/include/opencsd/etmv3/etmv3_decoder.h new file mode 100644 index 0000000..2d5b728 --- /dev/null +++ b/decoder/include/opencsd/etmv3/etmv3_decoder.h @@ -0,0 +1,47 @@ +/* + * \file etmv3_decoder.h + * \brief OpenCSD : Top level header file for ETMv3 decoder + * + * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved. + */ + + +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef ARM_ETMV3_DECODER_H_INCLUDED +#define ARM_ETMV3_DECODER_H_INCLUDED + +#include "opencsd/etmv3/trc_cmp_cfg_etmv3.h" +#include "opencsd/etmv3/trc_pkt_elem_etmv3.h" +#include "opencsd/etmv3/trc_pkt_proc_etmv3.h" +#include "opencsd/etmv3/trc_pkt_types_etmv3.h" +#include "opencsd/etmv3/trc_pkt_decode_etmv3.h" + +#endif // ARM_ETMV3_DECODER_H_INCLUDED + +/* End of File etmv3_decoder.h */ diff --git a/decoder/include/opencsd/etmv3/trc_cmp_cfg_etmv3.h b/decoder/include/opencsd/etmv3/trc_cmp_cfg_etmv3.h new file mode 100644 index 0000000..509de20 --- /dev/null +++ b/decoder/include/opencsd/etmv3/trc_cmp_cfg_etmv3.h @@ -0,0 +1,235 @@ +/* + * \file trc_cmp_cfg_etmv3.h + * \brief OpenCSD : + * + * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved. + */ + + +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef ARM_TRC_CMP_CFG_ETMV3_H_INCLUDED +#define ARM_TRC_CMP_CFG_ETMV3_H_INCLUDED + +#include "trc_pkt_types_etmv3.h" +#include "common/trc_cs_config.h" + + +/** @addtogroup ocsd_protocol_cfg +@{*/ + +/** @name ETMV3 configuration +@{*/ + + +/*! + * @class EtmV3Config + * @brief Interpreter class for etm v3 config structure. + * + * Provides quick value interpretation methods for the ETMv3 config register values. + * Primarily inlined for efficient code. + * + */ +class EtmV3Config : public CSConfig +{ +public: + EtmV3Config(); /**< Default constructor */ + EtmV3Config(const ocsd_etmv3_cfg *cfg_regs); + ~EtmV3Config() {}; /**< Default destructor */ + + /* register bit constants. */ + static const uint32_t CTRL_DATAVAL = 0x4; + static const uint32_t CTRL_DATAADDR = 0x8; + static const uint32_t CTRL_CYCLEACC = 0x1000; + static const uint32_t CTRL_DATAONLY = 0x100000; + static const uint32_t CTRL_TS_ENA = (0x1 << 28); + static const uint32_t CTRL_VMID_ENA = (0x1 << 30); + + static const uint32_t CCER_HAS_TS = (0x1 << 22); + static const uint32_t CCER_VIRTEXT = (0x1 << 26); + static const uint32_t CCER_TS64BIT = (0x1 << 29); + + static const uint32_t IDR_ALTBRANCH = 0x100000; + +// operations to convert to and from C-API structure + + //! copy assignment operator for C-API base structure into class. + EtmV3Config & operator=(const ocsd_etmv3_cfg *p_cfg); + + //! cast operator returning struct const reference + operator const ocsd_etmv3_cfg &() const { return m_cfg; }; + //! cast operator returning struct const pointer + operator const ocsd_etmv3_cfg *() const { return &m_cfg; }; + + //! combination enum to describe trace mode. + enum EtmTraceMode { + TM_INSTR_ONLY, //!< instruction only trace + TM_I_DATA_VAL, //!< instruction + data value + TM_I_DATA_ADDR, //!< instruction + data address + TM_I_DATA_VAL_ADDR, //!< instr + data value + data address + TM_DATAONLY_VAL, //!< data value trace + TM_DATAONLY_ADDR, //!< data address trace + TM_DATAONLY_VAL_ADDR //!< data value + address trace + }; + + EtmTraceMode const GetTraceMode() const; //!< return trace mode + + const bool isInstrTrace() const; //!< instruction trace present. + const bool isDataValTrace() const; //!< data value trace present. + const bool isDataAddrTrace() const; //!< data address trace present. + const bool isDataTrace() const; //!< either or both data trace types present. + + const bool isCycleAcc() const; //!< return true if cycle accurate tracing enabled. + + const int MinorRev() const; //!< return X revision in 3.X + + const bool isV7MArch() const; //!< source is V7M architecture + const bool isAltBranch() const; //!< Alternate branch packet encoding used. + + const int CtxtIDBytes() const; //!< number of context ID bytes traced 1,2,4; + const bool hasVirtExt() const; //!< processor has virtualisation extensions. + const bool isVMIDTrace() const; //!< VMID tracing enabled. + + const bool hasTS() const; //!< Timestamps implemented in trace. + const bool isTSEnabled() const; //!< Timestamp trace is enabled. + const bool TSPkt64() const; //!< timestamp packet is 64 bits in size. + + virtual const uint8_t getTraceID() const; //!< CoreSight Trace ID for this device. + + const ocsd_arch_version_t getArchVersion() const; //!< architecture version + const ocsd_core_profile_t getCoreProfile() const; //!< core profile. + +private: + ocsd_etmv3_cfg m_cfg; + +}; + + +/* inlines for the bit interpretations */ + +inline EtmV3Config & EtmV3Config::operator=(const ocsd_etmv3_cfg *p_cfg) +{ + m_cfg = *p_cfg; + return *this; +} + +inline const bool EtmV3Config::isCycleAcc() const +{ + return (bool)((m_cfg.reg_ctrl & CTRL_CYCLEACC) != 0); +} + +//! return X revision in 3.X +inline const int EtmV3Config::MinorRev() const +{ + return ((int)m_cfg.reg_idr & 0xF0) >> 4; +} + +inline const bool EtmV3Config::isInstrTrace() const +{ + return (bool)((m_cfg.reg_ctrl & CTRL_DATAONLY) == 0); +} + +inline const bool EtmV3Config::isDataValTrace() const +{ + return (bool)((m_cfg.reg_ctrl & CTRL_DATAVAL) != 0); +} + +inline const bool EtmV3Config::isDataAddrTrace() const +{ + return (bool)((m_cfg.reg_ctrl & CTRL_DATAADDR) != 0); +} + +//! either or both data trace present +inline const bool EtmV3Config::isDataTrace() const +{ + return (bool)((m_cfg.reg_ctrl & (CTRL_DATAADDR | CTRL_DATAVAL)) != 0); +} + +inline const bool EtmV3Config::isV7MArch() const +{ + return (bool)((m_cfg.arch_ver == ARCH_V7) && (m_cfg.core_prof == profile_CortexM)); +} + +//! has alternate branch encoding +inline const bool EtmV3Config::isAltBranch() const +{ + return (bool)(((m_cfg.reg_idr & IDR_ALTBRANCH) != 0) && (MinorRev() >= 4)); +} + +//! processor implements virtualisation extensions. +inline const bool EtmV3Config::hasVirtExt() const +{ + return (bool)((m_cfg.reg_ccer & CCER_VIRTEXT) != 0); +} + +//! TS packet is 64 bit. +inline const bool EtmV3Config::TSPkt64() const +{ + return (bool)((m_cfg.reg_ccer & CCER_TS64BIT) != 0); +} + +//! TS implemented. +inline const bool EtmV3Config::hasTS() const +{ + return (bool)((m_cfg.reg_ccer & CCER_HAS_TS) != 0); +} + +//! TS is enabled in the trace +inline const bool EtmV3Config::isTSEnabled() const +{ + return (bool)((m_cfg.reg_ctrl & CTRL_TS_ENA) != 0); +} + +//! tracing VMID +inline const bool EtmV3Config::isVMIDTrace() const +{ + return (bool)((m_cfg.reg_ctrl & CTRL_VMID_ENA) != 0); +} + +inline const uint8_t EtmV3Config::getTraceID() const +{ + return (uint8_t)(m_cfg.reg_trc_id & 0x7F); +} + +inline const ocsd_arch_version_t EtmV3Config::getArchVersion() const +{ + return m_cfg.arch_ver; +} + +inline const ocsd_core_profile_t EtmV3Config::getCoreProfile() const +{ + return m_cfg.core_prof; +} + +/** @}*/ + +/** @}*/ + +#endif // ARM_TRC_CMP_CFG_ETMV3_H_INCLUDED + +/* End of File trc_cmp_cfg_etmv3.h */ diff --git a/decoder/include/opencsd/etmv3/trc_dcd_mngr_etmv3.h b/decoder/include/opencsd/etmv3/trc_dcd_mngr_etmv3.h new file mode 100644 index 0000000..c3a96ff --- /dev/null +++ b/decoder/include/opencsd/etmv3/trc_dcd_mngr_etmv3.h @@ -0,0 +1,57 @@ +/* + * \file trc_dcd_mngr_etmv3.h + * \brief OpenCSD : ETMv3 decoder manager / handler specialisation + * + * \copyright Copyright (c) 2016, ARM Limited. All Rights Reserved. + */ + +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef ARM_TRC_DCD_MNGR_ETMV3_H_INCLUDED +#define ARM_TRC_DCD_MNGR_ETMV3_H_INCLUDED + +#include "common/ocsd_dcd_mngr.h" +#include "trc_pkt_decode_etmv3.h" +#include "trc_pkt_proc_etmv3.h" +#include "trc_cmp_cfg_etmv3.h" +#include "trc_pkt_types_etmv3.h" + +class DecoderMngrEtmV3 : public DecodeMngrFullDcd< EtmV3TrcPacket, + ocsd_etmv3_pkt_type, + EtmV3Config, + ocsd_etmv3_cfg, + TrcPktProcEtmV3, + TrcPktDecodeEtmV3> +{ +public: + DecoderMngrEtmV3(const std::string &name) : DecodeMngrFullDcd(name,OCSD_PROTOCOL_ETMV3) {}; + virtual ~DecoderMngrEtmV3() {}; +}; + +#endif // ARM_TRC_DCD_MNGR_ETMV3_H_INCLUDED + +/* End of File trc_dcd_mngr_etmv3.h */ diff --git a/decoder/include/opencsd/etmv3/trc_pkt_decode_etmv3.h b/decoder/include/opencsd/etmv3/trc_pkt_decode_etmv3.h new file mode 100644 index 0000000..9027706 --- /dev/null +++ b/decoder/include/opencsd/etmv3/trc_pkt_decode_etmv3.h @@ -0,0 +1,275 @@ +/*! + * \file trc_pkt_decode_etmv3.h + * \brief OpenCSD : ETMv3 decode + * + * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved. + */ + +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef ARM_TRC_PKT_DECODE_ETMV3_H_INCLUDED +#define ARM_TRC_PKT_DECODE_ETMV3_H_INCLUDED + +#include "common/trc_pkt_decode_base.h" +#include "common/trc_gen_elem.h" +#include "common/ocsd_pe_context.h" +#include "common/ocsd_code_follower.h" +#include "common/ocsd_gen_elem_list.h" + +#include "opencsd/etmv3/trc_pkt_elem_etmv3.h" +#include "opencsd/etmv3/trc_cmp_cfg_etmv3.h" + +/**************** Atom handling class **************************************/ +class Etmv3Atoms +{ +public: + Etmv3Atoms(const bool isCycleAcc); + ~Etmv3Atoms() {}; + + //! initialise the atom and index values + void initAtomPkt(const EtmV3TrcPacket *in_pkt, const ocsd_trc_index_t &root_index); + + const ocsd_atm_val getCurrAtomVal() const; + const int numAtoms() const; //!< number of atoms + const ocsd_trc_index_t pktIndex() const; //!< originating packet index + + const bool hasAtomCC() const; //!< cycle count for current atom? + const uint32_t getAtomCC() const; //!< cycle count for current atom + const uint32_t getRemainCC() const; //!< get residual cycle count for remaining atoms + + void clearAtom(); //!< clear the current atom, set the next. + void clearAll(); //!< clear all + +private: + + // Atom PHDR packet formats from ETMv3 spec - defines content of header. + enum { + ATOM_PHDR_FMT_1 = 1, + ATOM_PHDR_FMT_2, + ATOM_PHDR_FMT_3, + ATOM_PHDR_FMT_4, + }; + + + + ocsd_pkt_atom m_atom; /**< atom elements - non zero number indicates valid atom count */ + uint8_t m_p_hdr_fmt; /**< if atom elements, associated phdr format */ + uint32_t m_cycle_count; + ocsd_trc_index_t m_root_index; //!< root index for the atom packet + bool m_isCCPacket; +}; + + +inline Etmv3Atoms::Etmv3Atoms(const bool isCycleAcc) +{ + m_isCCPacket = isCycleAcc; +} + +//! initialise the atom and index values +inline void Etmv3Atoms::initAtomPkt(const EtmV3TrcPacket *in_pkt, const ocsd_trc_index_t &root_index) +{ + m_atom = in_pkt->getAtom(); + m_p_hdr_fmt = in_pkt->getPHdrFmt(); + m_cycle_count = in_pkt->getCycleCount(); +} + +inline const ocsd_atm_val Etmv3Atoms::getCurrAtomVal() const +{ + return (m_atom.En_bits & 0x1) ? ATOM_E : ATOM_N; +} + +inline const int Etmv3Atoms::numAtoms() const +{ + return m_atom.num; +} + +inline const ocsd_trc_index_t Etmv3Atoms::pktIndex() const +{ + return m_root_index; +} + +inline const bool Etmv3Atoms::hasAtomCC() const +{ + bool hasCC = false; + if(!m_isCCPacket) + return hasCC; + + switch(m_p_hdr_fmt) + { + case ATOM_PHDR_FMT_4: + default: + break; + + case ATOM_PHDR_FMT_3: + case ATOM_PHDR_FMT_1: + hasCC = true; + break; + + case ATOM_PHDR_FMT_2: + hasCC = (m_atom.num > 1); // first of 2 has W state + break; + } + return hasCC; +} + +inline const uint32_t Etmv3Atoms::getAtomCC() const +{ + uint32_t CC = 0; + if(!m_isCCPacket) + return CC; + + switch(m_p_hdr_fmt) + { + case ATOM_PHDR_FMT_4: // no CC in format 4 + default: + break; + + case ATOM_PHDR_FMT_3: // single CC with optional E atom + CC = m_cycle_count; + break; + + case ATOM_PHDR_FMT_2: // single W on first of 2 atoms + CC = (m_atom.num > 1) ? 1: 0; + break; + + case ATOM_PHDR_FMT_1: // each atom has 1 CC. + CC = 1; + break; + } + return CC; +} + +inline const uint32_t Etmv3Atoms::getRemainCC() const +{ + uint32_t CC = 0; + if(!m_isCCPacket) + return CC; + + switch(m_p_hdr_fmt) + { + case ATOM_PHDR_FMT_4: // no CC in format 4 + default: + break; + + case ATOM_PHDR_FMT_3: + CC = m_cycle_count; + break; + + case ATOM_PHDR_FMT_2: + CC = (m_atom.num > 1) ? 1: 0; + break; + + case ATOM_PHDR_FMT_1: + CC = m_atom.num; + break; + } + return CC; +} + +inline void Etmv3Atoms::clearAtom() +{ + m_atom.En_bits >>=1; + if(m_atom.num) + m_atom.num--; +} + +inline void Etmv3Atoms::clearAll() +{ + m_atom.num = 0; +} + +/********** Main decode class ****************************************************/ +class TrcPktDecodeEtmV3 : public TrcPktDecodeBase<EtmV3TrcPacket, EtmV3Config> +{ +public: + TrcPktDecodeEtmV3(); + TrcPktDecodeEtmV3(int instIDNum); + virtual ~TrcPktDecodeEtmV3(); + +protected: + /* implementation packet decoding interface */ + virtual ocsd_datapath_resp_t processPacket(); + virtual ocsd_datapath_resp_t onEOT(); + virtual ocsd_datapath_resp_t onReset(); + virtual ocsd_datapath_resp_t onFlush(); + virtual ocsd_err_t onProtocolConfig(); + virtual const uint8_t getCoreSightTraceID() { return m_CSID; }; + + /* local decode methods */ + void initDecoder(); //!< initial state on creation (zeros all config) + void resetDecoder(); //!< reset state to start of decode. (moves state, retains config) + + ocsd_datapath_resp_t decodePacket(bool &pktDone); //!< decode a packet + + ocsd_datapath_resp_t processISync(const bool withCC, const bool firstSync = false); + ocsd_datapath_resp_t processBranchAddr(); + ocsd_datapath_resp_t processPHdr(); + + ocsd_datapath_resp_t sendUnsyncPacket(); //!< send an initial unsync packet when decoder starts + + OcsdTraceElement *GetNextOpElem(ocsd_datapath_resp_t &resp); //!< get the next element from the element list. + +private: + void setNeedAddr(bool bNeedAddr); + void pendExceptionReturn(); + bool preISyncValid(ocsd_etmv3_pkt_type pkt_type); +//** intra packet state; + + OcsdCodeFollower m_code_follower; //!< code follower for instruction trace + + ocsd_vaddr_t m_IAddr; //!< next instruction address + bool m_bNeedAddr; //!< true if an address is needed (current out of date / invalid) + bool m_bSentUnknown; //!< true if we have sent an unknown address packet for this phase of needing an address. + bool m_bWaitISync; //!< true if waiting for first ISync packet + + OcsdPeContext m_PeContext; //!< save context data before sending in output packet + + OcsdGenElemList m_outputElemList; //!< list of output elements + + +//** Other packet decoder state; + + // trace decode FSM + typedef enum { + NO_SYNC, //!< pre start trace - init state or after reset or overflow, loss of sync. + WAIT_ASYNC, //!< waiting for a-sync packet. + WAIT_ISYNC, //!< waiting for i-sync packet. + DECODE_PKTS, //!< processing a packet + SEND_PKTS, //!< sending packets. + } processor_state_t; + + processor_state_t m_curr_state; + unsync_info_t m_unsync_info; //!< additional state for unsync + + uint8_t m_CSID; //!< Coresight trace ID for this decoder. +}; + + +#endif // ARM_TRC_PKT_DECODE_ETMV3_H_INCLUDED + +/* End of File trc_pkt_decode_etmv3.h */ diff --git a/decoder/include/opencsd/etmv3/trc_pkt_elem_etmv3.h b/decoder/include/opencsd/etmv3/trc_pkt_elem_etmv3.h new file mode 100644 index 0000000..a874ea3 --- /dev/null +++ b/decoder/include/opencsd/etmv3/trc_pkt_elem_etmv3.h @@ -0,0 +1,261 @@ +/* + * \file trc_pkt_elem_etmv3.h + * \brief OpenCSD : + * + * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved. + */ + + +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef ARM_TRC_PKT_ELEM_ETMV3_H_INCLUDED +#define ARM_TRC_PKT_ELEM_ETMV3_H_INCLUDED + +#include "trc_pkt_types_etmv3.h" +#include "common/trc_printable_elem.h" +#include "common/trc_pkt_elem_base.h" + +/** @addtogroup trc_pkts +@{*/ + +/*! + * @class EtmV3TrcPacket + * @brief ETMv3 Trace Protocol Packet. + * + * This class represents a single ETMv3 trace packet, along with intra packet state. + * + */ +class EtmV3TrcPacket : public TrcPacketBase, public trcPrintableElem +{ +public: + EtmV3TrcPacket(); + ~EtmV3TrcPacket(); + +// conversions between C-API struct and C++ object types + // assign from C-API struct + EtmV3TrcPacket &operator =(const ocsd_etmv3_pkt* p_pkt); + + // allow const cast to C-API struct to pass C++ object + operator const ocsd_etmv3_pkt*() const { return &m_pkt_data; }; + operator const ocsd_etmv3_pkt&() const { return m_pkt_data; }; + + // override c_pkt to pass out the packet data struct. + virtual const void *c_pkt() const { return &m_pkt_data; }; + +// update interface - set packet values + void Clear(); //!< clear update data in packet ready for new one. + void ResetState(); //!< reset intra packet state data -on full decoder reset. + + void SetType(const ocsd_etmv3_pkt_type p_type); + void SetErrType(const ocsd_etmv3_pkt_type e_type); + void UpdateAddress(const ocsd_vaddr_t partAddrVal, const int updateBits); + void SetException( const ocsd_armv7_exception type, + const uint16_t number, + const bool cancel, + const bool cm_type, + const int irq_n = 0, + const int resume = 0); + void UpdateNS(const int NS); + void UpdateAltISA(const int AltISA); + void UpdateHyp(const int Hyp); + void UpdateISA(const ocsd_isa isa); + void UpdateContextID(const uint32_t contextID); + void UpdateVMID(const uint8_t VMID); + void UpdateTimestamp(const uint64_t tsVal, const uint8_t updateBits); + + bool UpdateAtomFromPHdr(const uint8_t pHdr, const bool cycleAccurate); //!< Interpret P Hdr, return true if valid, false if not. + + void SetDataOOOTag(const uint8_t tag); + void SetDataValue(const uint32_t value); + void UpdateDataAddress(const uint32_t value, const uint8_t valid_bits); + void UpdateDataEndian(const uint8_t BE_Val); + void SetCycleCount(const uint32_t cycleCount); + void SetISyncReason(const ocsd_iSync_reason reason); + void SetISyncHasCC(); + void SetISyncIsLSiP(); + void SetISyncNoAddr(); + +// packet status interface - get packet info. + const ocsd_etmv3_pkt_type getType() const { return m_pkt_data.type; }; + const bool isBadPacket() const; + + const int AltISA() const { return m_pkt_data.context.curr_alt_isa; }; + const ocsd_isa ISA() const { return m_pkt_data.curr_isa; }; + const bool changedISA() const { return m_pkt_data.curr_isa != m_pkt_data.prev_isa; }; + + // any of the context elements updated? + const bool isCtxtUpdated() const; + const bool isCtxtFlagsUpdated() const { return (m_pkt_data.context.updated == 1); }; + const bool isNS() const { return m_pkt_data.context.curr_NS; }; + const bool isHyp() const { return m_pkt_data.context.curr_Hyp; }; + + const bool isCtxtIDUpdated() const { return (m_pkt_data.context.updated_c == 1); } + const uint32_t getCtxtID() const { return m_pkt_data.context.ctxtID; }; + const bool isVMIDUpdated() const { return (m_pkt_data.context.updated_v == 1); } + const uint32_t getVMID() const { return m_pkt_data.context.VMID; }; + + const uint32_t getCycleCount() const { return m_pkt_data.cycle_count; }; + const uint64_t getTS() const { return m_pkt_data.timestamp; }; + + const bool isExcepPkt() const { return (m_pkt_data.exception.bits.present == 1); }; + const ocsd_armv7_exception excepType() const { return m_pkt_data.exception.type; }; + const uint16_t excepNum() const { return m_pkt_data.exception.number; }; + const bool isExcepCancel() const { return (m_pkt_data.exception.bits.present == 1) && (m_pkt_data.exception.bits.cancel == 1); }; + + const ocsd_iSync_reason getISyncReason() const { return m_pkt_data.isync_info.reason; }; + const bool getISyncHasCC() const { return m_pkt_data.isync_info.has_cycle_count; }; + const bool getISyncIsLSiPAddr() const { return m_pkt_data.isync_info.has_LSipAddress; }; + const bool getISyncNoAddr() const { return m_pkt_data.isync_info.no_address; }; + + const ocsd_vaddr_t getAddr() const { return m_pkt_data.addr.val; }; + const ocsd_vaddr_t getDataAddr() const { return m_pkt_data.data.addr.val; }; + + const ocsd_pkt_atom &getAtom() const { return m_pkt_data.atom; }; + const uint8_t getPHdrFmt() const { return m_pkt_data.p_hdr_fmt; }; + + +// printing + virtual void toString(std::string &str) const; + virtual void toStringFmt(const uint32_t fmtFlags, std::string &str) const; + +private: + const char *packetTypeName(const ocsd_etmv3_pkt_type type, const char **ppDesc) const; + void getBranchAddressStr(std::string &valStr) const; + void getAtomStr(std::string &valStr) const; + void getISyncStr(std::string &valStr) const; + void getISAStr(std::string &isaStr) const; + void getExcepStr(std::string &excepStr) const; + + ocsd_etmv3_pkt m_pkt_data; +}; + +inline void EtmV3TrcPacket::UpdateNS(const int NS) +{ + m_pkt_data.context.curr_NS = NS; + m_pkt_data.context.updated = 1; +}; + +inline void EtmV3TrcPacket::UpdateAltISA(const int AltISA) +{ + m_pkt_data.context.curr_alt_isa = AltISA; + m_pkt_data.context.updated = 1; +} + +inline void EtmV3TrcPacket::UpdateHyp(const int Hyp) +{ + m_pkt_data.context.curr_Hyp = Hyp; + m_pkt_data.context.updated = 1; +} + +inline void EtmV3TrcPacket::UpdateISA(const ocsd_isa isa) +{ + m_pkt_data.prev_isa = m_pkt_data.curr_isa; + m_pkt_data.curr_isa = isa; +} + +inline void EtmV3TrcPacket::SetType(const ocsd_etmv3_pkt_type p_type) +{ + m_pkt_data.type = p_type; +} + +inline void EtmV3TrcPacket::SetErrType(const ocsd_etmv3_pkt_type e_type) +{ + m_pkt_data.err_type = m_pkt_data.type; + m_pkt_data.type = e_type; +} + +inline const bool EtmV3TrcPacket::isBadPacket() const +{ + return (m_pkt_data.type >= ETM3_PKT_BAD_SEQUENCE); +} + +inline void EtmV3TrcPacket::SetDataOOOTag(const uint8_t tag) +{ + m_pkt_data.data.ooo_tag = tag; +} + +inline void EtmV3TrcPacket::SetDataValue(const uint32_t value) +{ + m_pkt_data.data.value = value; + m_pkt_data.data.update_dval = 1; +} + +inline void EtmV3TrcPacket::UpdateContextID(const uint32_t contextID) +{ + m_pkt_data.context.updated_c = 1; + m_pkt_data.context.ctxtID = contextID; +} + +inline void EtmV3TrcPacket::UpdateVMID(const uint8_t VMID) +{ + m_pkt_data.context.updated_v = 1; + m_pkt_data.context.VMID = VMID; +} + +inline void EtmV3TrcPacket::UpdateDataEndian(const uint8_t BE_Val) +{ + m_pkt_data.data.be = BE_Val; + m_pkt_data.data.update_be = 1; +} + +inline void EtmV3TrcPacket::SetCycleCount(const uint32_t cycleCount) +{ + m_pkt_data.cycle_count = cycleCount; +} + +inline void EtmV3TrcPacket::SetISyncReason(const ocsd_iSync_reason reason) +{ + m_pkt_data.isync_info.reason = reason; +} + +inline void EtmV3TrcPacket::SetISyncHasCC() +{ + m_pkt_data.isync_info.has_cycle_count = 1; +} + +inline void EtmV3TrcPacket::SetISyncIsLSiP() +{ + m_pkt_data.isync_info.has_LSipAddress = 1; +} + +inline void EtmV3TrcPacket::SetISyncNoAddr() +{ + m_pkt_data.isync_info.no_address = 1; +} + +inline const bool EtmV3TrcPacket::isCtxtUpdated() const +{ + return (m_pkt_data.context.updated_v == 1) || + (m_pkt_data.context.updated == 1) || + (m_pkt_data.context.updated_c == 1); +} + +/** @}*/ +#endif // ARM_TRC_PKT_ELEM_ETMV3_H_INCLUDED + +/* End of File trc_pkt_elem_etmv3.h */ diff --git a/decoder/include/opencsd/etmv3/trc_pkt_proc_etmv3.h b/decoder/include/opencsd/etmv3/trc_pkt_proc_etmv3.h new file mode 100644 index 0000000..5a7f959 --- /dev/null +++ b/decoder/include/opencsd/etmv3/trc_pkt_proc_etmv3.h @@ -0,0 +1,81 @@ +/* + * \file trc_pkt_proc_etmv3.h + * \brief OpenCSD : + * + * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved. + */ + + +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef ARM_TRC_PKT_PROC_ETMV3_H_INCLUDED +#define ARM_TRC_PKT_PROC_ETMV3_H_INCLUDED + +#include "trc_pkt_types_etmv3.h" +#include "common/trc_pkt_proc_base.h" + +class EtmV3PktProcImpl; +class EtmV3TrcPacket; +class EtmV3Config; + +/** @addtogroup ocsd_pkt_proc +@{*/ + + +class TrcPktProcEtmV3 : public TrcPktProcBase< EtmV3TrcPacket, ocsd_etmv3_pkt_type, EtmV3Config> +{ +public: + TrcPktProcEtmV3(); + TrcPktProcEtmV3(int instIDNum); + virtual ~TrcPktProcEtmV3(); + +protected: + /* implementation packet processing interface */ + virtual ocsd_datapath_resp_t processData( const ocsd_trc_index_t index, + const uint32_t dataBlockSize, + const uint8_t *pDataBlock, + uint32_t *numBytesProcessed); + virtual ocsd_datapath_resp_t onEOT(); + virtual ocsd_datapath_resp_t onReset(); + virtual ocsd_datapath_resp_t onFlush(); + virtual ocsd_err_t onProtocolConfig(); + virtual const bool isBadPacket() const; + + friend class EtmV3PktProcImpl; + + EtmV3PktProcImpl *m_pProcessor; +}; + + +#define ETMV3_OPFLG_UNFORMATTED_SOURCE 0x00010000 /**< Single ETM source from bypassed formatter - need to check for EOT markers */ + +/** @}*/ + +#endif // ARM_TRC_PKT_PROC_ETMV3_H_INCLUDED + +/* End of File trc_pkt_proc_etm.h */ diff --git a/decoder/include/opencsd/etmv3/trc_pkt_types_etmv3.h b/decoder/include/opencsd/etmv3/trc_pkt_types_etmv3.h new file mode 100644 index 0000000..c2e0114 --- /dev/null +++ b/decoder/include/opencsd/etmv3/trc_pkt_types_etmv3.h @@ -0,0 +1,178 @@ +/* + * \file trc_pkt_types_etmv3.h + * \brief OpenCSD : + * + * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved. + */ + +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef ARM_TRC_ETM3_PKT_TYPES_ETMV3_H_INCLUDED +#define ARM_TRC_ETM3_PKT_TYPES_ETMV3_H_INCLUDED + +#include "opencsd/trc_pkt_types.h" + +/** @addtogroup trc_pkts +@{*/ + +/** @name ETMv3 Packet Types +@{*/ + +typedef enum _ocsd_etmv3_pkt_type +{ + +// markers for unknown packets + ETM3_PKT_NOERROR, //!< no error in packet - supplimentary data. + ETM3_PKT_NOTSYNC, //!< no sync found yet + ETM3_PKT_INCOMPLETE_EOT, //!< flushing incomplete/empty packet at end of trace. + +// markers for valid packets + ETM3_PKT_BRANCH_ADDRESS, + ETM3_PKT_A_SYNC, + ETM3_PKT_CYCLE_COUNT, + ETM3_PKT_I_SYNC, + ETM3_PKT_I_SYNC_CYCLE, + ETM3_PKT_TRIGGER, + ETM3_PKT_P_HDR, + ETM3_PKT_STORE_FAIL, + ETM3_PKT_OOO_DATA, + ETM3_PKT_OOO_ADDR_PLC, + ETM3_PKT_NORM_DATA, + ETM3_PKT_DATA_SUPPRESSED, + ETM3_PKT_VAL_NOT_TRACED, + ETM3_PKT_IGNORE, + ETM3_PKT_CONTEXT_ID, + ETM3_PKT_VMID, + ETM3_PKT_EXCEPTION_ENTRY, + ETM3_PKT_EXCEPTION_EXIT, + ETM3_PKT_TIMESTAMP, + +// internal processing types + ETM3_PKT_BRANCH_OR_BYPASS_EOT, + +// packet errors + ETM3_PKT_BAD_SEQUENCE, //!< invalid sequence for packet type + ETM3_PKT_BAD_TRACEMODE, //!< invalid packet type for this trace mode. + ETM3_PKT_RESERVED //!< packet type reserved. + +} ocsd_etmv3_pkt_type; + +typedef struct _ocsd_etmv3_excep { + ocsd_armv7_exception type; /**< exception type. */ + uint16_t number; /**< exception as number */ + struct { + uint32_t present:1; /**< exception present in packet */ + uint32_t cancel:1; /**< exception cancels prev instruction traced. */ + uint32_t cm_type:1; + uint32_t cm_resume:4; /**< M class resume code */ + uint32_t cm_irq_n:9; /**< M class IRQ n */ + } bits; +} ocsd_etmv3_excep; + +typedef struct _etmv3_context_t { + struct { + uint32_t curr_alt_isa:1; /**< current Alt ISA flag for Tee / T32 (used if not in present packet) */ + uint32_t curr_NS:1; /**< current NS flag (used if not in present packet) */ + uint32_t curr_Hyp:1; /**< current Hyp flag (used if not in present packet) */ + uint32_t updated:1; /**< context updated */ + uint32_t updated_c:1; /**< updated CtxtID */ + uint32_t updated_v:1; /**< updated VMID */ + }; + uint32_t ctxtID; /**< Context ID */ + uint8_t VMID; /**< VMID */ +} etmv3_context_t; + + +typedef struct _etmv3_data_t { + + uint32_t value; /**< Data value */ + ocsd_pkt_vaddr addr; /**< current data address */ + + struct { + uint32_t ooo_tag:2; /**< Out of order data tag. */ + uint32_t be:1; /**< data transfers big-endian */ + uint32_t update_be:1; /**< updated Be flag */ + uint32_t update_addr:1; /**< updated address */ + uint32_t update_dval:1; /**< updated data value */ + }; +} etmv3_data_t; + +typedef struct _etmv3_isync_t { + ocsd_iSync_reason reason; + struct { + uint32_t has_cycle_count:1; /**< updated cycle count */ + uint32_t has_LSipAddress:1; /**< main address is load-store instuction, data address is overlapping instruction @ start of trace */ + uint32_t no_address:1; /**< data only ISync */ + }; +} etmv3_isync_t; + +typedef struct _ocsd_etmv3_pkt +{ + ocsd_etmv3_pkt_type type; /**< Primary packet type. */ + + ocsd_isa curr_isa; /**< current ISA */ + ocsd_isa prev_isa; /**< ISA in previous packet */ + + etmv3_context_t context; /**< current context */ + ocsd_pkt_vaddr addr; /**< current Addr */ + + etmv3_isync_t isync_info; + + ocsd_etmv3_excep exception; + + ocsd_pkt_atom atom; /**< atom elements - non zerom number indicates valid atom count */ + uint8_t p_hdr_fmt; /**< if atom elements, associated phdr format */ + uint32_t cycle_count; /**< cycle count associated with this packet (ETMv3 has counts in atom packets and as individual packets */ + + uint64_t timestamp; /**< current timestamp value */ + uint8_t ts_update_bits; /**< bits of ts updated this packet (if TS packet) */ + + etmv3_data_t data; /**< data transfer values */ + + ocsd_etmv3_pkt_type err_type; /**< Basic packet type if primary type indicates error or incomplete. (header type) */ + +} ocsd_etmv3_pkt; + +typedef struct _ocsd_etmv3_cfg +{ + uint32_t reg_idr; /**< ID register */ + uint32_t reg_ctrl; /**< Control Register */ + uint32_t reg_ccer; /**< CCER register */ + uint32_t reg_trc_id; /**< Trace Stream ID register */ + ocsd_arch_version_t arch_ver; /**< Architecture version */ + ocsd_core_profile_t core_prof; /**< Core Profile */ +} ocsd_etmv3_cfg; + + +#define DATA_ADDR_EXPECTED_FLAG 0x20 /**< Bit set for data trace headers if data address packets follow */ + +/** @}*/ +/** @}*/ +#endif // ARM_TRC_ETM3_PKT_TYPES_ETMV3_H_INCLUDED + +/* End of File trc_pkt_types_etmv3.h */ |