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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-07 18:49:45 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-07 18:49:45 +0000
commit2c3c1048746a4622d8c89a29670120dc8fab93c4 (patch)
tree848558de17fb3008cdf4d861b01ac7781903ce39 /arch/arm64/boot/dts/hisilicon/hip07-d05.dts
parentInitial commit. (diff)
downloadlinux-2c3c1048746a4622d8c89a29670120dc8fab93c4.tar.xz
linux-2c3c1048746a4622d8c89a29670120dc8fab93c4.zip
Adding upstream version 6.1.76.upstream/6.1.76
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'arch/arm64/boot/dts/hisilicon/hip07-d05.dts')
-rw-r--r--arch/arm64/boot/dts/hisilicon/hip07-d05.dts90
1 files changed, 90 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hip07-d05.dts b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
new file mode 100644
index 000000000..c3df67845
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/**
+ * dts file for Hisilicon D05 Development Board
+ *
+ * Copyright (C) 2016 HiSilicon Ltd.
+ */
+
+/dts-v1/;
+
+#include "hip07.dtsi"
+
+/ {
+ model = "Hisilicon Hip07 D05 Development Board";
+ compatible = "hisilicon,hip07-d05";
+
+ /* the mem node will be updated by UEFI. */
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x00000000 0x0 0x40000000>;
+ numa-node-id = <0>;
+ };
+
+ distance-map {
+ compatible = "numa-distance-map-v1";
+ distance-matrix = <0 0 10>,
+ <0 1 15>,
+ <0 2 20>,
+ <0 3 25>,
+ <1 0 15>,
+ <1 1 10>,
+ <1 2 25>,
+ <1 3 30>,
+ <2 0 20>,
+ <2 1 25>,
+ <2 2 10>,
+ <2 3 15>,
+ <3 0 25>,
+ <3 1 30>,
+ <3 2 15>,
+ <3 3 10>;
+ };
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&ipmi0 {
+ status = "okay";
+};
+
+&usb_ohci {
+ status = "okay";
+};
+
+&usb_ehci {
+ status = "okay";
+};
+
+&eth0 {
+ status = "okay";
+};
+
+&eth1 {
+ status = "okay";
+};
+
+&eth2 {
+ status = "okay";
+};
+
+&eth3 {
+ status = "okay";
+};
+
+&sas1 {
+ status = "okay";
+};
+
+&p0_pcie2_a {
+ status = "okay";
+};