blob: 4ebea60b8c5ba5f177854e3a8d89e93e7304e18b (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dpu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Unisoc Sharkl3 Display Processor Unit (DPU)
maintainers:
- Kevin Tang <kevin.tang@unisoc.com>
description: |
DPU (Display Processor Unit) is the Display Controller for the Unisoc SoCs
which transfers the image data from a video memory buffer to an internal
LCD interface.
properties:
compatible:
const: sprd,sharkl3-dpu
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
minItems: 2
clock-names:
items:
- const: clk_src_128m
- const: clk_src_384m
power-domains:
maxItems: 1
iommus:
maxItems: 1
port:
type: object
description:
A port node with endpoint definitions as defined in
Documentation/devicetree/bindings/media/video-interfaces.txt.
That port should be the output endpoint, usually output to
the associated DSI.
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- port
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sprd,sc9860-clk.h>
dpu: dpu@63000000 {
compatible = "sprd,sharkl3-dpu";
reg = <0x63000000 0x1000>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_src_128m", "clk_src_384m";
clocks = <&pll CLK_TWPLL_128M>,
<&pll CLK_TWPLL_384M>;
dpu_port: port {
dpu_out: endpoint {
remote-endpoint = <&dsi_in>;
};
};
};
|
