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|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/renesas,rcar-can.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas R-Car CAN Controller
maintainers:
- Sergei Shtylyov <sergei.shtylyov@gmail.com>
properties:
compatible:
oneOf:
- items:
- enum:
- renesas,can-r8a7778 # R-Car M1-A
- renesas,can-r8a7779 # R-Car H1
- const: renesas,rcar-gen1-can # R-Car Gen1
- items:
- enum:
- renesas,can-r8a7742 # RZ/G1H
- renesas,can-r8a7743 # RZ/G1M
- renesas,can-r8a7744 # RZ/G1N
- renesas,can-r8a7745 # RZ/G1E
- renesas,can-r8a77470 # RZ/G1C
- renesas,can-r8a7790 # R-Car H2
- renesas,can-r8a7791 # R-Car M2-W
- renesas,can-r8a7792 # R-Car V2H
- renesas,can-r8a7793 # R-Car M2-N
- renesas,can-r8a7794 # R-Car E2
- const: renesas,rcar-gen2-can # R-Car Gen2 and RZ/G1
- items:
- enum:
- renesas,can-r8a774a1 # RZ/G2M
- renesas,can-r8a774b1 # RZ/G2N
- renesas,can-r8a774c0 # RZ/G2E
- renesas,can-r8a774e1 # RZ/G2H
- renesas,can-r8a7795 # R-Car H3
- renesas,can-r8a7796 # R-Car M3-W
- renesas,can-r8a77961 # R-Car M3-W+
- renesas,can-r8a77965 # R-Car M3-N
- renesas,can-r8a77990 # R-Car E3
- renesas,can-r8a77995 # R-Car D3
- const: renesas,rcar-gen3-can # R-Car Gen3 and RZ/G2
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 3
clock-names:
items:
- const: clkp1
- const: clkp2
- const: can_clk
power-domains:
maxItems: 1
resets:
maxItems: 1
renesas,can-clock-select:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [ 0, 1, 3 ]
default: 0
description: |
R-Car CAN Clock Source Select. Valid values are:
<0x0> (default) : Peripheral clock (clkp1)
<0x1> : Peripheral clock (clkp2)
<0x3> : External input clock
assigned-clocks:
description:
Reference to the clkp2 (CANFD) clock.
On R-Car Gen3 and RZ/G2 SoCs, "clkp2" is the CANFD clock. This is a div6
clock and can be used by both CAN and CAN FD controllers at the same
time. It needs to be scaled to maximum frequency if any of these
controllers use it.
assigned-clock-rates:
description: Maximum frequency of the CANFD clock.
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- power-domains
allOf:
- $ref: can-controller.yaml#
- if:
not:
properties:
compatible:
contains:
const: renesas,rcar-gen1-can
then:
required:
- resets
- if:
properties:
compatible:
contains:
const: renesas,rcar-gen3-can
then:
required:
- assigned-clocks
- assigned-clock-rates
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/r8a7791-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a7791-sysc.h>
can0: can@e6e80000 {
compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
reg = <0xe6e80000 0x1000>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 916>,
<&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 916>;
};
|
