blob: ba84a4f70ebdee9d28cc5846e39ddac97b0e22f4 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
|
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2018-2022 TQ-Systems GmbH
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
*/
/*
* Common for
* - TQMa6ULxL
* - TQMa6ULLxL
*/
/ {
reg_vin: reg-vin {
compatible = "regulator-fixed";
regulator-name = "VIN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
&m24c64_50 {
vcc-supply = <®_vin>;
};
&m24c02_52 {
vcc-supply = <®_vin>;
};
/* eMMC */
&usdhc2 {
vmmc-supply = <®_vin>;
vqmmc-supply = <®_vldo4>;
};
&iomuxc {
pinctrl_qspi: qspigrp {
fsl,pins = <
MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x70a9
MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70a9
MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x70a9
MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x70a9
MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x70a9
MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x70a1
>;
};
};
|