blob: 2a1331ed1a5c0faca2eb76ba798da4daefa5c76c (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
|
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* Device Tree Source for the RZ/G2UL Type-1 SMARC EVK parts
*
* Copyright (C) 2022 Renesas Electronics Corp.
*/
#include "rzg2ul-smarc-pinfunction.dtsi"
#include "rz-smarc-common.dtsi"
#if (!SW_ET0_EN_N)
&canfd {
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-names;
status = "disabled";
};
#endif
&cpu_dai {
sound-dai = <&ssi1>;
};
&i2c1 {
wm8978: codec@1a {
compatible = "wlf,wm8978";
#sound-dai-cells = <0>;
reg = <0x1a>;
};
};
#if (SW_ET0_EN_N)
&ssi1 {
pinctrl-0 = <&ssi1_pins>;
pinctrl-names = "default";
status = "okay";
};
#else
&snd_rzg2l {
status = "disabled";
};
&spi1 {
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-names;
status = "disabled";
};
&ssi1 {
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-names;
status = "disabled";
};
#endif
&vccq_sdhi1 {
gpios = <&pinctrl RZG2L_GPIO(6, 1) GPIO_ACTIVE_HIGH>;
};
|