diff options
author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-27 10:05:51 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-27 10:05:51 +0000 |
commit | 5d1646d90e1f2cceb9f0828f4b28318cd0ec7744 (patch) | |
tree | a94efe259b9009378be6d90eb30d2b019d95c194 /tools/perf/pmu-events/arch/x86/westmereep-sp/memory.json | |
parent | Initial commit. (diff) | |
download | linux-5d1646d90e1f2cceb9f0828f4b28318cd0ec7744.tar.xz linux-5d1646d90e1f2cceb9f0828f4b28318cd0ec7744.zip |
Adding upstream version 5.10.209.upstream/5.10.209
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/westmereep-sp/memory.json')
-rw-r--r-- | tools/perf/pmu-events/arch/x86/westmereep-sp/memory.json | 739 |
1 files changed, 739 insertions, 0 deletions
diff --git a/tools/perf/pmu-events/arch/x86/westmereep-sp/memory.json b/tools/perf/pmu-events/arch/x86/westmereep-sp/memory.json new file mode 100644 index 000000000..90eb6aac3 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/westmereep-sp/memory.json @@ -0,0 +1,739 @@ +[ + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x6011", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.ANY_DATA.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore data reads satisfied by any DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0xF811", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.ANY_DATA.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore data reads that missed the LLC", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x2011", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.ANY_DATA.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore data reads satisfied by the local DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x4011", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.ANY_DATA.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore data reads satisfied by a remote DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x6044", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore code reads satisfied by any DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0xF844", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore code reads that missed the LLC", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x2044", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore code reads satisfied by the local DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x4044", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore code reads satisfied by a remote DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x60FF", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore requests satisfied by any DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0xF8FF", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore requests that missed the LLC", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x20FF", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore requests satisfied by the local DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x40FF", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore requests satisfied by a remote DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x6022", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore RFO requests satisfied by any DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0xF822", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore RFO requests that missed the LLC", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x2022", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore RFO requests satisfied by the local DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x4022", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore RFO requests satisfied by a remote DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x6008", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.COREWB.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore writebacks to any DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0xF808", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.COREWB.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore writebacks that missed the LLC", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x2008", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.COREWB.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore writebacks to the local DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x4008", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.COREWB.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore writebacks to a remote DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x6077", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore code or data read requests satisfied by any DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0xF877", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore code or data read requests that missed the LLC", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x2077", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore code or data read requests satisfied by the local DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x4077", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore code or data read requests satisfied by a remote DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x6033", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DATA_IN.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore request = all data, response = any DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0xF833", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DATA_IN.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore request = all data, response = any LLC miss", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x2033", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DATA_IN.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore data reads, RFO's and prefetches statisfied by the local DRAM.", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x4033", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DATA_IN.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore data reads, RFO's and prefetches statisfied by the remote DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x6003", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore demand data requests satisfied by any DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0xF803", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore demand data requests that missed the LLC", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x2003", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore demand data requests satisfied by the local DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x4003", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore demand data requests satisfied by a remote DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x6001", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore demand data reads satisfied by any DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0xF801", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore demand data reads that missed the LLC", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x2001", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore demand data reads satisfied by the local DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x4001", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore demand data reads satisfied by a remote DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x6004", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore demand code reads satisfied by any DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0xF804", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore demand code reads that missed the LLC", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x2004", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore demand code reads satisfied by the local DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x4004", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore demand code reads satisfied by a remote DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x6002", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore demand RFO requests satisfied by any DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0xF802", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore demand RFO requests that missed the LLC", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x2002", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore demand RFO requests satisfied by the local DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x4002", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore demand RFO requests satisfied by a remote DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x6080", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.OTHER.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore other requests satisfied by any DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0xF880", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.OTHER.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore other requests that missed the LLC", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x4080", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.OTHER.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore other requests satisfied by a remote DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x6050", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.PF_DATA.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore prefetch data requests satisfied by any DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0xF850", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.PF_DATA.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore prefetch data requests that missed the LLC", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x2050", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.PF_DATA.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore prefetch data requests satisfied by the local DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x4050", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.PF_DATA.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore prefetch data requests satisfied by a remote DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x6010", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore prefetch data reads satisfied by any DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0xF810", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore prefetch data reads that missed the LLC", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x2010", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore prefetch data reads satisfied by the local DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x4010", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore prefetch data reads satisfied by a remote DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0x6040", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": "OFFCORE_RESPONSE.PF_IFETCH.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "SampleAfterValue": "100000", + "BriefDescription": "Offcore prefetch code reads satisfied by any DRAM", + "Offcore": "1" + }, + { + "EventCode": "0xB7, 0xBB", + "MSRValue": "0xF840", + "Counter": "0,1,2,3", + "UMask": "0x1", + "EventName": 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\ No newline at end of file |