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-rw-r--r--drivers/pinctrl/renesas/core.h36
1 files changed, 36 insertions, 0 deletions
diff --git a/drivers/pinctrl/renesas/core.h b/drivers/pinctrl/renesas/core.h
new file mode 100644
index 000000000..b5b1d163e
--- /dev/null
+++ b/drivers/pinctrl/renesas/core.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * SuperH Pin Function Controller support.
+ *
+ * Copyright (C) 2012 Renesas Solutions Corp.
+ */
+#ifndef __SH_PFC_CORE_H__
+#define __SH_PFC_CORE_H__
+
+#include <linux/types.h>
+
+#include "sh_pfc.h"
+
+struct sh_pfc_pin_range {
+ u16 start;
+ u16 end;
+};
+
+int sh_pfc_register_gpiochip(struct sh_pfc *pfc);
+
+int sh_pfc_register_pinctrl(struct sh_pfc *pfc);
+
+u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width);
+void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width,
+ u32 data);
+u32 sh_pfc_read(struct sh_pfc *pfc, u32 reg);
+void sh_pfc_write(struct sh_pfc *pfc, u32 reg, u32 data);
+
+int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin);
+int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type);
+
+const struct pinmux_bias_reg *
+sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
+ unsigned int *bit);
+
+#endif /* __SH_PFC_CORE_H__ */