summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/r8a7742-iwg21m.dtsi
blob: 5621c9ed698f0e4aa969ae85e29f6252c882d590 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for the iWave RZ/G1H Qseven SOM
 *
 * Copyright (C) 2020 Renesas Electronics Corp.
 */

#include "r8a7742.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	compatible = "iwave,g21m", "renesas,r8a7742";

	memory@40000000 {
		device_type = "memory";
		reg = <0 0x40000000 0 0x40000000>;
	};

	memory@200000000 {
		device_type = "memory";
		reg = <2 0x00000000 0 0x40000000>;
	};

	reg_3p3v: 3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		regulator-boot-on;
	};
};

&extal_clk {
	clock-frequency = <20000000>;
};

&gpio0 {
	/* GP0_18 set low to select QSPI. Doing so will disable VIN2 */
	qspi_en {
		gpio-hog;
		gpios = <18 GPIO_ACTIVE_HIGH>;
		output-low;
		line-name = "QSPI_EN";
	};
};

&i2c0 {
	pinctrl-0 = <&i2c0_pins>;
	pinctrl-names = "default";

	status = "okay";
	clock-frequency = <400000>;

	rtc@68 {
		compatible = "ti,bq32000";
		reg = <0x68>;
		interrupt-parent = <&gpio1>;
		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
	};
};

&mmcif1 {
	pinctrl-0 = <&mmc1_pins>;
	pinctrl-names = "default";

	vmmc-supply = <&reg_3p3v>;
	bus-width = <4>;
	non-removable;
	status = "okay";
};

&pfc {
	i2c0_pins: i2c0 {
		groups = "i2c0";
		function = "i2c0";
	};

	mmc1_pins: mmc1 {
		groups = "mmc1_data4", "mmc1_ctrl";
		function = "mmc1";
	};

	qspi_pins: qspi {
		groups = "qspi_ctrl", "qspi_data2";
		function = "qspi";
	};
};

&qspi {
	pinctrl-0 = <&qspi_pins>;
	pinctrl-names = "default";

	status = "okay";

	flash: flash@0 {
		compatible = "sst,sst25vf016b", "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <50000000>;
		m25p,fast-read;
		spi-cpol;
		spi-cpha;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "bootloader";
				reg = <0x00000000 0x000c0000>;
				read-only;
			};
			partition@c0000 {
				label = "env";
				reg = <0x000c0000 0x00002000>;
			};
			partition@c2000 {
				label = "user";
				reg = <0x000c2000 0x0013e000>;
			};
		};
	};
};