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-rw-r--r--tests/expected/lscpu/lscpu-armv727
-rw-r--r--tests/expected/lscpu/lscpu-ppc-qemu20
-rw-r--r--tests/expected/lscpu/lscpu-ppc64-POWER753
-rw-r--r--tests/expected/lscpu/lscpu-ppc64-POWER7-64cpu152
-rw-r--r--tests/expected/lscpu/lscpu-s390-kvm31
-rw-r--r--tests/expected/lscpu/lscpu-s390-lpar60
-rw-r--r--tests/expected/lscpu/lscpu-s390-lpar-drawer52
-rw-r--r--tests/expected/lscpu/lscpu-s390-nested-virt45
-rw-r--r--tests/expected/lscpu/lscpu-s390-zvm33
-rw-r--r--tests/expected/lscpu/lscpu-sparc6430
-rw-r--r--tests/expected/lscpu/lscpu-vbox-win38
-rw-r--r--tests/expected/lscpu/lscpu-vmware_fpe76
-rw-r--r--tests/expected/lscpu/lscpu-x86_64-64cpu164
-rw-r--r--tests/expected/lscpu/lscpu-x86_64-dell_e431042
-rw-r--r--tests/expected/lscpu/lscpu-x86_64-epyc_7451239
15 files changed, 1062 insertions, 0 deletions
diff --git a/tests/expected/lscpu/lscpu-armv7 b/tests/expected/lscpu/lscpu-armv7
new file mode 100644
index 0000000..5d1b7f9
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-armv7
@@ -0,0 +1,27 @@
+CPU(s): 2
+On-line CPU(s) list: 0,1
+Thread(s) per core: 1
+Core(s) per socket: 2
+Socket(s): 1
+Vendor ID: ARM
+Model: 4
+Model name: Cortex-A15
+Stepping: r0p4
+CPU max MHz: 1700.0000
+CPU min MHz: 200.0000
+BogoMIPS: 1694.10
+Flags: swp half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpv4 idiva idivt
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node
+0,0,0,
+1,1,0,
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node
+0,0,0,
+1,1,0,
diff --git a/tests/expected/lscpu/lscpu-ppc-qemu b/tests/expected/lscpu/lscpu-ppc-qemu
new file mode 100644
index 0000000..ab935e5
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-ppc-qemu
@@ -0,0 +1,20 @@
+CPU(s): 1
+On-line CPU(s) list: 0
+Thread(s) per core: 1
+Core(s) per socket: 1
+Socket(s): 1
+Model: 3.1 (pvr 0008 0301)
+Model name: 740/750
+BogoMIPS: 33.25
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i
+0,0,0,,,0,0
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i
+0,0,-,,,0,0
diff --git a/tests/expected/lscpu/lscpu-ppc64-POWER7 b/tests/expected/lscpu/lscpu-ppc64-POWER7
new file mode 100644
index 0000000..f1668a4
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-ppc64-POWER7
@@ -0,0 +1,53 @@
+CPU(s): 16
+On-line CPU(s) list: 0-15
+Thread(s) per core: 4
+Core(s) per socket: 1
+Socket(s): 4
+NUMA node(s): 1
+Model: 2.1 (pvr 003f 0201)
+Model name: POWER7 (architected), altivec supported
+L1d cache: 128 KiB
+L1i cache: 128 KiB
+NUMA node0 CPU(s): 0-15
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i
+0,0,0,0,,0,0
+1,0,0,0,,0,0
+2,0,0,0,,0,0
+3,0,0,0,,0,0
+4,1,1,0,,1,1
+5,1,1,0,,1,1
+6,1,1,0,,1,1
+7,1,1,0,,1,1
+8,2,2,0,,2,2
+9,2,2,0,,2,2
+10,2,2,0,,2,2
+11,2,2,0,,2,2
+12,3,3,0,,3,3
+13,3,3,0,,3,3
+14,3,3,0,,3,3
+15,3,3,0,,3,3
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i
+0,0,-,0,,0,0
+1,0,-,0,,0,0
+2,0,-,0,,0,0
+3,0,-,0,,0,0
+4,4,-,0,,1,1
+5,4,-,0,,1,1
+6,4,-,0,,1,1
+7,4,-,0,,1,1
+8,8,-,0,,2,2
+9,8,-,0,,2,2
+10,8,-,0,,2,2
+11,8,-,0,,2,2
+12,12,-,0,,3,3
+13,12,-,0,,3,3
+14,12,-,0,,3,3
+15,12,-,0,,3,3
diff --git a/tests/expected/lscpu/lscpu-ppc64-POWER7-64cpu b/tests/expected/lscpu/lscpu-ppc64-POWER7-64cpu
new file mode 100644
index 0000000..fdda27c
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-ppc64-POWER7-64cpu
@@ -0,0 +1,152 @@
+CPU(s): 64
+On-line CPU(s) list: 0-63
+Thread(s) per core: 4
+Core(s) per socket: 1
+Socket(s): 16
+NUMA node(s): 2
+Model: 2.1 (pvr 003f 0201)
+Model name: POWER7 (architected), altivec supported
+Hypervisor vendor: pHyp
+Virtualization type: para
+L1d cache: 512 KiB
+L1i cache: 512 KiB
+NUMA node0 CPU(s): 0-63
+NUMA node1 CPU(s):
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i
+0,0,0,0,,0,0
+1,0,0,0,,0,0
+2,0,0,0,,0,0
+3,0,0,0,,0,0
+4,1,1,0,,1,1
+5,1,1,0,,1,1
+6,1,1,0,,1,1
+7,1,1,0,,1,1
+8,2,2,0,,2,2
+9,2,2,0,,2,2
+10,2,2,0,,2,2
+11,2,2,0,,2,2
+12,3,3,0,,3,3
+13,3,3,0,,3,3
+14,3,3,0,,3,3
+15,3,3,0,,3,3
+16,4,4,0,,4,4
+17,4,4,0,,4,4
+18,4,4,0,,4,4
+19,4,4,0,,4,4
+20,5,5,0,,5,5
+21,5,5,0,,5,5
+22,5,5,0,,5,5
+23,5,5,0,,5,5
+24,6,6,0,,6,6
+25,6,6,0,,6,6
+26,6,6,0,,6,6
+27,6,6,0,,6,6
+28,7,7,0,,7,7
+29,7,7,0,,7,7
+30,7,7,0,,7,7
+31,7,7,0,,7,7
+32,8,8,0,,8,8
+33,8,8,0,,8,8
+34,8,8,0,,8,8
+35,8,8,0,,8,8
+36,9,9,0,,9,9
+37,9,9,0,,9,9
+38,9,9,0,,9,9
+39,9,9,0,,9,9
+40,10,10,0,,10,10
+41,10,10,0,,10,10
+42,10,10,0,,10,10
+43,10,10,0,,10,10
+44,11,11,0,,11,11
+45,11,11,0,,11,11
+46,11,11,0,,11,11
+47,11,11,0,,11,11
+48,12,12,0,,12,12
+49,12,12,0,,12,12
+50,12,12,0,,12,12
+51,12,12,0,,12,12
+52,13,13,0,,13,13
+53,13,13,0,,13,13
+54,13,13,0,,13,13
+55,13,13,0,,13,13
+56,14,14,0,,14,14
+57,14,14,0,,14,14
+58,14,14,0,,14,14
+59,14,14,0,,14,14
+60,15,15,0,,15,15
+61,15,15,0,,15,15
+62,15,15,0,,15,15
+63,15,15,0,,15,15
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i
+0,0,-,0,,0,0
+1,0,-,0,,0,0
+2,0,-,0,,0,0
+3,0,-,0,,0,0
+4,4,-,0,,1,1
+5,4,-,0,,1,1
+6,4,-,0,,1,1
+7,4,-,0,,1,1
+8,8,-,0,,2,2
+9,8,-,0,,2,2
+10,8,-,0,,2,2
+11,8,-,0,,2,2
+12,12,-,0,,3,3
+13,12,-,0,,3,3
+14,12,-,0,,3,3
+15,12,-,0,,3,3
+16,16,-,0,,4,4
+17,16,-,0,,4,4
+18,16,-,0,,4,4
+19,16,-,0,,4,4
+20,20,-,0,,5,5
+21,20,-,0,,5,5
+22,20,-,0,,5,5
+23,20,-,0,,5,5
+24,24,-,0,,6,6
+25,24,-,0,,6,6
+26,24,-,0,,6,6
+27,24,-,0,,6,6
+28,28,-,0,,7,7
+29,28,-,0,,7,7
+30,28,-,0,,7,7
+31,28,-,0,,7,7
+32,32,-,0,,8,8
+33,32,-,0,,8,8
+34,32,-,0,,8,8
+35,32,-,0,,8,8
+36,36,-,0,,9,9
+37,36,-,0,,9,9
+38,36,-,0,,9,9
+39,36,-,0,,9,9
+40,40,-,0,,10,10
+41,40,-,0,,10,10
+42,40,-,0,,10,10
+43,40,-,0,,10,10
+44,44,-,0,,11,11
+45,44,-,0,,11,11
+46,44,-,0,,11,11
+47,44,-,0,,11,11
+48,48,-,0,,12,12
+49,48,-,0,,12,12
+50,48,-,0,,12,12
+51,48,-,0,,12,12
+52,52,-,0,,13,13
+53,52,-,0,,13,13
+54,52,-,0,,13,13
+55,52,-,0,,13,13
+56,56,-,0,,14,14
+57,56,-,0,,14,14
+58,56,-,0,,14,14
+59,56,-,0,,14,14
+60,60,-,0,,15,15
+61,60,-,0,,15,15
+62,60,-,0,,15,15
+63,60,-,0,,15,15
diff --git a/tests/expected/lscpu/lscpu-s390-kvm b/tests/expected/lscpu/lscpu-s390-kvm
new file mode 100644
index 0000000..661d84d
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-s390-kvm
@@ -0,0 +1,31 @@
+CPU op-mode(s): 32-bit, 64-bit
+CPU(s): 3
+On-line CPU(s) list: 0-2
+Thread(s) per core: 1
+Core(s) per socket: 1
+Socket(s) per book: 1
+Book(s): 3
+Vendor ID: IBM/S390
+Machine type: 2817
+BogoMIPS: 14367.00
+Hypervisor: KVM/Linux
+Hypervisor vendor: KVM
+Virtualization type: full
+Dispatching mode: horizontal
+Flags: esan3 zarch stfle msa ldisp eimm dfp edat etf3eh highgprs
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node
+0,0,0,
+1,1,1,
+2,2,2,
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node
+0,0,-,
+1,0,-,
+2,0,-,
diff --git a/tests/expected/lscpu/lscpu-s390-lpar b/tests/expected/lscpu/lscpu-s390-lpar
new file mode 100644
index 0000000..af02cf5
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-s390-lpar
@@ -0,0 +1,60 @@
+CPU op-mode(s): 32-bit, 64-bit
+CPU(s): 20
+On-line CPU(s) list: 1-5,8-19
+Off-line CPU(s) list: 0,6,7
+Thread(s) per core: 1
+Core(s) per socket: 4
+Socket(s) per book: 6
+Book(s): 4
+Vendor ID: IBM/S390
+Machine type: 2817
+BogoMIPS: 14367.00
+Hypervisor: PR/SM
+Hypervisor vendor: IBM
+Virtualization type: full
+Dispatching mode: vertical
+Flags: esan3 zarch stfle msa ldisp eimm dfp etf3eh highgprs
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node
+1,0,0,
+2,1,0,
+3,2,1,
+4,3,1,
+5,4,1,
+8,5,2,
+9,6,2,
+10,7,2,
+11,8,3,
+12,9,3,
+13,10,3,
+14,11,3,
+15,12,4,
+16,13,5,
+17,14,5,
+18,15,5,
+19,16,6,
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node
+1,1,-,
+2,1,-,
+3,2,-,
+4,2,-,
+5,2,-,
+8,1,-,
+9,1,-,
+10,1,-,
+11,2,-,
+12,2,-,
+13,2,-,
+14,2,-,
+15,3,-,
+16,4,-,
+17,4,-,
+18,4,-,
+19,6,-,
diff --git a/tests/expected/lscpu/lscpu-s390-lpar-drawer b/tests/expected/lscpu/lscpu-s390-lpar-drawer
new file mode 100644
index 0000000..df068fa
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-s390-lpar-drawer
@@ -0,0 +1,52 @@
+CPU op-mode(s): 32-bit, 64-bit
+CPU(s): 8
+On-line CPU(s) list: 0-7
+Thread(s) per core: 1
+Core(s) per socket: 8
+Socket(s) per book: 3
+Book(s) per drawer: 2
+Drawer(s): 4
+NUMA node(s): 1
+Vendor ID: IBM/S390
+Machine type: 2964
+CPU dynamic MHz: 5000
+CPU static MHz: 5000
+BogoMIPS: 20325.00
+Hypervisor: PR/SM
+Hypervisor vendor: IBM
+Virtualization type: full
+Dispatching mode: horizontal
+L1d cache: 1 MiB
+L1i cache: 768 KiB
+L2d cache: 16 MiB
+L2i cache: 16 MiB
+L3 cache: 64 MiB
+L4 cache: 480 MiB
+NUMA node0 CPU(s): 0-140
+Flags: esan3 zarch stfle msa ldisp eimm dfp edat etf3eh highgprs te vx sie
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2d,L2i
+0,0,0,0,,0,0,0,0
+1,1,0,0,,1,1,1,1
+2,2,1,0,,2,2,2,2
+3,3,1,0,,3,3,3,3
+4,4,1,0,,4,4,4,4
+5,5,1,0,,5,5,5,5
+6,6,1,0,,6,6,6,6
+7,7,1,0,,7,7,7,7
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2d,L2i
+0,0,2,0,,0,0,0,0
+1,1,2,0,,1,1,1,1
+2,2,3,0,,2,2,2,2
+3,3,3,0,,3,3,3,3
+4,4,3,0,,4,4,4,4
+5,5,3,0,,5,5,5,5
+6,6,3,0,,6,6,6,6
+7,7,3,0,,7,7,7,7
diff --git a/tests/expected/lscpu/lscpu-s390-nested-virt b/tests/expected/lscpu/lscpu-s390-nested-virt
new file mode 100644
index 0000000..2665fd8
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-s390-nested-virt
@@ -0,0 +1,45 @@
+CPU op-mode(s): 32-bit, 64-bit
+CPU(s): 2
+On-line CPU(s) list: 0,1
+Thread(s) per core: 1
+Core(s) per socket: 1
+Socket(s) per book: 1
+Book(s) per drawer: 1
+Drawer(s): 2
+NUMA node(s): 1
+Vendor ID: IBM/S390
+Machine type: 2964
+CPU dynamic MHz: 5000
+CPU static MHz: 5000
+BogoMIPS: 3033.00
+Hypervisor: KVM/Linux
+Hypervisor vendor: KVM
+Virtualization type: full
+Dispatching mode: horizontal
+L1d cache: 256 KiB
+L1i cache: 192 KiB
+L2d cache: 4 MiB
+L2i cache: 4 MiB
+L3 cache: 64 MiB
+L4 cache: 480 MiB
+NUMA node0 CPU(s): 0,1
+Vulnerability L1tf: Not affected
+Vulnerability Meltdown: Not affected
+Vulnerability Spec store bypass: Not affected
+Vulnerability Spectre v1: Mitigation; __user pointer sanitization
+Vulnerability Spectre v2: Mitigation; execute trampolines
+Flags: esan3 zarch stfle msa ldisp eimm dfp edat etf3eh highgprs te vx
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2d,L2i
+0,0,0,0,,0,0,0,0
+1,1,1,0,,1,1,1,1
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2d,L2i
+0,0,0,0,,0,0,0,0
+1,1,1,0,,1,1,1,1
diff --git a/tests/expected/lscpu/lscpu-s390-zvm b/tests/expected/lscpu/lscpu-s390-zvm
new file mode 100644
index 0000000..5242b30
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-s390-zvm
@@ -0,0 +1,33 @@
+CPU op-mode(s): 32-bit, 64-bit
+CPU(s): 4
+On-line CPU(s) list: 0-3
+Thread(s) per core: 1
+Core(s) per socket: 1
+Socket(s) per book: 1
+Book(s): 4
+Vendor ID: IBM/S390
+Machine type: 2817
+BogoMIPS: 14367.00
+Hypervisor: z/VM 6.1.0
+Hypervisor vendor: IBM
+Virtualization type: full
+Dispatching mode: horizontal
+Flags: esan3 zarch stfle msa ldisp eimm dfp etf3eh highgprs
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node
+0,0,0,
+1,1,1,
+2,2,2,
+3,3,3,
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node
+0,0,-,
+1,0,-,
+2,0,-,
+3,0,-,
diff --git a/tests/expected/lscpu/lscpu-sparc64 b/tests/expected/lscpu/lscpu-sparc64
new file mode 100644
index 0000000..a12c136
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-sparc64
@@ -0,0 +1,30 @@
+CPU op-mode(s): 32-bit, 64-bit
+CPU(s): 6
+On-line CPU(s) list: 6,7,10,11,14,15
+Thread(s) per core: 1
+Core(s) per socket: 1
+Socket(s): 6
+Model name: TI UltraSparc II (BlackBird)
+Flags: sun4u
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node
+6,0,0,
+7,1,1,
+10,2,2,
+11,3,3,
+14,4,4,
+15,5,5,
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node
+6,0,-,
+7,0,-,
+10,0,-,
+11,0,-,
+14,0,-,
+15,0,-,
diff --git a/tests/expected/lscpu/lscpu-vbox-win b/tests/expected/lscpu/lscpu-vbox-win
new file mode 100644
index 0000000..c0969c9
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-vbox-win
@@ -0,0 +1,38 @@
+CPU op-mode(s): 32-bit, 64-bit
+Address sizes: 36 bits physical, 48 bits virtual
+CPU(s): 2
+On-line CPU(s) list: 0,1
+Thread(s) per core: 1
+Core(s) per socket: 2
+Socket(s): 1
+NUMA node(s): 1
+Vendor ID: GenuineIntel
+CPU family: 6
+Model: 58
+Model name: Intel(R) Core(TM) i5-3317U CPU @ 1.70GHz
+Stepping: 9
+CPU MHz: 1600.000
+CPU max MHz: 3800.0000
+CPU min MHz: 1600.0000
+BogoMIPS: 3355.62
+Hypervisor vendor: Oracle
+Virtualization type: full
+L1d cache: 64 KiB
+L1d cache: 64 KiB
+L2d cache: 6 MiB
+NUMA node0 CPU(s): 0,1
+Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx rdtscp lm constant_tsc rep_good nopl pni ssse3 lahf_lm
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1d,L2d
+0,0,0,0,,0,0,0
+1,1,0,0,,1,1,0
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1d,L2d
+0,0,0,0,,0,0,0
+1,1,0,0,,1,1,0
diff --git a/tests/expected/lscpu/lscpu-vmware_fpe b/tests/expected/lscpu/lscpu-vmware_fpe
new file mode 100644
index 0000000..2b68db2
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-vmware_fpe
@@ -0,0 +1,76 @@
+CPU op-mode(s): 32-bit, 64-bit
+Address sizes: 48 bits physical, 48 bits virtual
+CPU(s): 16
+On-line CPU(s) list: 0-15
+Thread(s) per core: 2
+Core(s) per socket: 4
+Socket(s): 2
+NUMA node(s): 4
+Vendor ID: AuthenticAMD
+CPU family: 21
+Model: 2
+Model name: AMD Opteron(tm) Processor 6328
+Stepping: 0
+Frequency boost: enabled
+CPU MHz: 1605.776
+CPU max MHz: 3200.0000
+CPU min MHz: 1400.0000
+BogoMIPS: 6399.69
+Virtualization: AMD-V
+L1d cache: 128 KiB
+L1i cache: 512 KiB
+L2 cache: 16 MiB
+L3 cache: 24 MiB
+NUMA node0 CPU(s): 0-3
+NUMA node1 CPU(s): 4-7
+NUMA node2 CPU(s): 8-11
+NUMA node3 CPU(s): 12-15
+Vulnerability L1tf: Not affected
+Vulnerability Mds: Not affected
+Vulnerability Meltdown: Not affected
+Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl and seccomp
+Vulnerability Spectre v1: Mitigation; __user pointer sanitization
+Vulnerability Spectre v2: Mitigation; Full AMD retpoline, IBPB conditional, STIBP disabled, RSB filling
+Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid amd_dcm aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 popcnt aes xsave avx f16c lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs xop skinit wdt fma4 tce nodeid_msr tbm topoext perfctr_core perfctr_nb cpb hw_pstate ssbd ibpb vmmcall bmi1 arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,0,,0,0,0,0
+1,0,0,0,,1,0,0,0
+2,1,0,0,,2,1,1,0
+3,1,0,0,,3,1,1,0
+4,2,0,1,,4,2,2,1
+5,2,0,1,,5,2,2,1
+6,3,0,1,,6,3,3,1
+7,3,0,1,,7,3,3,1
+8,4,1,2,,8,4,4,2
+9,4,1,2,,9,4,4,2
+10,5,1,2,,10,5,5,2
+11,5,1,2,,11,5,5,2
+12,6,1,3,,12,6,6,3
+13,6,1,3,,13,6,6,3
+14,7,1,3,,14,7,7,3
+15,7,1,3,,15,7,7,3
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,0,,0,0,0,0
+1,1,0,0,,1,0,0,0
+2,2,0,0,,2,1,1,0
+3,3,0,0,,3,1,1,0
+4,0,0,1,,4,2,2,1
+5,1,0,1,,5,2,2,1
+6,2,0,1,,6,3,3,1
+7,3,0,1,,7,3,3,1
+8,0,1,2,,8,4,4,2
+9,1,1,2,,9,4,4,2
+10,2,1,2,,10,5,5,2
+11,3,1,2,,11,5,5,2
+12,0,1,3,,12,6,6,3
+13,1,1,3,,13,6,6,3
+14,2,1,3,,14,7,7,3
+15,3,1,3,,15,7,7,3
diff --git a/tests/expected/lscpu/lscpu-x86_64-64cpu b/tests/expected/lscpu/lscpu-x86_64-64cpu
new file mode 100644
index 0000000..75704f0
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-x86_64-64cpu
@@ -0,0 +1,164 @@
+CPU op-mode(s): 32-bit, 64-bit
+Address sizes: 44 bits physical, 48 bits virtual
+CPU(s): 64
+On-line CPU(s) list: 0-63
+Thread(s) per core: 2
+Core(s) per socket: 8
+Socket(s): 4
+NUMA node(s): 3
+Vendor ID: GenuineIntel
+CPU family: 6
+Model: 46
+Model name: Intel(R) Xeon(R) CPU X7550 @ 2.00GHz
+Stepping: 6
+CPU MHz: 1064.000
+CPU max MHz: 1996.0000
+CPU min MHz: 1064.0000
+BogoMIPS: 3990.31
+Virtualization: VT-x
+L1d cache: 1 MiB
+L1i cache: 1 MiB
+L2 cache: 8 MiB
+L3 cache: 72 MiB
+NUMA node0 CPU(s): 0,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32,34,36,38,40,42,44,46,48,50,52,54,56,58,60,62
+NUMA node2 CPU(s): 1,5,9,13,17,21,25,29,33,37,41,45,49,53,57,61
+NUMA node3 CPU(s): 3,7,11,15,19,23,27,31,35,39,43,47,51,55,59,63
+Flags: fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx rdtscp lm constant_tsc arch_perfmon pebs bts rep_good xtopology nonstop_tsc aperfmperf pni dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 x2apic popcnt lahf_lm ida epb dts tpr_shadow vnmi flexpriority ept vpid
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,0,,0,0,0,0
+1,1,1,2,,1,1,1,1
+2,2,2,0,,2,2,2,2
+3,3,3,3,,3,3,3,3
+4,4,0,0,,4,4,4,0
+5,5,1,2,,5,5,5,1
+6,6,2,0,,6,6,6,2
+7,7,3,3,,7,7,7,3
+8,8,0,0,,8,8,8,0
+9,9,1,2,,9,9,9,1
+10,10,2,0,,10,10,10,2
+11,11,3,3,,11,11,11,3
+12,12,0,0,,12,12,12,0
+13,13,1,2,,13,13,13,1
+14,14,2,0,,14,14,14,2
+15,15,3,3,,15,15,15,3
+16,16,0,0,,16,16,16,0
+17,17,1,2,,17,17,17,1
+18,18,2,0,,18,18,18,2
+19,19,3,3,,19,19,19,3
+20,20,0,0,,20,20,20,0
+21,21,1,2,,21,21,21,1
+22,22,2,0,,22,22,22,2
+23,23,3,3,,23,23,23,3
+24,24,0,0,,24,24,24,0
+25,25,1,2,,25,25,25,1
+26,26,2,0,,26,26,26,2
+27,27,3,3,,27,27,27,3
+28,28,0,0,,28,28,28,0
+29,29,1,2,,29,29,29,1
+30,30,2,0,,30,30,30,2
+31,31,3,3,,31,31,31,3
+32,0,0,0,,0,0,0,0
+33,1,1,2,,1,1,1,1
+34,2,2,0,,2,2,2,2
+35,3,3,3,,3,3,3,3
+36,4,0,0,,4,4,4,0
+37,5,1,2,,5,5,5,1
+38,6,2,0,,6,6,6,2
+39,7,3,3,,7,7,7,3
+40,8,0,0,,8,8,8,0
+41,9,1,2,,9,9,9,1
+42,10,2,0,,10,10,10,2
+43,11,3,3,,11,11,11,3
+44,12,0,0,,12,12,12,0
+45,13,1,2,,13,13,13,1
+46,14,2,0,,14,14,14,2
+47,15,3,3,,15,15,15,3
+48,16,0,0,,16,16,16,0
+49,17,1,2,,17,17,17,1
+50,18,2,0,,18,18,18,2
+51,19,3,3,,19,19,19,3
+52,20,0,0,,20,20,20,0
+53,21,1,2,,21,21,21,1
+54,22,2,0,,22,22,22,2
+55,23,3,3,,23,23,23,3
+56,24,0,0,,24,24,24,0
+57,25,1,2,,25,25,25,1
+58,26,2,0,,26,26,26,2
+59,27,3,3,,27,27,27,3
+60,28,0,0,,28,28,28,0
+61,29,1,2,,29,29,29,1
+62,30,2,0,,30,30,30,2
+63,31,3,3,,31,31,31,3
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,0,,0,0,0,0
+1,0,2,2,,1,1,1,1
+2,0,1,0,,2,2,2,2
+3,0,3,3,,3,3,3,3
+4,8,0,0,,4,4,4,0
+5,8,2,2,,5,5,5,1
+6,8,1,0,,6,6,6,2
+7,8,3,3,,7,7,7,3
+8,2,0,0,,8,8,8,0
+9,2,2,2,,9,9,9,1
+10,2,1,0,,10,10,10,2
+11,2,3,3,,11,11,11,3
+12,10,0,0,,12,12,12,0
+13,10,2,2,,13,13,13,1
+14,10,1,0,,14,14,14,2
+15,10,3,3,,15,15,15,3
+16,1,0,0,,16,16,16,0
+17,1,2,2,,17,17,17,1
+18,1,1,0,,18,18,18,2
+19,1,3,3,,19,19,19,3
+20,9,0,0,,20,20,20,0
+21,9,2,2,,21,21,21,1
+22,9,1,0,,22,22,22,2
+23,9,3,3,,23,23,23,3
+24,3,0,0,,24,24,24,0
+25,3,2,2,,25,25,25,1
+26,3,1,0,,26,26,26,2
+27,3,3,3,,27,27,27,3
+28,11,0,0,,28,28,28,0
+29,11,2,2,,29,29,29,1
+30,11,1,0,,30,30,30,2
+31,11,3,3,,31,31,31,3
+32,0,0,0,,0,0,0,0
+33,0,2,2,,1,1,1,1
+34,0,1,0,,2,2,2,2
+35,0,3,3,,3,3,3,3
+36,8,0,0,,4,4,4,0
+37,8,2,2,,5,5,5,1
+38,8,1,0,,6,6,6,2
+39,8,3,3,,7,7,7,3
+40,2,0,0,,8,8,8,0
+41,2,2,2,,9,9,9,1
+42,2,1,0,,10,10,10,2
+43,2,3,3,,11,11,11,3
+44,10,0,0,,12,12,12,0
+45,10,2,2,,13,13,13,1
+46,10,1,0,,14,14,14,2
+47,10,3,3,,15,15,15,3
+48,1,0,0,,16,16,16,0
+49,1,2,2,,17,17,17,1
+50,1,1,0,,18,18,18,2
+51,1,3,3,,19,19,19,3
+52,9,0,0,,20,20,20,0
+53,9,2,2,,21,21,21,1
+54,9,1,0,,22,22,22,2
+55,9,3,3,,23,23,23,3
+56,3,0,0,,24,24,24,0
+57,3,2,2,,25,25,25,1
+58,3,1,0,,26,26,26,2
+59,3,3,3,,27,27,27,3
+60,11,0,0,,28,28,28,0
+61,11,2,2,,29,29,29,1
+62,11,1,0,,30,30,30,2
+63,11,3,3,,31,31,31,3
diff --git a/tests/expected/lscpu/lscpu-x86_64-dell_e4310 b/tests/expected/lscpu/lscpu-x86_64-dell_e4310
new file mode 100644
index 0000000..f62bc3f
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-x86_64-dell_e4310
@@ -0,0 +1,42 @@
+CPU op-mode(s): 32-bit, 64-bit
+Address sizes: 36 bits physical, 48 bits virtual
+CPU(s): 4
+On-line CPU(s) list: 0-3
+Thread(s) per core: 2
+Core(s) per socket: 2
+Socket(s): 1
+NUMA node(s): 1
+Vendor ID: GenuineIntel
+CPU family: 6
+Model: 37
+Model name: Intel(R) Core(TM) i5 CPU M 560 @ 2.67GHz
+Stepping: 5
+CPU MHz: 1199.000
+CPU max MHz: 2667.0000
+CPU min MHz: 1199.0000
+BogoMIPS: 5319.92
+Virtualization: VT-x
+L1d cache: 64 KiB
+L1i cache: 64 KiB
+L2 cache: 512 KiB
+L3 cache: 3 MiB
+NUMA node0 CPU(s): 0-3
+Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 popcnt aes lahf_lm ida arat dts tpr_shadow vnmi flexpriority ept vpid
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,0,,0,0,0,0
+1,1,0,0,,1,1,1,0
+2,0,0,0,,0,0,0,0
+3,1,0,0,,1,1,1,0
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,0,,0,0,0,0
+1,2,0,0,,1,1,1,0
+2,0,0,0,,0,0,0,0
+3,2,0,0,,1,1,1,0
diff --git a/tests/expected/lscpu/lscpu-x86_64-epyc_7451 b/tests/expected/lscpu/lscpu-x86_64-epyc_7451
new file mode 100644
index 0000000..8c1b103
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-x86_64-epyc_7451
@@ -0,0 +1,239 @@
+CPU op-mode(s): 32-bit, 64-bit
+Address sizes: 48 bits physical, 48 bits virtual
+CPU(s): 96
+On-line CPU(s) list: 0-95
+Thread(s) per core: 2
+Core(s) per socket: 24
+Socket(s): 2
+NUMA node(s): 8
+Vendor ID: AuthenticAMD
+CPU family: 23
+Model: 1
+Model name: AMD EPYC 7451 24-Core Processor
+Stepping: 2
+Frequency boost: enabled
+CPU MHz: 2894.214
+CPU max MHz: 2300.0000
+CPU min MHz: 1200.0000
+BogoMIPS: 4590.83
+Virtualization: AMD-V
+L1d cache: 1.5 MiB
+L1i cache: 3 MiB
+L2 cache: 24 MiB
+L3 cache: 128 MiB
+NUMA node0 CPU(s): 0-5,48-53
+NUMA node1 CPU(s): 6-11,54-59
+NUMA node2 CPU(s): 12-17,60-65
+NUMA node3 CPU(s): 18-23,66-71
+NUMA node4 CPU(s): 24-29,72-77
+NUMA node5 CPU(s): 30-35,78-83
+NUMA node6 CPU(s): 36-41,84-89
+NUMA node7 CPU(s): 42-47,90-95
+Vulnerability L1tf: Not affected
+Vulnerability Meltdown: Not affected
+Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl and seccomp
+Vulnerability Spectre v1: Mitigation; __user pointer sanitization
+Vulnerability Spectre v2: Mitigation; Full AMD retpoline, IBPB conditional, STIBP disabled, RSB filling
+Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid amd_dcm aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb hw_pstate ssbd ibpb vmmcall fsgsbase bmi1 avx2 smep bmi2 rdseed adx smap clflushopt sha_ni xsaveopt xsavec xgetbv1 xsaves clzero irperf xsaveerptr arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif overflow_recov succor smca
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,0,,0,0,0,0
+1,1,0,0,,1,1,1,0
+2,2,0,0,,2,2,2,0
+3,3,0,0,,3,3,3,1
+4,4,0,0,,4,4,4,1
+5,5,0,0,,5,5,5,1
+6,6,0,1,,6,6,6,2
+7,7,0,1,,7,7,7,2
+8,8,0,1,,8,8,8,2
+9,9,0,1,,9,9,9,3
+10,10,0,1,,10,10,10,3
+11,11,0,1,,11,11,11,3
+12,12,0,2,,12,12,12,4
+13,13,0,2,,13,13,13,4
+14,14,0,2,,14,14,14,4
+15,15,0,2,,15,15,15,5
+16,16,0,2,,16,16,16,5
+17,17,0,2,,17,17,17,5
+18,18,0,3,,18,18,18,6
+19,19,0,3,,19,19,19,6
+20,20,0,3,,20,20,20,6
+21,21,0,3,,21,21,21,7
+22,22,0,3,,22,22,22,7
+23,23,0,3,,23,23,23,7
+24,24,1,4,,24,24,24,8
+25,25,1,4,,25,25,25,8
+26,26,1,4,,26,26,26,8
+27,27,1,4,,27,27,27,9
+28,28,1,4,,28,28,28,9
+29,29,1,4,,29,29,29,9
+30,30,1,5,,30,30,30,10
+31,31,1,5,,31,31,31,10
+32,32,1,5,,32,32,32,10
+33,33,1,5,,33,33,33,11
+34,34,1,5,,34,34,34,11
+35,35,1,5,,35,35,35,11
+36,36,1,6,,36,36,36,12
+37,37,1,6,,37,37,37,12
+38,38,1,6,,38,38,38,12
+39,39,1,6,,39,39,39,13
+40,40,1,6,,40,40,40,13
+41,41,1,6,,41,41,41,13
+42,42,1,7,,42,42,42,14
+43,43,1,7,,43,43,43,14
+44,44,1,7,,44,44,44,14
+45,45,1,7,,45,45,45,15
+46,46,1,7,,46,46,46,15
+47,47,1,7,,47,47,47,15
+48,0,0,0,,0,0,0,0
+49,1,0,0,,1,1,1,0
+50,2,0,0,,2,2,2,0
+51,3,0,0,,3,3,3,1
+52,4,0,0,,4,4,4,1
+53,5,0,0,,5,5,5,1
+54,6,0,1,,6,6,6,2
+55,7,0,1,,7,7,7,2
+56,8,0,1,,8,8,8,2
+57,9,0,1,,9,9,9,3
+58,10,0,1,,10,10,10,3
+59,11,0,1,,11,11,11,3
+60,12,0,2,,12,12,12,4
+61,13,0,2,,13,13,13,4
+62,14,0,2,,14,14,14,4
+63,15,0,2,,15,15,15,5
+64,16,0,2,,16,16,16,5
+65,17,0,2,,17,17,17,5
+66,18,0,3,,18,18,18,6
+67,19,0,3,,19,19,19,6
+68,20,0,3,,20,20,20,6
+69,21,0,3,,21,21,21,7
+70,22,0,3,,22,22,22,7
+71,23,0,3,,23,23,23,7
+72,24,1,4,,24,24,24,8
+73,25,1,4,,25,25,25,8
+74,26,1,4,,26,26,26,8
+75,27,1,4,,27,27,27,9
+76,28,1,4,,28,28,28,9
+77,29,1,4,,29,29,29,9
+78,30,1,5,,30,30,30,10
+79,31,1,5,,31,31,31,10
+80,32,1,5,,32,32,32,10
+81,33,1,5,,33,33,33,11
+82,34,1,5,,34,34,34,11
+83,35,1,5,,35,35,35,11
+84,36,1,6,,36,36,36,12
+85,37,1,6,,37,37,37,12
+86,38,1,6,,38,38,38,12
+87,39,1,6,,39,39,39,13
+88,40,1,6,,40,40,40,13
+89,41,1,6,,41,41,41,13
+90,42,1,7,,42,42,42,14
+91,43,1,7,,43,43,43,14
+92,44,1,7,,44,44,44,14
+93,45,1,7,,45,45,45,15
+94,46,1,7,,46,46,46,15
+95,47,1,7,,47,47,47,15
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,0,,0,0,0,0
+1,1,0,0,,1,1,1,0
+2,2,0,0,,2,2,2,0
+3,4,0,0,,3,3,3,1
+4,5,0,0,,4,4,4,1
+5,6,0,0,,5,5,5,1
+6,8,0,1,,6,6,6,2
+7,9,0,1,,7,7,7,2
+8,10,0,1,,8,8,8,2
+9,12,0,1,,9,9,9,3
+10,13,0,1,,10,10,10,3
+11,14,0,1,,11,11,11,3
+12,16,0,2,,12,12,12,4
+13,17,0,2,,13,13,13,4
+14,18,0,2,,14,14,14,4
+15,20,0,2,,15,15,15,5
+16,21,0,2,,16,16,16,5
+17,22,0,2,,17,17,17,5
+18,24,0,3,,18,18,18,6
+19,25,0,3,,19,19,19,6
+20,26,0,3,,20,20,20,6
+21,28,0,3,,21,21,21,7
+22,29,0,3,,22,22,22,7
+23,30,0,3,,23,23,23,7
+24,0,1,4,,24,24,24,8
+25,1,1,4,,25,25,25,8
+26,2,1,4,,26,26,26,8
+27,4,1,4,,27,27,27,9
+28,5,1,4,,28,28,28,9
+29,6,1,4,,29,29,29,9
+30,8,1,5,,30,30,30,10
+31,9,1,5,,31,31,31,10
+32,10,1,5,,32,32,32,10
+33,12,1,5,,33,33,33,11
+34,13,1,5,,34,34,34,11
+35,14,1,5,,35,35,35,11
+36,16,1,6,,36,36,36,12
+37,17,1,6,,37,37,37,12
+38,18,1,6,,38,38,38,12
+39,20,1,6,,39,39,39,13
+40,21,1,6,,40,40,40,13
+41,22,1,6,,41,41,41,13
+42,24,1,7,,42,42,42,14
+43,25,1,7,,43,43,43,14
+44,26,1,7,,44,44,44,14
+45,28,1,7,,45,45,45,15
+46,29,1,7,,46,46,46,15
+47,30,1,7,,47,47,47,15
+48,0,0,0,,0,0,0,0
+49,1,0,0,,1,1,1,0
+50,2,0,0,,2,2,2,0
+51,4,0,0,,3,3,3,1
+52,5,0,0,,4,4,4,1
+53,6,0,0,,5,5,5,1
+54,8,0,1,,6,6,6,2
+55,9,0,1,,7,7,7,2
+56,10,0,1,,8,8,8,2
+57,12,0,1,,9,9,9,3
+58,13,0,1,,10,10,10,3
+59,14,0,1,,11,11,11,3
+60,16,0,2,,12,12,12,4
+61,17,0,2,,13,13,13,4
+62,18,0,2,,14,14,14,4
+63,20,0,2,,15,15,15,5
+64,21,0,2,,16,16,16,5
+65,22,0,2,,17,17,17,5
+66,24,0,3,,18,18,18,6
+67,25,0,3,,19,19,19,6
+68,26,0,3,,20,20,20,6
+69,28,0,3,,21,21,21,7
+70,29,0,3,,22,22,22,7
+71,30,0,3,,23,23,23,7
+72,0,1,4,,24,24,24,8
+73,1,1,4,,25,25,25,8
+74,2,1,4,,26,26,26,8
+75,4,1,4,,27,27,27,9
+76,5,1,4,,28,28,28,9
+77,6,1,4,,29,29,29,9
+78,8,1,5,,30,30,30,10
+79,9,1,5,,31,31,31,10
+80,10,1,5,,32,32,32,10
+81,12,1,5,,33,33,33,11
+82,13,1,5,,34,34,34,11
+83,14,1,5,,35,35,35,11
+84,16,1,6,,36,36,36,12
+85,17,1,6,,37,37,37,12
+86,18,1,6,,38,38,38,12
+87,20,1,6,,39,39,39,13
+88,21,1,6,,40,40,40,13
+89,22,1,6,,41,41,41,13
+90,24,1,7,,42,42,42,14
+91,25,1,7,,43,43,43,14
+92,26,1,7,,44,44,44,14
+93,28,1,7,,45,45,45,15
+94,29,1,7,,46,46,46,15
+95,30,1,7,,47,47,47,15
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-22 21:03:08 +0000