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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-27 18:24:20 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-27 18:24:20 +0000
commit483eb2f56657e8e7f419ab1a4fab8dce9ade8609 (patch)
treee5d88d25d870d5dedacb6bbdbe2a966086a0a5cf /src/spdk/dpdk/mk/toolchain/gcc
parentInitial commit. (diff)
downloadceph-upstream.tar.xz
ceph-upstream.zip
Adding upstream version 14.2.21.upstream/14.2.21upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'src/spdk/dpdk/mk/toolchain/gcc')
-rw-r--r--src/spdk/dpdk/mk/toolchain/gcc/rte.toolchain-compat.mk89
-rw-r--r--src/spdk/dpdk/mk/toolchain/gcc/rte.vars.mk91
2 files changed, 180 insertions, 0 deletions
diff --git a/src/spdk/dpdk/mk/toolchain/gcc/rte.toolchain-compat.mk b/src/spdk/dpdk/mk/toolchain/gcc/rte.toolchain-compat.mk
new file mode 100644
index 00000000..1e4434fa
--- /dev/null
+++ b/src/spdk/dpdk/mk/toolchain/gcc/rte.toolchain-compat.mk
@@ -0,0 +1,89 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2010-2014 Intel Corporation
+
+#
+# CPUID-related options
+#
+# This was added to support compiler versions which might not support all the
+# flags we need
+#
+
+#find out GCC version
+
+GCC_MAJOR = $(shell echo __GNUC__ | $(CC) -E -x c - | tail -n 1)
+GCC_MINOR = $(shell echo __GNUC_MINOR__ | $(CC) -E -x c - | tail -n 1)
+GCC_PATCHLEVEL = $(shell echo __GNUC_PATCHLEVEL__ | $(CC) -E -x c - | tail -n 1)
+GCC_VERSION = $(GCC_MAJOR)$(GCC_MINOR)
+
+HOST_GCC_MAJOR = $(shell echo __GNUC__ | $(HOSTCC) -E -x c - | tail -n 1)
+HOST_GCC_MINOR = $(shell echo __GNUC_MINOR__ | $(HOSTCC) -E -x c - | tail -n 1)
+HOST_GCC_PATCHLEVEL = $(shell echo __GNUC_PATCHLEVEL__ | $(HOSTCC) -E -x c - | tail -n 1)
+HOST_GCC_VERSION = $(HOST_GCC_MAJOR)$(HOST_GCC_MINOR)
+
+# if GCC is older than 4.x
+ifeq ($(shell test $(GCC_VERSION) -lt 40 && echo 1), 1)
+ MACHINE_CFLAGS =
+$(warning You are using GCC < 4.x. This is neither supported, nor tested.)
+
+
+else
+# GCC graceful degradation
+# GCC 4.2.x - added support for generic target
+# GCC 4.3.x - added support for core2, ssse3, sse4.1, sse4.2
+# GCC 4.4.x - added support for avx, aes, pclmul
+# GCC 4.5.x - added support for atom
+# GCC 4.6.x - added support for corei7, corei7-avx
+# GCC 4.7.x - added support for fsgsbase, rdrnd, f16c, core-avx-i, core-avx2
+# GCC 4.9.x - added support for armv8-a+crc
+#
+ ifeq ($(shell test $(GCC_VERSION) -le 49 && echo 1), 1)
+ MACHINE_CFLAGS := $(patsubst -march=armv8-a+crc,-march=armv8-a+crc -D__ARM_FEATURE_CRC32=1,$(MACHINE_CFLAGS))
+ MACHINE_CFLAGS := $(patsubst -march=armv8-a+crc+crypto,-march=armv8-a+crc+crypto -D__ARM_FEATURE_CRC32=1,$(MACHINE_CFLAGS))
+ endif
+ ifeq ($(shell test $(GCC_VERSION) -le 47 && echo 1), 1)
+ MACHINE_CFLAGS := $(patsubst -march=core-avx-i,-march=corei7-avx,$(MACHINE_CFLAGS))
+ MACHINE_CFLAGS := $(patsubst -march=core-avx2,-march=core-avx2,$(MACHINE_CFLAGS))
+ endif
+ ifeq ($(shell test $(GCC_VERSION) -lt 46 && echo 1), 1)
+ MACHINE_CFLAGS := $(patsubst -march=corei7-avx,-march=core2 -maes -mpclmul -mavx,$(MACHINE_CFLAGS))
+ MACHINE_CFLAGS := $(patsubst -march=corei7,-march=core2 -maes -mpclmul,$(MACHINE_CFLAGS))
+ endif
+ ifeq ($(shell test $(GCC_VERSION) -lt 45 && echo 1), 1)
+ MACHINE_CFLAGS := $(patsubst -march=atom,-march=core2 -mssse3,$(MACHINE_CFLAGS))
+ endif
+ ifeq ($(shell test $(GCC_VERSION) -lt 44 && echo 1), 1)
+ MACHINE_CFLAGS := $(filter-out -mavx -mpclmul -maes,$(MACHINE_CFLAGS))
+ ifneq ($(findstring SSE4_2, $(CPUFLAGS)),)
+ MACHINE_CFLAGS += -msse4.2
+ endif
+ ifneq ($(findstring SSE4_1, $(CPUFLAGS)),)
+ MACHINE_CFLAGS += -msse4.1
+ endif
+ endif
+ ifeq ($(shell test $(GCC_VERSION) -lt 43 && echo 1), 1)
+ MACHINE_CFLAGS := $(filter-out -msse% -mssse%,$(MACHINE_CFLAGS))
+ MACHINE_CFLAGS := $(patsubst -march=core2,-march=generic,$(MACHINE_CFLAGS))
+ MACHINE_CFLAGS += -msse3
+ endif
+ ifeq ($(shell test $(GCC_VERSION) -lt 42 && echo 1), 1)
+ MACHINE_CFLAGS := $(filter-out -march% -mtune% -msse%,$(MACHINE_CFLAGS))
+ endif
+
+ # Disable thunderx PMD for gcc < 4.7
+ ifeq ($(shell test $(GCC_VERSION) -lt 47 && echo 1), 1)
+ CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=d
+ endif
+
+ # Disable OPDL PMD for gcc < 4.7
+ ifeq ($(shell test $(GCC_VERSION) -lt 47 && echo 1), 1)
+ CONFIG_RTE_LIBRTE_PMD_OPDL_EVENTDEV=d
+ endif
+
+ # Disable octeontx event PMD for gcc < 4.8.6
+ ifeq ($(shell test $(GCC_VERSION)$(GCC_PATCHLEVEL) -lt 486 && echo 1), 1)
+ CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=d
+ CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL=d
+ CONFIG_RTE_LIBRTE_OCTEONTX_PMD=d
+ endif
+
+endif
diff --git a/src/spdk/dpdk/mk/toolchain/gcc/rte.vars.mk b/src/spdk/dpdk/mk/toolchain/gcc/rte.vars.mk
new file mode 100644
index 00000000..d8b99faf
--- /dev/null
+++ b/src/spdk/dpdk/mk/toolchain/gcc/rte.vars.mk
@@ -0,0 +1,91 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2010-2014 Intel Corporation
+
+#
+# toolchain:
+#
+# - define CC, LD, AR, AS, ... (overridden by cmdline value)
+# - define TOOLCHAIN_CFLAGS variable (overridden by cmdline value)
+# - define TOOLCHAIN_LDFLAGS variable (overridden by cmdline value)
+# - define TOOLCHAIN_ASFLAGS variable (overridden by cmdline value)
+#
+
+CC = $(CROSS)gcc
+KERNELCC = $(CROSS)gcc
+CPP = $(CROSS)cpp
+# for now, we don't use as but nasm.
+# AS = $(CROSS)as
+AS = nasm
+AR = $(CROSS)ar
+LD = $(CROSS)ld
+OBJCOPY = $(CROSS)objcopy
+OBJDUMP = $(CROSS)objdump
+STRIP = $(CROSS)strip
+READELF = $(CROSS)readelf
+GCOV = $(CROSS)gcov
+
+ifeq ("$(origin CC)", "command line")
+HOSTCC = $(CC)
+else
+HOSTCC = gcc
+endif
+HOSTAS = as
+
+TOOLCHAIN_ASFLAGS =
+TOOLCHAIN_CFLAGS =
+TOOLCHAIN_LDFLAGS =
+
+ifeq ($(CONFIG_RTE_LIBRTE_GCOV),y)
+TOOLCHAIN_CFLAGS += --coverage
+TOOLCHAIN_LDFLAGS += --coverage
+ifeq (,$(findstring -O0,$(EXTRA_CFLAGS)))
+ $(warning "EXTRA_CFLAGS doesn't contains -O0, coverage will be inaccurate with optimizations enabled")
+endif
+endif
+
+WERROR_FLAGS := -W -Wall -Wstrict-prototypes -Wmissing-prototypes
+WERROR_FLAGS += -Wmissing-declarations -Wold-style-definition -Wpointer-arith
+WERROR_FLAGS += -Wcast-align -Wnested-externs -Wcast-qual
+WERROR_FLAGS += -Wformat-nonliteral -Wformat-security
+WERROR_FLAGS += -Wundef -Wwrite-strings -Wdeprecated
+
+ifeq ($(RTE_DEVEL_BUILD),y)
+WERROR_FLAGS += -Werror
+endif
+
+# There are many issues reported for strict alignment architectures
+# which are not necessarily fatal. Report as warnings.
+ifeq ($(CONFIG_RTE_ARCH_STRICT_ALIGN),y)
+WERROR_FLAGS += -Wno-error=cast-align
+endif
+
+# process cpu flags
+include $(RTE_SDK)/mk/toolchain/$(RTE_TOOLCHAIN)/rte.toolchain-compat.mk
+
+# workaround GCC bug with warning "missing initializer" for "= {0}"
+ifeq ($(shell test $(GCC_VERSION) -lt 47 && echo 1), 1)
+WERROR_FLAGS += -Wno-missing-field-initializers
+endif
+# workaround GCC bug with warning "may be used uninitialized"
+ifeq ($(shell test $(GCC_VERSION) -lt 47 && echo 1), 1)
+WERROR_FLAGS += -Wno-uninitialized
+endif
+
+HOST_WERROR_FLAGS := $(WERROR_FLAGS)
+
+ifeq ($(shell test $(HOST_GCC_VERSION) -gt 70 && echo 1), 1)
+# Tell GCC only to error for switch fallthroughs without a suitable comment
+HOST_WERROR_FLAGS += -Wimplicit-fallthrough=2
+# Ignore errors for snprintf truncation
+HOST_WERROR_FLAGS += -Wno-format-truncation
+endif
+
+ifeq ($(shell test $(GCC_VERSION) -gt 70 && echo 1), 1)
+# Tell GCC only to error for switch fallthroughs without a suitable comment
+WERROR_FLAGS += -Wimplicit-fallthrough=2
+# Ignore errors for snprintf truncation
+WERROR_FLAGS += -Wno-format-truncation
+endif
+
+export CC AS AR LD OBJCOPY OBJDUMP STRIP READELF
+export TOOLCHAIN_CFLAGS TOOLCHAIN_LDFLAGS TOOLCHAIN_ASFLAGS