diff options
Diffstat (limited to 'src/spdk/dpdk/config/common_armv8a_linuxapp')
| -rw-r--r-- | src/spdk/dpdk/config/common_armv8a_linuxapp | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/src/spdk/dpdk/config/common_armv8a_linuxapp b/src/spdk/dpdk/config/common_armv8a_linuxapp new file mode 100644 index 00000000..111c0056 --- /dev/null +++ b/src/spdk/dpdk/config/common_armv8a_linuxapp @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2017 Cavium, Inc +# + +#include "common_linuxapp" + +CONFIG_RTE_MACHINE="armv8a" + +CONFIG_RTE_ARCH="arm64" +CONFIG_RTE_ARCH_ARM64=y +CONFIG_RTE_ARCH_64=y + +CONFIG_RTE_FORCE_INTRINSICS=y + +# Maximum available cache line size in arm64 implementations. +# Setting to maximum available cache line size in generic config +# to address minimum DMA alignment across all arm64 implementations. +CONFIG_RTE_CACHE_LINE_SIZE=128 + +# Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) +# to determine the best threshold in code. Refer to notes in source file +# (lib/librte_eal/common/include/arch/arm/rte_memcpy_64.h) for more info. +CONFIG_RTE_ARCH_ARM64_MEMCPY=n +#CONFIG_RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD=2048 +#CONFIG_RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD=512 +# Leave below RTE_ARM64_MEMCPY_xxx options commented out, unless there're +# strong reasons. +#CONFIG_RTE_ARM64_MEMCPY_SKIP_GCC_VER_CHECK=n +#CONFIG_RTE_ARM64_MEMCPY_ALIGN_MASK=0xF +#CONFIG_RTE_ARM64_MEMCPY_STRICT_ALIGN=n + +CONFIG_RTE_RING_USE_C11_MEM_MODEL=y + +CONFIG_RTE_LIBRTE_FM10K_PMD=n +CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n +CONFIG_RTE_LIBRTE_AVP_PMD=n + +CONFIG_RTE_SCHED_VECTOR=n |