summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/ls1021a-moxa-uc-8410a.dts
blob: f3ddea934f1bb160ab78a142205855b078d68029 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2017 Moxa Inc. - https://www.moxa.com/
 *
 * Author: Harry YJ Jhou (周亞諄) <harryyj.jhou@moxa.com>
 *         Jimmy Chen (陳永達)    <jimmy.chen@moxa.com>
 *         SZ Lin (林上智)        <sz.lin@moxa.com>
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ls1021a.dtsi"

/ {
	model = "Moxa UC-8410A";
	compatible = "fsl,ls1021a-moxa-uc-8410a", "fsl,ls1021a";

	aliases {
		enet0_rgmii_phy = &rgmii_phy0;
		enet1_rgmii_phy = &rgmii_phy1;
		enet2_rgmii_phy = &rgmii_phy2;
	};

	sys_mclk: clock-mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24576000>;
	};

	reg_3p3v: regulator-3p3v {
		  compatible = "regulator-fixed";
		  regulator-name = "3P3V";
		  regulator-min-microvolt = <3300000>;
		  regulator-max-microvolt = <3300000>;
		  regulator-always-on;
	};

	leds {
		compatible = "gpio-leds";

		cel-pwr {
			label = "UC8410A:CEL-PWR";
			gpios = <&gpio3 27 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		cel-reset {
			label = "UC8410A:CEL-RESET";
			gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		str-led {
			label = "UC8410A:RED:PROG";
			gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "mmc0";
		};

		sw-ready {
			label = "UC8410A:GREEN:SWRDY";
			gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
			default-state = "on";
		};

		beeper {
			label = "UC8410A:BEEP";
			gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		prog-led0 {
			label = "UC8410A:GREEN:PROG2";
			gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		prog-led1 {
			label = "UC8410A:GREEN:PROG1";
			gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		prog-led2 {
			label = "UC8410A:GREEN:PROG0";
			gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		wifi-signal0 {
			label = "UC8410A:GREEN:CEL2";
			gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		wifi-signal1 {
			label = "UC8410A:GREEN:CEL1";
			gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		wifi-signal2 {
			label = "UC8410A:GREEN:CEL0";
			gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		cpu-diag-red {
			label = "UC8410A:RED:DIA";
			gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		cpu-diag-green {
			label = "UC8410A:GREEN:DIA";
			gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		cpu-diag-yellow {
			label = "UC8410A:YELLOW:DIA";
			gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		pushbtn-key {
			label = "push button key";
			gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
			linux,code = <BTN_MISC>;
			default-state = "on";
		};
	};
};

&enet0 {
	phy-handle = <&rgmii_phy0>;
	phy-connection-type = "rgmii-id";
	status = "okay";
};

&enet1 {
	phy-handle = <&rgmii_phy1>;
	phy-connection-type = "rgmii-id";
	status = "okay";
};

&enet2 {
	phy-handle = <&rgmii_phy2>;
	phy-connection-type = "rgmii-id";
	status = "okay";
};

&i2c0 {
	clock-frequency = <100000>;
	status = "okay";

	tpm@20 {
		compatible = "infineon,slb9635tt";
		reg = <0x20>;
	};

	rtc@68 {
		compatible = "dallas,ds1374";
		reg = <0x68>;
	};
};

&lpuart0 {
	status = "okay";
};

&mdio0 {
	rgmii_phy0: ethernet-phy@0 {
		compatible = "marvell,88e1118";
		reg = <0x0>;
		marvell,reg-init =
			<3 0x11 0 0x4415>, /* Reg 3,17 */
			<3 0x10 0 0x77>; /* Reg 3,16 */
	};

	rgmii_phy1: ethernet-phy@1 {
		compatible = "marvell,88e1118";
		reg = <0x1>;
		marvell,reg-init =
			<3 0x11 0 0x4415>, /* Reg 3,17 */
			<3 0x10 0 0x77>; /* Reg 3,16 */
	};

	rgmii_phy2: ethernet-phy@2 {
		compatible = "marvell,88e1118";
		reg = <0x2>;
		marvell,reg-init =
			<3 0x11 0 0x4415>, /* Reg 3,17 */
			<3 0x10 0 0x77>; /* Reg 3,16 */
	};
};

&qspi {
	status = "okay";

	flash: flash@0 {
		compatible = "spansion,s25fl064l", "spansion,s25fl164k";
		#address-cells = <1>;
		#size-cells = <1>;
		spi-max-frequency = <20000000>;
		spi-rx-bus-width = <4>;
		spi-tx-bus-width = <4>;
		reg = <0>;

		partitions@0 {
			label = "U-Boot";
			reg = <0x0 0x180000>;
		};

		partitions@180000 {
			label = "U-Boot Env";
			reg = <0x180000 0x680000>;
		};
	};
};

&sata {
	status = "okay";
};

&uart0 {
	status = "okay";
};

&uart1 {
	status = "okay";
};