Adding upstream version 18.2.2.upstream/18.2.2

Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>

14 files changed, 1998 insertions, 0 deletions

diff --git a/src/crypto/isa-l/isa-l_crypto/rolling_hash/Makefile.am b/src/crypto/isa-l/isa-l_crypto/rolling_hash/Makefile.am
new file mode 100644
index 000000000..a16209248
--- /dev/null
+++ b/src/crypto/isa-l/isa-l_crypto/rolling_hash/Makefile.am
@@ -0,0 +1,57 @@
+########################################################################
+#  Copyright(c) 2011-2017 Intel Corporation All rights reserved.
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#    * Redistributions of source code must retain the above copyright
+#      notice, this list of conditions and the following disclaimer.
+#    * Redistributions in binary form must reproduce the above copyright
+#      notice, this list of conditions and the following disclaimer in
+#      the documentation and/or other materials provided with the
+#      distribution.
+#    * Neither the name of Intel Corporation nor the names of its
+#      contributors may be used to endorse or promote products derived
+#      from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+########################################################################
+
+lsrc_x86_64         += rolling_hash/rolling_hashx_base.c
+lsrc_x86_64         += rolling_hash/rolling_hash2.c
+lsrc_x86_64         += rolling_hash/rolling_hash2_until_04.asm
+lsrc_x86_64         += rolling_hash/rolling_hash2_until_00.asm
+lsrc_x86_64         += rolling_hash/rolling_hash2_multibinary.asm
+
+lsrc_x86_32         += $(lsrc_x86_64)
+
+lsrc_base_aliases   += 	rolling_hash/rolling_hashx_base.c	\
+			rolling_hash/rolling_hash2.c	\
+			rolling_hash/rolling_hash2_base_aliases.c
+
+
+lsrc_aarch64	    += 	rolling_hash/rolling_hashx_base.c	\
+			rolling_hash/rolling_hash2.c	\
+			rolling_hash/aarch64/rolling_hash2_aarch64_multibinary.S \
+			rolling_hash/aarch64/rolling_hash2_aarch64_dispatcher.c \
+			rolling_hash/aarch64/rolling_hash2_run_until_unroll.S
+
+src_include  += -I $(srcdir)/rolling_hash
+extern_hdrs  += include/rolling_hashx.h
+
+other_src    += rolling_hash/rolling_hash2_table.h
+other_src    += include/test.h include/types.h
+
+check_tests  += rolling_hash/rolling_hash2_test
+perf_tests   += rolling_hash/rolling_hash2_perf
+other_tests  += rolling_hash/chunking_with_mb_hash
diff --git a/src/crypto/isa-l/isa-l_crypto/rolling_hash/aarch64/rolling_hash2_aarch64_dispatcher.c b/src/crypto/isa-l/isa-l_crypto/rolling_hash/aarch64/rolling_hash2_aarch64_dispatcher.c
new file mode 100644
index 000000000..98692e162
--- /dev/null
+++ b/src/crypto/isa-l/isa-l_crypto/rolling_hash/aarch64/rolling_hash2_aarch64_dispatcher.c
@@ -0,0 +1,37 @@
+/**********************************************************************
+  Copyright(c) 2020 Arm Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Arm Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+#include <aarch64_multibinary.h>
+
+DEFINE_INTERFACE_DISPATCHER(rolling_hash2_run_until)
+{
+	return PROVIDER_INFO(rolling_hash2_run_until_unroll);
+
+	//~ return PROVIDER_BASIC(rolling_hash2_run_until);
+
+}
diff --git a/src/crypto/isa-l/isa-l_crypto/rolling_hash/aarch64/rolling_hash2_aarch64_multibinary.S b/src/crypto/isa-l/isa-l_crypto/rolling_hash/aarch64/rolling_hash2_aarch64_multibinary.S
new file mode 100644
index 000000000..efbe44a18
--- /dev/null
+++ b/src/crypto/isa-l/isa-l_crypto/rolling_hash/aarch64/rolling_hash2_aarch64_multibinary.S
@@ -0,0 +1,35 @@
+/**********************************************************************
+  Copyright(c) 2020 Arm Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Arm Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+
+#include "aarch64_multibinary.h"
+
+
+mbin_interface rolling_hash2_run_until
+
diff --git a/src/crypto/isa-l/isa-l_crypto/rolling_hash/aarch64/rolling_hash2_run_until_unroll.S b/src/crypto/isa-l/isa-l_crypto/rolling_hash/aarch64/rolling_hash2_run_until_unroll.S
new file mode 100644
index 000000000..7ba04efbd
--- /dev/null
+++ b/src/crypto/isa-l/isa-l_crypto/rolling_hash/aarch64/rolling_hash2_run_until_unroll.S
@@ -0,0 +1,115 @@
+/**********************************************************************
+  Copyright(c) 2020 Arm Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Arm Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+	.arch armv8-a+crypto
+	.text
+	.align	2
+	.p2align 3,,7
+/*
+	uint64_t rolling_hash2_run_until_unroll(
+		uint32_t * idx, int max_idx, uint64_t * t1,
+		uint64_t * t2, uint8_t * b1, uint8_t * b2, uint64_t h,
+		uint64_t mask, uint64_t trigger)
+*/
+	idx_addr	.req	x0
+	max_idx		.req	w1	//signed int
+	t1_addr		.req	x2
+	t2_addr		.req	x3
+	b1_addr		.req	x4
+	b2_addr		.req	x5
+	h		.req	x6
+	mask		.req	x7
+	trigger		.req	x12
+
+	idx		.req	w8
+
+	dat1		.req	x9
+	dat2		.req	x10
+	wdat1		.req	w9
+	wdat2		.req	w10
+	tmp_loop	.req	w11
+
+	t1		.req	x13
+	t2		.req	x14
+
+.macro	round	off:req
+	ubfx	t1,dat1,8*\off\(),8
+	ubfx	t2,dat2,8*\off\(),8
+	ldr	t1,[t1_addr,t1,lsl 3]
+	ldr	t2,[t2_addr,t2,lsl 3]
+	eor	t1,t2,t1
+	eor	h,t1,h,ror 63
+	and	t2,h,mask
+	cmp	t2,trigger
+	beq	exit_ret
+	add 	idx, idx,1
+.endm
+	.global	rolling_hash2_run_until_unroll
+	.type	rolling_hash2_run_until_unroll, %function
+rolling_hash2_run_until_unroll:
+	ldr	trigger,[sp]
+	ldr	idx,[idx_addr]
+	sub	tmp_loop,max_idx,8
+	cmp	idx,tmp_loop
+	bge	unroll_loop_end
+unroll_loop:
+	ldr	dat1,[b1_addr,idx,sxtw]
+	ldr	dat2,[b2_addr,idx,sxtw]
+
+	round	0
+	round	1
+	round	2
+	round	3
+	round	4
+	round	5
+	round	6
+	round	7
+	cmp	tmp_loop,idx
+	bgt	unroll_loop
+unroll_loop_end:
+	cmp	idx,max_idx
+	bge	exit_ret
+loop:
+	ldrb	wdat1,[b1_addr,idx,sxtw]
+	ldrb	wdat2,[b2_addr,idx,sxtw]
+	ldr	t1,[t1_addr,dat1,lsl 3]
+	ldr	t2,[t2_addr,dat2,lsl 3]
+	eor	t1,t2,t1
+	eor	h,t1,h,ror 63
+	and	t2,h,mask
+	cmp	t2,trigger
+	beq	exit_ret
+	add	idx,idx,1
+	cmp	max_idx,idx
+	bgt	loop
+exit_ret:
+	str	idx,[idx_addr]
+	mov	x0,h
+	ret
+	.size	rolling_hash2_run_until_unroll, .-rolling_hash2_run_until_unroll
+
diff --git a/src/crypto/isa-l/isa-l_crypto/rolling_hash/chunking_with_mb_hash.c b/src/crypto/isa-l/isa-l_crypto/rolling_hash/chunking_with_mb_hash.c
new file mode 100644
index 000000000..23062c3ef
--- /dev/null
+++ b/src/crypto/isa-l/isa-l_crypto/rolling_hash/chunking_with_mb_hash.c
@@ -0,0 +1,222 @@
+/**********************************************************************
+  Copyright(c) 2011-2017 Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdarg.h>
+#include <stdio.h>
+#include <assert.h>
+#include "rolling_hashx.h"
+#include "sha256_mb.h"
+#include "test.h"
+
+#define MAX_BUFFER_SIZE 128*1024*1024
+#define HASH_POOL_SIZE SHA256_MAX_LANES
+
+#ifndef TEST_SEED
+# define TEST_SEED 0x1234
+#endif
+
+#define FILTER_BITS 10
+#define FILTER_SIZE (1 << FILTER_BITS)
+#define FILTER_MASK (FILTER_SIZE - 1)
+
+#define BITS_TO_INDEX_LONG 6
+#define MASK_TO_INDEX_LONG ((1 << BITS_TO_INDEX_LONG) - 1)
+
+// Globals
+SHA256_HASH_CTX ctxpool[SHA256_MAX_LANES], *last_ctx;
+SHA256_HASH_CTX_MGR mb_hash_mgr;
+uint64_t filter_table[FILTER_SIZE];
+unsigned long chunks_created = 0;
+unsigned long filter_hits = 0;
+
+// Example function to run on each chunk
+
+void run_fragment(SHA256_HASH_CTX * ctx)
+{
+	uint64_t lookup, set_hash;
+	unsigned int lookup_hash;
+	uint32_t idx;
+
+	chunks_created++;
+
+	// Run a simple lookup filter on chunk using digest
+	lookup_hash = ctx->job.result_digest[0] & FILTER_MASK;
+	lookup = filter_table[lookup_hash];
+
+	idx = ctx->job.result_digest[1];
+
+	set_hash = 1 << (idx & MASK_TO_INDEX_LONG) |
+	    1 << ((idx >> BITS_TO_INDEX_LONG) & MASK_TO_INDEX_LONG) |
+	    1 << ((idx >> (2 * BITS_TO_INDEX_LONG)) & MASK_TO_INDEX_LONG);
+
+	if ((lookup & set_hash) == set_hash)
+		filter_hits++;
+	else
+		filter_table[lookup_hash] = lookup | set_hash;
+}
+
+void setup_chunk_processing(void)
+{
+	int i;
+
+	sha256_ctx_mgr_init(&mb_hash_mgr);
+
+	for (i = 0; i < HASH_POOL_SIZE; i++)
+		hash_ctx_init(&ctxpool[i]);
+
+	last_ctx = &ctxpool[0];
+}
+
+SHA256_HASH_CTX *get_next_job_ctx(void)
+{
+	int i;
+	SHA256_HASH_CTX *ctx;
+
+	if (last_ctx && hash_ctx_complete(last_ctx))
+		return last_ctx;
+
+	for (i = 0; i < HASH_POOL_SIZE; i++) {
+		if (hash_ctx_complete(&ctxpool[i]))
+			return &ctxpool[i];
+	}
+	ctx = sha256_ctx_mgr_flush(&mb_hash_mgr);
+	assert(ctx != NULL);
+	return ctx;
+}
+
+void put_next_job_ctx(SHA256_HASH_CTX * ctx)
+{
+	if (ctx && hash_ctx_complete(ctx))
+		last_ctx = ctx;
+
+	run_fragment(ctx);
+}
+
+void process_chunk(uint8_t * buff, int len)
+{
+	SHA256_HASH_CTX *ctx;
+
+	ctx = get_next_job_ctx();
+	ctx = sha256_ctx_mgr_submit(&mb_hash_mgr, ctx, buff, len, HASH_ENTIRE);
+
+	if (ctx)
+		put_next_job_ctx(ctx);
+}
+
+void finish_chunk_processing(void)
+{
+	SHA256_HASH_CTX *ctx;
+
+	while ((ctx = sha256_ctx_mgr_flush(&mb_hash_mgr)) != NULL)
+		run_fragment(ctx);
+}
+
+int main(void)
+{
+	int i, w;
+	uint8_t *buffer, *p;
+	uint32_t mask, trigger, offset = 0;
+	uint32_t min_chunk, max_chunk, mean_chunk;
+	long remain;
+	struct rh_state2 state;
+	struct perf start, stop;
+
+	// Chunking parameters
+	w = 32;
+	min_chunk = 1024;
+	mean_chunk = 4 * 1024;
+	max_chunk = 32 * 1024;
+	mask = rolling_hashx_mask_gen(mean_chunk, 0);
+	trigger = rand() & mask;
+
+	printf("chunk and hash test w=%d, min=%d, target_ave=%d, max=%d:\n", w, min_chunk,
+	       mean_chunk, max_chunk);
+
+	if (min_chunk < w || min_chunk > max_chunk) {
+		printf(" Improper parameters selected\n");
+		return -1;
+	}
+
+	if ((buffer = malloc(MAX_BUFFER_SIZE)) == NULL) {
+		printf("cannot allocate mem\n");
+		return -1;
+	}
+	// Initialize buffer with random data
+	srand(TEST_SEED);
+	for (i = 0; i < MAX_BUFFER_SIZE; i++)
+		buffer[i] = rand();
+
+	// Start chunking test with multi-buffer hashing of results
+	perf_start(&start);
+
+	rolling_hash2_init(&state, w);
+	setup_chunk_processing();
+
+	p = buffer;
+	remain = MAX_BUFFER_SIZE;
+
+	while (remain > max_chunk) {
+		// Skip to min chunk
+		rolling_hash2_reset(&state, p + min_chunk - w);
+		rolling_hash2_run(&state, p + min_chunk, max_chunk - min_chunk,
+				  mask, trigger, &offset);
+
+		process_chunk(p, min_chunk + offset);
+
+		p += offset + min_chunk;
+		remain -= (offset + min_chunk);
+	}
+
+	while (remain > min_chunk) {
+		rolling_hash2_reset(&state, p + min_chunk - w);
+		rolling_hash2_run(&state, p + min_chunk, remain - min_chunk,
+				  mask, trigger, &offset);
+
+		process_chunk(p, min_chunk + offset);
+
+		p += offset + min_chunk;
+		remain -= (offset + min_chunk);
+	}
+
+	if (remain > 0)
+		process_chunk(p, remain);
+
+	finish_chunk_processing();
+	perf_stop(&stop);
+
+	printf("chunking_with_mb_hash: ");
+	perf_print(stop, start, MAX_BUFFER_SIZE);
+
+	printf(" found %ld chunks, ave_len=%ld, filter hits=%ld\n", chunks_created,
+	       MAX_BUFFER_SIZE / chunks_created, filter_hits);
+
+	return 0;
+}
diff --git a/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2.c b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2.c
new file mode 100644
index 000000000..4b066e40f
--- /dev/null
+++ b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2.c
@@ -0,0 +1,169 @@
+/**********************************************************************
+  Copyright(c) 2011-2017 Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+#include <stdlib.h>
+#include <string.h>
+#include "rolling_hashx.h"
+#include "rolling_hash2_table.h"
+
+extern
+uint64_t rolling_hash2_run_until(uint32_t * idx, int max_idx, uint64_t * t1,
+				 uint64_t * t2, uint8_t * b1, uint8_t * b2, uint64_t h,
+				 uint64_t mask, uint64_t trigger);
+
+int rolling_hash2_init(struct rh_state2 *state, uint32_t w)
+{
+	uint32_t i;
+	uint64_t v;
+
+	if (w > FINGERPRINT_MAX_WINDOW)
+		return -1;
+
+	for (i = 0; i < 256; i++) {
+		v = rolling_hash2_table1[i];
+		state->table1[i] = v;
+		state->table2[i] = (v << w) | (v >> (64 - w));
+	}
+	state->w = w;
+	return 0;
+}
+
+void rolling_hash2_reset(struct rh_state2 *state, uint8_t * init_bytes)
+{
+	uint64_t hash;
+	uint32_t i, w;
+
+	hash = 0;
+	w = state->w;
+	for (i = 0; i < w; i++) {
+		hash = (hash << 1) | (hash >> (64 - 1));
+		hash ^= state->table1[init_bytes[i]];
+	}
+	state->hash = hash;
+	memcpy(state->history, init_bytes, w);
+}
+
+static
+uint64_t hash_fn(struct rh_state2 *state, uint64_t h, uint8_t new_char, uint8_t old_char)
+{
+	h = (h << 1) | (h >> (64 - 1));
+	h ^= state->table1[new_char] ^ state->table2[old_char];
+	return h;
+}
+
+uint64_t rolling_hash2_run_until_base(uint32_t * idx, int max_idx, uint64_t * t1,
+				      uint64_t * t2, uint8_t * b1, uint8_t * b2, uint64_t h,
+				      uint64_t mask, uint64_t trigger)
+{
+	int i = *idx;
+
+	if (trigger == 0) {
+		for (; i < max_idx; i++) {
+			h = (h << 1) | (h >> (64 - 1));
+			h ^= t1[b1[i]] ^ t2[b2[i]];
+			if ((h & mask) == 0) {
+				*idx = i;
+				return h;
+			}
+		}
+	} else {
+		for (; i < max_idx; i++) {
+			h = (h << 1) | (h >> (64 - 1));
+			h ^= t1[b1[i]] ^ t2[b2[i]];
+			if ((h & mask) == trigger) {
+				*idx = i;
+				return h;
+			}
+		}
+	}
+	*idx = i;
+	return h;
+}
+
+int
+rolling_hash2_run(struct rh_state2 *state, uint8_t * buffer, uint32_t buffer_length,
+		  uint32_t mask, uint32_t trigger, uint32_t * offset)
+{
+
+	uint32_t i;
+	uint32_t w = state->w;
+	uint64_t hash = state->hash;
+
+	for (i = 0; i < w; i++) {
+		if (i == buffer_length) {
+			*offset = i;
+			// update history
+			memmove(state->history, state->history + i, w - i);
+			memcpy(state->history + w - i, buffer, i);
+			state->hash = hash;
+			return FINGERPRINT_RET_MAX;
+		}
+		hash = hash_fn(state, hash, buffer[i], state->history[i]);
+
+		if ((hash & mask) == trigger) {
+			// found hit
+			i++;
+			*offset = i;
+			memmove(state->history, state->history + i, w - i);
+			memcpy(state->history + w - i, buffer, i);
+			state->hash = hash;
+			return FINGERPRINT_RET_HIT;
+		}
+	}
+
+	hash = rolling_hash2_run_until(&i, buffer_length, state->table1, state->table2,
+				       buffer, buffer - w, hash, mask, trigger);
+	if ((hash & mask) == trigger) {
+		// found hit
+		i++;
+		*offset = i;
+		memcpy(state->history, buffer + i - w, w);
+		state->hash = hash;
+		return FINGERPRINT_RET_HIT;
+	}
+	// no hit
+	*offset = i;
+	memcpy(state->history, buffer + i - w, w);
+	state->hash = hash;
+	return FINGERPRINT_RET_MAX;
+}
+
+struct slver {
+	uint16_t snum;
+	uint8_t ver;
+	uint8_t core;
+};
+struct slver rolling_hash2_init_slver_00000264;
+struct slver rolling_hash2_init_slver = { 0x0264, 0x00, 0x00 };
+
+struct slver rolling_hash2_reset_slver_00000265;
+struct slver rolling_hash2_reset_slver = { 0x0265, 0x00, 0x00 };
+
+struct slver rolling_hash2_run_slver_00000266;
+struct slver rolling_hash2_run_slver = { 0x0266, 0x00, 0x00 };
diff --git a/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_base_aliases.c b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_base_aliases.c
new file mode 100644
index 000000000..58ee50a92
--- /dev/null
+++ b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_base_aliases.c
@@ -0,0 +1,39 @@
+/**********************************************************************
+  Copyright(c) 2019 Arm Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Arm Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+#include <stdint.h>
+uint64_t rolling_hash2_run_until_base(uint32_t * idx, int max_idx, uint64_t * t1,
+				      uint64_t * t2, uint8_t * b1, uint8_t * b2, uint64_t h,
+				      uint64_t mask, uint64_t trigger);
+uint64_t rolling_hash2_run_until(uint32_t * idx, int max_idx, uint64_t * t1,
+				 uint64_t * t2, uint8_t * b1, uint8_t * b2, uint64_t h,
+				 uint64_t mask, uint64_t trigger)
+{
+	return rolling_hash2_run_until_base(idx, max_idx, t1, t2, b1, b2, h, mask, trigger);
+}
diff --git a/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_multibinary.asm b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_multibinary.asm
new file mode 100644
index 000000000..ad62dad74
--- /dev/null
+++ b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_multibinary.asm
@@ -0,0 +1,122 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2017 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+%include "reg_sizes.asm"
+
+%ifidn __OUTPUT_FORMAT__, elf32
+
+[bits 32]
+%define def_wrd		dd
+%define wrd_sz  	dword
+%define arg1		esi
+
+%else
+
+default rel
+[bits 64]
+%define def_wrd 	dq
+%define wrd_sz  	qword
+%define arg1		rsi
+
+extern rolling_hash2_run_until_00
+extern rolling_hash2_run_until_04
+%endif
+
+extern rolling_hash2_run_until_base
+
+
+section .data
+;;; *_mbinit are initial values for *_dispatched; is updated on first call.
+;;; Therefore, *_dispatch_init is only executed on first call.
+
+rolling_hash2_run_until_dispatched:
+	def_wrd      rolling_hash2_run_until_mbinit
+
+section .text
+
+;;;;
+; rolling_hash2_run_until multibinary function
+;;;;
+mk_global rolling_hash2_run_until, function
+rolling_hash2_run_until_mbinit:
+	endbranch
+	call	rolling_hash2_run_until_dispatch_init
+
+rolling_hash2_run_until:
+	jmp	wrd_sz [rolling_hash2_run_until_dispatched]
+
+rolling_hash2_run_until_dispatch_init:
+	push    arg1
+%ifidn __OUTPUT_FORMAT__, elf32		;; 32-bit check
+	lea     arg1, [rolling_hash2_run_until_base]
+%else
+	push    rax
+	push    rbx
+	push    rcx
+	push    rdx
+	lea     arg1, [rolling_hash2_run_until_base WRT_OPT] ; Default
+
+	mov     eax, 1
+	cpuid
+	lea     rbx, [rolling_hash2_run_until_00 WRT_OPT]
+	test    ecx, FLAG_CPUID1_ECX_SSE4_1
+	cmovne  arg1, rbx
+
+	and	ecx, (FLAG_CPUID1_ECX_AVX | FLAG_CPUID1_ECX_OSXSAVE)
+	cmp	ecx, (FLAG_CPUID1_ECX_AVX | FLAG_CPUID1_ECX_OSXSAVE)
+	lea	rbx, [rolling_hash2_run_until_00 WRT_OPT]
+
+	jne	_done_rolling_hash2_run_until_data_init
+	mov	rsi, rbx
+
+	;; Try for AVX2
+	xor	ecx, ecx
+	mov	eax, 7
+	cpuid
+	test	ebx, FLAG_CPUID1_EBX_AVX2
+	lea     rbx, [rolling_hash2_run_until_04 WRT_OPT]
+	cmovne	rsi, rbx
+
+	;;  Does it have xmm and ymm support
+	xor     ecx, ecx
+	xgetbv
+	and     eax, FLAG_XGETBV_EAX_XMM_YMM
+	cmp     eax, FLAG_XGETBV_EAX_XMM_YMM
+	je      _done_rolling_hash2_run_until_data_init
+	lea     rsi, [rolling_hash2_run_until_00 WRT_OPT]
+
+_done_rolling_hash2_run_until_data_init:
+	pop     rdx
+	pop     rcx
+	pop     rbx
+	pop     rax
+%endif			;; END 32-bit check
+	mov     [rolling_hash2_run_until_dispatched], arg1
+	pop     arg1
+	ret
diff --git a/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_perf.c b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_perf.c
new file mode 100644
index 000000000..da0e0fba7
--- /dev/null
+++ b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_perf.c
@@ -0,0 +1,120 @@
+/**********************************************************************
+  Copyright(c) 2011-2017 Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdint.h>
+#include "rolling_hashx.h"
+#include "test.h"
+
+//#define CACHED_TEST
+#ifdef CACHED_TEST
+// Cached test, loop many times over small dataset
+# define TEST_LEN     8*1024
+# define TEST_LOOPS   100000
+# define TEST_TYPE_STR "_warm"
+#else
+// Uncached test.  Pull from large mem base.
+#  define GT_L3_CACHE  32*1024*1024	/* some number > last level cache */
+#  define TEST_LEN     (2 * GT_L3_CACHE)
+#  define TEST_LOOPS   50
+#  define TEST_TYPE_STR "_cold"
+#endif
+
+#ifndef FUT_run
+# define FUT_run rolling_hash2_run
+#endif
+#ifndef FUT_init
+# define FUT_init rolling_hash2_init
+#endif
+#ifndef FUT_reset
+# define FUT_reset rolling_hash2_reset
+#endif
+
+#define str(s) #s
+#define xstr(s) str(s)
+
+#ifndef TEST_SEED
+# define TEST_SEED 0x123f
+#endif
+
+#define TEST_MEM TEST_LEN
+
+int main(int argc, char *argv[])
+{
+	uint8_t *buf;
+	uint32_t mask, trigger, offset = 0;
+	int i, w, ret;
+	long long run_length;
+	struct rh_state2 *state;
+	struct perf start, stop;
+
+	// Case
+	w = 32;
+	mask = 0xffffffff;
+	trigger = 0x123;
+
+	printf(xstr(FUT_run) "_perf:\n");
+
+	buf = malloc(TEST_LEN);
+	if (buf == NULL) {
+		printf("alloc error: Fail\n");
+		return -1;
+	}
+	if (posix_memalign((void **)&state, 64, sizeof(struct rh_state2))) {
+		printf("alloc error rh_state: Fail\n");;
+		return -1;
+	}
+
+	srand(TEST_SEED);
+
+	for (i = 0; i < TEST_LEN; i++)
+		buf[i] = rand();
+
+	printf("Start timed tests\n");
+	fflush(0);
+
+	FUT_init(state, w);
+	FUT_reset(state, buf);
+	ret = FUT_run(state, buf, TEST_LEN, mask, trigger, &offset);
+
+	perf_start(&start);
+	for (i = 0; i < TEST_LOOPS; i++) {
+		ret = FUT_run(state, buf, TEST_LEN, mask, trigger, &offset);
+	}
+	perf_stop(&stop);
+
+	run_length = (ret == FINGERPRINT_RET_HIT) ? offset : TEST_LEN;
+	printf("  returned %d after %lld B\n", ret, run_length);
+	printf(xstr(FUT_run) TEST_TYPE_STR ": ");
+	perf_print(stop, start, run_length * i);
+
+	return 0;
+}
diff --git a/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_table.h b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_table.h
new file mode 100644
index 000000000..366f26374
--- /dev/null
+++ b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_table.h
@@ -0,0 +1,296 @@
+/**********************************************************************
+  Copyright(c) 2011-2017 Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+#ifndef _ROLLING_HASH2_TABLE_H_
+#define _ROLLING_HASH2_TABLE_H_
+
+// values are fractional part of pi
+// taken from:
+//   http://www.herongyang.com/Cryptography/Blowfish-First-8366-Hex-Digits-of-PI.html
+// taken from source code of BlowfishJ
+
+uint64_t rolling_hash2_table1[256] = {
+	0x243F6A8885A308D3,
+	0x13198A2E03707344,
+	0xA4093822299F31D0,
+	0x082EFA98EC4E6C89,
+	0x452821E638D01377,
+	0xBE5466CF34E90C6C,
+	0xC0AC29B7C97C50DD,
+	0x3F84D5B5B5470917,
+	0x9216D5D98979FB1B,
+	0xD1310BA698DFB5AC,
+	0x2FFD72DBD01ADFB7,
+	0xB8E1AFED6A267E96,
+	0xBA7C9045F12C7F99,
+	0x24A19947B3916CF7,
+	0x0801F2E2858EFC16,
+	0x636920D871574E69,
+	0xA458FEA3F4933D7E,
+	0x0D95748F728EB658,
+	0x718BCD5882154AEE,
+	0x7B54A41DC25A59B5,
+	0x9C30D5392AF26013,
+	0xC5D1B023286085F0,
+	0xCA417918B8DB38EF,
+	0x8E79DCB0603A180E,
+	0x6C9E0E8BB01E8A3E,
+	0xD71577C1BD314B27,
+	0x78AF2FDA55605C60,
+	0xE65525F3AA55AB94,
+	0x5748986263E81440,
+	0x55CA396A2AAB10B6,
+	0xB4CC5C341141E8CE,
+	0xA15486AF7C72E993,
+	0xB3EE1411636FBC2A,
+	0x2BA9C55D741831F6,
+	0xCE5C3E169B87931E,
+	0xAFD6BA336C24CF5C,
+	0x7A32538128958677,
+	0x3B8F48986B4BB9AF,
+	0xC4BFE81B66282193,
+	0x61D809CCFB21A991,
+	0x487CAC605DEC8032,
+	0xEF845D5DE98575B1,
+	0xDC262302EB651B88,
+	0x23893E81D396ACC5,
+	0x0F6D6FF383F44239,
+	0x2E0B4482A4842004,
+	0x69C8F04A9E1F9B5E,
+	0x21C66842F6E96C9A,
+	0x670C9C61ABD388F0,
+	0x6A51A0D2D8542F68,
+	0x960FA728AB5133A3,
+	0x6EEF0B6C137A3BE4,
+	0xBA3BF0507EFB2A98,
+	0xA1F1651D39AF0176,
+	0x66CA593E82430E88,
+	0x8CEE8619456F9FB4,
+	0x7D84A5C33B8B5EBE,
+	0xE06F75D885C12073,
+	0x401A449F56C16AA6,
+	0x4ED3AA62363F7706,
+	0x1BFEDF72429B023D,
+	0x37D0D724D00A1248,
+	0xDB0FEAD349F1C09B,
+	0x075372C980991B7B,
+	0x25D479D8F6E8DEF7,
+	0xE3FE501AB6794C3B,
+	0x976CE0BD04C006BA,
+	0xC1A94FB6409F60C4,
+	0x5E5C9EC2196A2463,
+	0x68FB6FAF3E6C53B5,
+	0x1339B2EB3B52EC6F,
+	0x6DFC511F9B30952C,
+	0xCC814544AF5EBD09,
+	0xBEE3D004DE334AFD,
+	0x660F2807192E4BB3,
+	0xC0CBA85745C8740F,
+	0xD20B5F39B9D3FBDB,
+	0x5579C0BD1A60320A,
+	0xD6A100C6402C7279,
+	0x679F25FEFB1FA3CC,
+	0x8EA5E9F8DB3222F8,
+	0x3C7516DFFD616B15,
+	0x2F501EC8AD0552AB,
+	0x323DB5FAFD238760,
+	0x53317B483E00DF82,
+	0x9E5C57BBCA6F8CA0,
+	0x1A87562EDF1769DB,
+	0xD542A8F6287EFFC3,
+	0xAC6732C68C4F5573,
+	0x695B27B0BBCA58C8,
+	0xE1FFA35DB8F011A0,
+	0x10FA3D98FD2183B8,
+	0x4AFCB56C2DD1D35B,
+	0x9A53E479B6F84565,
+	0xD28E49BC4BFB9790,
+	0xE1DDF2DAA4CB7E33,
+	0x62FB1341CEE4C6E8,
+	0xEF20CADA36774C01,
+	0xD07E9EFE2BF11FB4,
+	0x95DBDA4DAE909198,
+	0xEAAD8E716B93D5A0,
+	0xD08ED1D0AFC725E0,
+	0x8E3C5B2F8E7594B7,
+	0x8FF6E2FBF2122B64,
+	0x8888B812900DF01C,
+	0x4FAD5EA0688FC31C,
+	0xD1CFF191B3A8C1AD,
+	0x2F2F2218BE0E1777,
+	0xEA752DFE8B021FA1,
+	0xE5A0CC0FB56F74E8,
+	0x18ACF3D6CE89E299,
+	0xB4A84FE0FD13E0B7,
+	0x7CC43B81D2ADA8D9,
+	0x165FA26680957705,
+	0x93CC7314211A1477,
+	0xE6AD206577B5FA86,
+	0xC75442F5FB9D35CF,
+	0xEBCDAF0C7B3E89A0,
+	0xD6411BD3AE1E7E49,
+	0x00250E2D2071B35E,
+	0x226800BB57B8E0AF,
+	0x2464369BF009B91E,
+	0x5563911D59DFA6AA,
+	0x78C14389D95A537F,
+	0x207D5BA202E5B9C5,
+	0x832603766295CFA9,
+	0x11C819684E734A41,
+	0xB3472DCA7B14A94A,
+	0x1B5100529A532915,
+	0xD60F573FBC9BC6E4,
+	0x2B60A47681E67400,
+	0x08BA6FB5571BE91F,
+	0xF296EC6B2A0DD915,
+	0xB6636521E7B9F9B6,
+	0xFF34052EC5855664,
+	0x53B02D5DA99F8FA1,
+	0x08BA47996E85076A,
+	0x4B7A70E9B5B32944,
+	0xDB75092EC4192623,
+	0xAD6EA6B049A7DF7D,
+	0x9CEE60B88FEDB266,
+	0xECAA8C71699A17FF,
+	0x5664526CC2B19EE1,
+	0x193602A575094C29,
+	0xA0591340E4183A3E,
+	0x3F54989A5B429D65,
+	0x6B8FE4D699F73FD6,
+	0xA1D29C07EFE830F5,
+	0x4D2D38E6F0255DC1,
+	0x4CDD20868470EB26,
+	0x6382E9C6021ECC5E,
+	0x09686B3F3EBAEFC9,
+	0x3C9718146B6A70A1,
+	0x687F358452A0E286,
+	0xB79C5305AA500737,
+	0x3E07841C7FDEAE5C,
+	0x8E7D44EC5716F2B8,
+	0xB03ADA37F0500C0D,
+	0xF01C1F040200B3FF,
+	0xAE0CF51A3CB574B2,
+	0x25837A58DC0921BD,
+	0xD19113F97CA92FF6,
+	0x9432477322F54701,
+	0x3AE5E58137C2DADC,
+	0xC8B576349AF3DDA7,
+	0xA94461460FD0030E,
+	0xECC8C73EA4751E41,
+	0xE238CD993BEA0E2F,
+	0x3280BBA1183EB331,
+	0x4E548B384F6DB908,
+	0x6F420D03F60A04BF,
+	0x2CB8129024977C79,
+	0x5679B072BCAF89AF,
+	0xDE9A771FD9930810,
+	0xB38BAE12DCCF3F2E,
+	0x5512721F2E6B7124,
+	0x501ADDE69F84CD87,
+	0x7A5847187408DA17,
+	0xBC9F9ABCE94B7D8C,
+	0xEC7AEC3ADB851DFA,
+	0x63094366C464C3D2,
+	0xEF1C18473215D908,
+	0xDD433B3724C2BA16,
+	0x12A14D432A65C451,
+	0x50940002133AE4DD,
+	0x71DFF89E10314E55,
+	0x81AC77D65F11199B,
+	0x043556F1D7A3C76B,
+	0x3C11183B5924A509,
+	0xF28FE6ED97F1FBFA,
+	0x9EBABF2C1E153C6E,
+	0x86E34570EAE96FB1,
+	0x860E5E0A5A3E2AB3,
+	0x771FE71C4E3D06FA,
+	0x2965DCB999E71D0F,
+	0x803E89D65266C825,
+	0x2E4CC9789C10B36A,
+	0xC6150EBA94E2EA78,
+	0xA5FC3C531E0A2DF4,
+	0xF2F74EA7361D2B3D,
+	0x1939260F19C27960,
+	0x5223A708F71312B6,
+	0xEBADFE6EEAC31F66,
+	0xE3BC4595A67BC883,
+	0xB17F37D1018CFF28,
+	0xC332DDEFBE6C5AA5,
+	0x6558218568AB9802,
+	0xEECEA50FDB2F953B,
+	0x2AEF7DAD5B6E2F84,
+	0x1521B62829076170,
+	0xECDD4775619F1510,
+	0x13CCA830EB61BD96,
+	0x0334FE1EAA0363CF,
+	0xB5735C904C70A239,
+	0xD59E9E0BCBAADE14,
+	0xEECC86BC60622CA7,
+	0x9CAB5CABB2F3846E,
+	0x648B1EAF19BDF0CA,
+	0xA02369B9655ABB50,
+	0x40685A323C2AB4B3,
+	0x319EE9D5C021B8F7,
+	0x9B540B19875FA099,
+	0x95F7997E623D7DA8,
+	0xF837889A97E32D77,
+	0x11ED935F16681281,
+	0x0E358829C7E61FD6,
+	0x96DEDFA17858BA99,
+	0x57F584A51B227263,
+	0x9B83C3FF1AC24696,
+	0xCDB30AEB532E3054,
+	0x8FD948E46DBC3128,
+	0x58EBF2EF34C6FFEA,
+	0xFE28ED61EE7C3C73,
+	0x5D4A14D9E864B7E3,
+	0x42105D14203E13E0,
+	0x45EEE2B6A3AAABEA,
+	0xDB6C4F15FACB4FD0,
+	0xC742F442EF6ABBB5,
+	0x654F3B1D41CD2105,
+	0xD81E799E86854DC7,
+	0xE44B476A3D816250,
+	0xCF62A1F25B8D2646,
+	0xFC8883A0C1C7B6A3,
+	0x7F1524C369CB7492,
+	0x47848A0B5692B285,
+	0x095BBF00AD19489D,
+	0x1462B17423820E00,
+	0x58428D2A0C55F5EA,
+	0x1DADF43E233F7061,
+	0x3372F0928D937E41,
+	0xD65FECF16C223BDB,
+	0x7CDE3759CBEE7460,
+	0x4085F2A7CE77326E,
+	0xA607808419F8509E,
+	0xE8EFD85561D99735,
+	0xA969A7AAC50C06C2,
+};
+#endif // _ROLLING_HASH2_TABLE_H_
diff --git a/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_test.c b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_test.c
new file mode 100644
index 000000000..ee45c120d
--- /dev/null
+++ b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_test.c
@@ -0,0 +1,314 @@
+/**********************************************************************
+  Copyright(c) 2011-2017 Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdarg.h>
+#include <string.h>
+#include <stdio.h>
+#include "rolling_hashx.h"
+
+#ifndef FUT_run
+# define FUT_run rolling_hash2_run
+#endif
+#ifndef FUT_init
+# define FUT_init rolling_hash2_init
+#endif
+#ifndef FUT_reset
+# define FUT_reset rolling_hash2_reset
+#endif
+#ifndef FUT_ref
+# define FUT_ref rolling_hash2_ref
+#endif
+
+#define str(s) #s
+#define xstr(s) str(s)
+
+#define MAX_BUFFER_SIZE 128*1024*1024
+#define MAX_ROLLING_HASH_WIDTH 32
+
+#ifndef RANDOMS
+# define RANDOMS 200
+#endif
+#ifndef TEST_SEED
+# define TEST_SEED 0x1234
+#endif
+
+static
+uint64_t rolling_hash2_ref(struct rh_state2 *state, unsigned char *p, int len,
+			   uint64_t hash_init)
+{
+	int i;
+	uint64_t h = hash_init;
+
+	for (i = 0; i < len; i++) {
+		h = (h << 1) | (h >> (64 - 1));
+		h ^= state->table1[*p++];
+	}
+	return h;
+}
+
+int ones_in_mask(uint32_t in)
+{
+	int count;
+
+	for (count = 0; in != 0; in &= (in - 1))
+		count++;
+
+	return count;
+}
+
+/*
+ * Utility function to pick a random mask.  Not uniform in number of bits.
+ */
+uint32_t pick_rand_mask_in_range(int min_bits, int max_bits)
+{
+	uint32_t mask = 0;
+	int ones;
+
+	do {
+		mask = rand();
+#if defined(_WIN32) || defined(_WIN64)
+		mask = (mask << 16) ^ rand();
+#endif
+		ones = ones_in_mask(mask);
+	} while (ones < min_bits || ones > max_bits);
+
+	return mask;
+}
+
+int main(void)
+{
+	uint8_t *buffer;
+	uint64_t hash;
+	uint32_t mask, trigger, offset = 0;
+	int i, w, r, ret, max, errors = 0;
+	uint32_t offset_fut;
+	struct rh_state2 state;
+
+	printf(xstr(FUT_run) ": " xstr(MAX_BUFFER_SIZE));
+
+	buffer = malloc(MAX_BUFFER_SIZE);
+	if (buffer == NULL) {
+		printf("cannot allocate mem\n");
+		return -1;
+	}
+	srand(TEST_SEED);
+
+	// Test case 1, compare trigger case at boundary with reference hash
+	w = 32;
+	mask = 0xffff0;
+	trigger = 0x3df0;
+	trigger &= mask;
+
+	for (i = 0; i < MAX_BUFFER_SIZE; i++)
+		buffer[i] = rand();
+
+	FUT_init(&state, w);
+	FUT_reset(&state, buffer);
+
+	uint8_t *p = buffer;
+	int remain = MAX_BUFFER_SIZE;
+	ret = FINGERPRINT_RET_HIT;
+
+	while ((ret == FINGERPRINT_RET_HIT) && (remain > 0)) {
+		ret = FUT_run(&state, p, remain, mask, trigger, &offset);
+
+		if (offset > remain) {
+			printf(" error offset past remaining limit\n");
+			errors++;
+		}
+
+		if ((ret == FINGERPRINT_RET_HIT) && (&p[offset] > &buffer[w])) {
+			hash = FUT_ref(&state, &p[offset] - w, w, 0);
+			if ((hash & mask) != trigger) {
+				printf("   mismatch chunk from ref");
+				printf(" hit: offset=%d %lx %lx\n", offset, state.hash, hash);
+				errors++;
+			}
+		}
+		p += offset;
+		remain -= offset;
+		putchar('.');
+	}
+
+	putchar('.');		// Finished test 1
+
+	// Test case 2, check if reference function hits same chunk boundary as test
+
+	w = 32;
+	mask = 0xffff;
+	trigger = rand();
+	trigger &= mask;
+	p = buffer;
+
+	// Function under test
+	FUT_init(&state, w);
+	FUT_reset(&state, p);
+	ret = FUT_run(&state, p + w, MAX_BUFFER_SIZE - w, mask, trigger, &offset_fut);
+	offset_fut += w;
+
+	// Reference
+	for (p++, offset = w + 1; offset < MAX_BUFFER_SIZE; offset++) {
+		hash = FUT_ref(&state, p++, w, 0);
+		if ((hash & mask) == trigger)
+			break;
+	}
+
+	if (offset != offset_fut) {
+		printf("\ncase 2, offset of chunk different from ref\n");
+		printf("  case 2: stop fut at offset=%d\n", offset_fut);
+		printf("  case 2: stop ref at offset=%d\n", offset);
+		errors++;
+		return errors;
+	}
+	putchar('.');		// Finished test 2
+
+	// Do case 2 above with random args
+
+	for (r = 0; r < RANDOMS; r++) {
+		w = rand() % MAX_ROLLING_HASH_WIDTH;
+		if (w < 3)
+			continue;
+
+		mask = pick_rand_mask_in_range(4, 20);
+		trigger = rand() & mask;
+		p = buffer;
+
+		// Function under test
+		FUT_init(&state, w);
+		FUT_reset(&state, p);
+		ret = FUT_run(&state, p + w, MAX_BUFFER_SIZE - w, mask, trigger, &offset_fut);
+		offset_fut += w;
+
+		// Reference
+		for (p++, offset = w + 1; offset < MAX_BUFFER_SIZE; offset++) {
+			hash = FUT_ref(&state, p++, w, 0);
+			if ((hash & mask) == trigger)
+				break;
+		}
+
+		if (offset != offset_fut) {
+			printf("\nrand case 2 #%d: w=%d, mask=0x%x, trigger=0x%x\n", r, w,
+			       mask, trigger);
+			printf("  offset of chunk different from ref\n");
+			printf("  case 2r: stop fut at offset=%d\n", offset_fut);
+			printf("  case 2r: stop ref at offset=%d\n", offset);
+			errors++;
+			return errors;
+		}
+		putchar('.');
+	}
+
+	// Test case 3, check if max bound is same
+
+	w = 32;
+	mask = 0xfffff;
+	trigger = rand();
+	trigger &= mask;
+	putchar('|');
+
+	for (max = w + 1; max < 500; max++) {
+		p = buffer;
+		FUT_init(&state, w);
+		FUT_reset(&state, p);
+
+		ret = FUT_run(&state, p + w, max - w, mask, trigger, &offset_fut);
+		offset_fut += w;
+
+		int ret_ref = FINGERPRINT_RET_MAX;
+		for (p++, offset = w + 1; offset < max; offset++) {
+			hash = FUT_ref(&state, p++, w, 0);
+			if ((hash & mask) == trigger) {
+				ret_ref = FINGERPRINT_RET_HIT;
+				break;
+			}
+		}
+
+		if (offset != offset_fut || ret != ret_ref) {
+			printf("\ncase 3 max=%d, offset of chunk different from ref\n", max);
+			printf("  case 3: stop fut at offset=%d\n", offset_fut);
+			printf("  case 3: stop ref at offset=%d\n", offset);
+			printf("  case 3: ret_fut=%d ret_ref=%d\n", ret, ret_ref);
+			errors++;
+			return errors;
+		}
+		putchar('.');	// Finished test 3
+	}
+
+	// Test case 4, check if max bound is same under random params
+
+	for (r = 0; r < RANDOMS; r++) {
+		p = buffer;
+		mask = pick_rand_mask_in_range(24, 30);	// Pick an unlikely mask
+		trigger = rand() & mask;
+		w = rand() % MAX_ROLLING_HASH_WIDTH;
+		max = rand() % 1024;
+
+		if (w < 3 || max < 2 * MAX_ROLLING_HASH_WIDTH)
+			continue;
+
+		FUT_init(&state, w);
+		FUT_reset(&state, p);
+
+		ret = FUT_run(&state, p, max, mask, trigger, &offset_fut);
+
+		if (offset_fut <= w)
+			continue;
+
+		int ret_ref = FINGERPRINT_RET_MAX;
+		for (p++, offset = w + 1; offset < max; offset++) {
+			hash = FUT_ref(&state, p++, w, 0);
+			if ((hash & mask) == trigger) {
+				ret_ref = FINGERPRINT_RET_HIT;
+				break;
+			}
+		}
+
+		if (offset != offset_fut || ret != ret_ref) {
+			printf("\ncase 4 rand case different from ref, max=%d w=%d\n", max, w);
+			printf("  case 4: stop fut at offset=%d\n", offset_fut);
+			printf("  case 4: stop ref at offset=%d\n", offset);
+			printf("  case 4: ret_fut=%d ret_ref=%d\n", ret, ret_ref);
+			errors++;
+			return errors;
+		}
+		putchar('.');	// Finished test 4
+
+		if (ret == FINGERPRINT_RET_HIT) {
+			p[-1] = rand();	// Keep hits from repeating
+		}
+	}
+
+	if (errors > 0)
+		printf(" Fail: %d\n", errors);
+	else
+		printf(" Pass\n");
+	return errors;
+}
diff --git a/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_until_00.asm b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_until_00.asm
new file mode 100644
index 000000000..99091faa4
--- /dev/null
+++ b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_until_00.asm
@@ -0,0 +1,204 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2017 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;; uint64_t rolling_hash2_run_until_00(uint32_t *idx, uint32_t buffer_length, uint64_t *t1,
+;;; 			uint64_t *t2, uint8_t *b1, uint8_t *b2, uint64_t h, uint64_t mask,
+;;;			uint64_t trigger)
+
+%include "reg_sizes.asm"
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define arg6  r10
+ %define arg7  r11
+ %define arg8  r12		; must be saved and loaded
+ %define tmp1  rbp		; must be saved and loaded
+ %define tmp2  rbx		; must be saved and loaded
+ %define tmp3  r13		; must be saved and loaded
+ %define tmp4  r14		; must be saved and loaded
+ %define tmp5  r15		; must be saved and loaded
+ %define return rax
+ %define PS 8
+ %define frame_size 6*8
+ %define arg(x)      [rsp + frame_size + PS + PS*x]
+
+ %define func(x) x:
+ %macro FUNC_SAVE 0
+	push	rbp
+	push	rbx
+	push	r12
+	push	r13
+	push	r14
+	push	r15
+	mov	arg6, arg(0)
+	mov	arg7, arg(1)
+	mov	arg8, arg(2)
+ %endmacro
+ %macro FUNC_RESTORE 0
+	pop	r15
+	pop	r14
+	pop	r13
+	pop	r12
+	pop	rbx
+	pop	rbp
+ %endmacro
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+ %define arg4   r12 		; must be saved and loaded
+ %define arg5   r13 		; must be saved and loaded
+ %define arg6   r14 		; must be saved and loaded
+ %define arg7   r15 		; must be saved and loaded
+ %define arg8   rbx 		; must be saved and loaded
+ %define tmp1   r10
+ %define tmp2   r11
+ %define tmp3   rdi 		; must be saved and loaded
+ %define tmp4   rsi 		; must be saved and loaded
+ %define tmp5   rbp 		; must be saved and loaded
+ %define return rax
+ %define PS 8
+ %define frame_size 8*8
+ %define arg(x)      [rsp + frame_size + PS + PS*x]
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+	push_reg	r12
+	push_reg	r13
+	push_reg	r14
+	push_reg	r15
+	push_reg	rbx
+	push_reg	rdi
+	push_reg	rsi
+	push_reg	rbp
+	end_prolog
+	mov	arg4, arg(4)
+	mov	arg5, arg(5)
+	mov	arg6, arg(6)
+	mov	arg7, arg(7)
+	mov	arg8, arg(8)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+	pop	rbp
+	pop	rsi
+	pop	rdi
+	pop	rbx
+	pop	r15
+	pop	r14
+	pop	r13
+	pop	r12
+ %endmacro
+%endif
+
+%define idx   arg0
+%define max   arg1
+%define t1    arg2
+%define t2    arg3
+%define b1    arg4
+%define b2    arg5
+%define hash  arg6
+%define mask  arg7
+%define trigger arg8
+
+%define pos   rax
+%define pos.w eax
+%define x     tmp2
+%define y     tmp3
+%define z     tmp4
+%define h     tmp1
+%define a     tmp5
+
+default rel
+[bits 64]
+section .text
+
+align 16
+mk_global rolling_hash2_run_until_00, function
+func(rolling_hash2_run_until_00)
+	endbranch
+	FUNC_SAVE
+	mov	pos.w, dword [idx]
+	sub	max, 2
+	cmp	pos, max
+	jg	.less_than_2
+
+.loop2:	ror	hash, 0x3f
+	movzx	x, byte [b1 + pos]
+	movzx	a, byte [b1 + pos + 1]
+	movzx	y, byte [b2 + pos]
+	movzx	h, byte [b2 + pos + 1]
+	mov	z, [t1 + x * 8]
+	xor	z, [t2 + y * 8]
+	xor	hash, z
+	mov	x, hash
+	and	x, mask
+	cmp	x, trigger
+	je	.ret_0
+
+	ror	hash, 0x3f
+	mov	z, [t1 + a * 8]
+	xor	z, [t2 + h * 8]
+	xor	hash, z
+	mov	y, hash
+	and	y, mask
+	cmp	y, trigger
+	je	.ret_1
+
+	add	pos, 2
+	cmp	pos, max
+	jle	.loop2
+
+.less_than_2:
+	add	max, 1
+	cmp	pos, max
+	jg	.ret_0
+	ror	hash, 0x3f
+	movzx	x, byte [b1 + pos]
+	movzx	y, byte [b2 + pos]
+	mov	z, [t1 + x * 8]
+	xor	z, [t2 + y * 8]
+	xor	hash, z
+.ret_1:	add	pos, 1
+.ret_0:	mov	dword [idx], pos.w
+	mov	rax, hash
+	FUNC_RESTORE
+	ret
+
+endproc_frame
+
+section .data
diff --git a/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_until_04.asm b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_until_04.asm
new file mode 100644
index 000000000..3f4e8353b
--- /dev/null
+++ b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hash2_until_04.asm
@@ -0,0 +1,203 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2017 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;; uint64_t rolling_hash2_run_until_04(uint32_t *idx, uint32_t max_idx, uint64_t *t1,
+;;; 			uint64_t *t2, uint8_t *b1, uint8_t *b2, uint64_t h, uint64_t mask,
+;;;			uint64_t trigger)
+
+%include "reg_sizes.asm"
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define arg6  r10
+ %define arg7  r11
+ %define arg8  r12		; must be saved and loaded
+ %define tmp1  rbp		; must be saved and loaded
+ %define tmp2  rbx		; must be saved and loaded
+ %define tmp3  r13		; must be saved and loaded
+ %define tmp4  r14		; must be saved and loaded
+ %define tmp5  r15		; must be saved and loaded
+ %define return rax
+ %define PS 8
+ %define frame_size 6*8
+ %define arg(x)      [rsp + frame_size + PS + PS*x]
+
+ %define func(x) x:
+ %macro FUNC_SAVE 0
+	push	rbp
+	push	rbx
+	push	r12
+	push	r13
+	push	r14
+	push	r15
+	mov	arg6, arg(0)
+	mov	arg7, arg(1)
+	mov	arg8, arg(2)
+ %endmacro
+ %macro FUNC_RESTORE 0
+	pop	r15
+	pop	r14
+	pop	r13
+	pop	r12
+	pop	rbx
+	pop	rbp
+ %endmacro
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+ %define arg4   r12 		; must be saved and loaded
+ %define arg5   r13 		; must be saved and loaded
+ %define arg6   r14 		; must be saved and loaded
+ %define arg7   r15 		; must be saved and loaded
+ %define arg8   rbx 		; must be saved and loaded
+ %define tmp1   r10
+ %define tmp2   r11
+ %define tmp3   rdi 		; must be saved and loaded
+ %define tmp4   rsi 		; must be saved and loaded
+ %define tmp5   rbp 		; must be saved and loaded
+ %define return rax
+ %define PS 8
+ %define frame_size 8*8
+ %define arg(x)      [rsp + frame_size + PS + PS*x]
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+	push_reg	r12
+	push_reg	r13
+	push_reg	r14
+	push_reg	r15
+	push_reg	rbx
+	push_reg	rdi
+	push_reg	rsi
+	push_reg	rbp
+	end_prolog
+	mov	arg4, arg(4)
+	mov	arg5, arg(5)
+	mov	arg6, arg(6)
+	mov	arg7, arg(7)
+	mov	arg8, arg(8)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+	pop	rbp
+	pop	rsi
+	pop	rdi
+	pop	rbx
+	pop	r15
+	pop	r14
+	pop	r13
+	pop	r12
+ %endmacro
+%endif
+
+%define idx   arg0
+%define max   arg1
+%define t1    arg2
+%define t2    arg3
+%define b1    arg4
+%define b2    arg5
+%define hash  arg6
+%define mask  arg7
+%define trigger arg8
+
+%define pos   rax
+%define pos.w eax
+%define x     tmp2
+%define y     tmp3
+%define z     tmp4
+%define h     tmp1
+%define a     tmp5
+
+default rel
+[bits 64]
+section .text
+
+align 16
+mk_global rolling_hash2_run_until_04, function
+func(rolling_hash2_run_until_04)
+	endbranch
+	FUNC_SAVE
+	mov	pos.w, dword [idx]
+	pext	trigger, trigger, mask
+	sub	max, 2
+	cmp	pos, max
+	jg	.less_than_2
+
+.loop2:	rorx	hash, hash, 0x3f
+	movzx	x, byte [b1 + pos]
+	movzx	a, byte [b1 + pos + 1]
+	movzx	y, byte [b2 + pos]
+	movzx	h, byte [b2 + pos + 1]
+	mov	z, [t1 + x * 8]
+	xor	z, [t2 + y * 8]
+	xor	hash, z
+	pext	x, hash, mask
+	cmp	x, trigger
+	je	.ret_0
+
+	rorx	hash, hash, 0x3f
+	mov	z, [t1 + a * 8]
+	xor	z, [t2 + h * 8]
+	xor	hash, z
+	pext	y, hash, mask
+	cmp	y, trigger
+	je	.ret_1
+
+	add	pos, 2
+	cmp	pos, max
+	jle	.loop2
+
+.less_than_2:
+	add	max, 1
+	cmp	pos, max
+	jg	.ret_0
+	rorx	hash, hash, 0x3f
+	movzx	x, byte [b1 + pos]
+	movzx	y, byte [b2 + pos]
+	mov	z, [t1 + x * 8]
+	xor	z, [t2 + y * 8]
+	xor	hash, z
+.ret_1:	add	pos, 1
+.ret_0:	mov	dword [idx], pos.w
+	mov	rax, hash
+	FUNC_RESTORE
+	ret
+
+endproc_frame
+
+section .data
diff --git a/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hashx_base.c b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hashx_base.c
new file mode 100644
index 000000000..4197def0e
--- /dev/null
+++ b/src/crypto/isa-l/isa-l_crypto/rolling_hash/rolling_hashx_base.c
@@ -0,0 +1,65 @@
+/**********************************************************************
+  Copyright(c) 2011-2017 Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+#include <stdint.h>
+#ifdef _MSC_VER
+# define inline __inline
+#endif
+
+inline int floor_pow2(uint32_t in)
+{
+	uint32_t x = in;
+
+	while (in) {
+		x = in;
+		in &= (in - 1);
+	}
+	return x;
+}
+
+inline uint32_t rol(uint32_t x, int i)
+{
+	return x << i | x >> (8 * sizeof(x) - i);
+}
+
+uint32_t rolling_hashx_mask_gen(long mean, int shift)
+{
+	if (mean <= 2)
+		mean = 2;
+
+	return rol(floor_pow2(mean) - 1, shift);
+}
+
+struct slver {
+	uint16_t snum;
+	uint8_t ver;
+	uint8_t core;
+};
+struct slver rolling_hashx_mask_gen_slver_00000260;
+struct slver rolling_hashx_mask_gen_slver = { 0x0260, 0x00, 0x00 };