diff options
Diffstat (limited to 'src/spdk/dpdk/config/x86/meson.build')
-rw-r--r-- | src/spdk/dpdk/config/x86/meson.build | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/src/spdk/dpdk/config/x86/meson.build b/src/spdk/dpdk/config/x86/meson.build new file mode 100644 index 000000000..adc857ba2 --- /dev/null +++ b/src/spdk/dpdk/config/x86/meson.build @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2017-2019 Intel Corporation + +# get binutils version for the workaround of Bug 97 +if not is_windows + ldver = run_command('ld', '-v').stdout().strip() + if ldver.contains('2.30') and cc.has_argument('-mno-avx512f') + machine_args += '-mno-avx512f' + message('Binutils 2.30 detected, disabling AVX512 support as workaround for bug #97') + endif + if ldver.contains('2.31') and cc.has_argument('-mno-avx512f') + machine_args += '-mno-avx512f' + message('Binutils 2.31 detected, disabling AVX512 support as workaround for bug #249') + endif +endif + +# we require SSE4.2 for DPDK +if cc.get_define('__SSE4_2__', args: machine_args) == '' + message('SSE 4.2 not enabled by default, explicitly enabling') + machine_args += '-msse4' +endif + +base_flags = ['SSE', 'SSE2', 'SSE3','SSSE3', 'SSE4_1', 'SSE4_2'] +foreach f:base_flags + dpdk_conf.set('RTE_MACHINE_CPUFLAG_' + f, 1) + compile_time_cpuflags += ['RTE_CPUFLAG_' + f] +endforeach + +optional_flags = ['AES', 'PCLMUL', + 'AVX', 'AVX2', 'AVX512F', + 'RDRND', 'RDSEED'] +foreach f:optional_flags + if cc.get_define('__@0@__'.format(f), args: machine_args) == '1' + if f == 'PCLMUL' # special case flags with different defines + f = 'PCLMULQDQ' + elif f == 'RDRND' + f = 'RDRAND' + endif + dpdk_conf.set('RTE_MACHINE_CPUFLAG_' + f, 1) + compile_time_cpuflags += ['RTE_CPUFLAG_' + f] + endif +endforeach + + +dpdk_conf.set('RTE_ARCH_X86', 1) +if dpdk_conf.get('RTE_ARCH_64') + dpdk_conf.set('RTE_ARCH_X86_64', 1) + dpdk_conf.set('RTE_ARCH', 'x86_64') +else + dpdk_conf.set('RTE_ARCH_I686', 1) + dpdk_conf.set('RTE_ARCH', 'i686') +endif + +dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) |