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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-21 17:43:51 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-21 17:43:51 +0000 |
commit | be58c81aff4cd4c0ccf43dbd7998da4a6a08c03b (patch) | |
tree | 779c248fb61c83f65d1f0dc867f2053d76b4e03a /include/drivers/nxp/tzc/plat_tzc380.h | |
parent | Initial commit. (diff) | |
download | arm-trusted-firmware-upstream.tar.xz arm-trusted-firmware-upstream.zip |
Adding upstream version 2.10.0+dfsg.upstream/2.10.0+dfsgupstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'include/drivers/nxp/tzc/plat_tzc380.h')
-rw-r--r-- | include/drivers/nxp/tzc/plat_tzc380.h | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/include/drivers/nxp/tzc/plat_tzc380.h b/include/drivers/nxp/tzc/plat_tzc380.h new file mode 100644 index 0000000..08d2148 --- /dev/null +++ b/include/drivers/nxp/tzc/plat_tzc380.h @@ -0,0 +1,47 @@ +/* + * Copyright 2018-2021 NXP + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#if !defined(PLAT_TZC380_H) && defined(IMAGE_BL2) +#define PLAT_TZC380_H + +#include <tzc380.h> + +/* Number of DRAM regions to be configured + * for the platform can be over-written. + * + * Array tzc400_reg_list too, needs be over-written + * if there is any changes to default DRAM region + * configuration. + */ +#ifndef MAX_NUM_TZC_REGION +/* 3 regions: + * Region 0(default), + * Region 1 (DRAM0, Secure Memory), + * Region 2 (DRAM0, Shared memory) + */ +#define MAX_NUM_TZC_REGION 3 +#define DEFAULT_TZASC_CONFIG 1 +#endif + +struct tzc380_reg { + unsigned int secure; + unsigned int enabled; + uint64_t addr; + uint64_t size; + unsigned int sub_mask; +}; + +void mem_access_setup(uintptr_t base, uint32_t total_regions, + struct tzc380_reg *tzc380_reg_list); + +int populate_tzc380_reg_list(struct tzc380_reg *tzc380_reg_list, + int dram_idx, int list_idx, + uint64_t dram_start_addr, + uint64_t dram_size, + uint32_t secure_dram_sz, + uint32_t shrd_dram_sz); + +#endif /* PLAT_TZC380_H */ |