diff options
author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-21 17:43:51 +0000 |
---|---|---|
committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-21 17:43:51 +0000 |
commit | be58c81aff4cd4c0ccf43dbd7998da4a6a08c03b (patch) | |
tree | 779c248fb61c83f65d1f0dc867f2053d76b4e03a /plat/aspeed/ast2700/include/platform_def.h | |
parent | Initial commit. (diff) | |
download | arm-trusted-firmware-upstream.tar.xz arm-trusted-firmware-upstream.zip |
Adding upstream version 2.10.0+dfsg.upstream/2.10.0+dfsgupstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'plat/aspeed/ast2700/include/platform_def.h')
-rw-r--r-- | plat/aspeed/ast2700/include/platform_def.h | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/plat/aspeed/ast2700/include/platform_def.h b/plat/aspeed/ast2700/include/platform_def.h new file mode 100644 index 0000000..8be26c3 --- /dev/null +++ b/plat/aspeed/ast2700/include/platform_def.h @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2023, Aspeed Technology Inc. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef PLATFORM_DEF_H +#define PLATFORM_DEF_H + +#include <arch.h> +#include <plat/common/common_def.h> +#include <platform_reg.h> + +#define PLATFORM_STACK_SIZE UL(0x1000) + +/* cpu topology */ +#define PLATFORM_SYSTEM_COUNT U(1) +#define PLATFORM_CLUSTER_COUNT U(1) +#define PLATFORM_CORE_PRIMARY U(0) +#define PLATFORM_CORE_COUNT_PER_CLUSTER U(4) +#define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER_COUNT * \ + PLATFORM_CORE_COUNT_PER_CLUSTER) + +/* arch timer */ +#define PLAT_SYSCNT_CLKIN_HZ U(1600000000) + +/* power domain */ +#define PLAT_MAX_PWR_LVL U(1) +#define PLAT_NUM_PWR_DOMAINS U(5) +#define PLAT_MAX_RET_STATE U(1) +#define PLAT_MAX_OFF_STATE U(2) + +/* cache line size */ +#define CACHE_WRITEBACK_SHIFT U(6) +#define CACHE_WRITEBACK_GRANULE (U(1) << CACHE_WRITEBACK_SHIFT) + +/* translation tables */ +#define PLAT_PHY_ADDR_SPACE_SIZE (ULL(1) << 36) +#define PLAT_VIRT_ADDR_SPACE_SIZE (ULL(1) << 40) +#define MAX_XLAT_TABLES U(8) +#define MAX_MMAP_REGIONS U(32) + +/* BL31 region */ +#define BL31_BASE ULL(0x430000000) +#define BL31_SIZE SZ_512K +#define BL31_LIMIT (BL31_BASE + BL31_SIZE) + +/* BL32 region */ +#define BL32_BASE BL31_LIMIT +#define BL32_SIZE SZ_16M +#define BL32_LIMIT (BL32_BASE + BL32_SIZE) + +/* console */ +#define CONSOLE_UART_BASE UART12_BASE +#define CONSOLE_UART_CLKIN_HZ U(1846153) +#define CONSOLE_UART_BAUDRATE U(115200) + +#endif /* PLATFORM_DEF_H */ |