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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-21 17:43:51 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-21 17:43:51 +0000 |
commit | be58c81aff4cd4c0ccf43dbd7998da4a6a08c03b (patch) | |
tree | 779c248fb61c83f65d1f0dc867f2053d76b4e03a /plat/qti/msm8916/aarch32 | |
parent | Initial commit. (diff) | |
download | arm-trusted-firmware-be58c81aff4cd4c0ccf43dbd7998da4a6a08c03b.tar.xz arm-trusted-firmware-be58c81aff4cd4c0ccf43dbd7998da4a6a08c03b.zip |
Adding upstream version 2.10.0+dfsg.upstream/2.10.0+dfsgupstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'plat/qti/msm8916/aarch32')
-rw-r--r-- | plat/qti/msm8916/aarch32/msm8916_helpers.S | 145 | ||||
-rw-r--r-- | plat/qti/msm8916/aarch32/uartdm_console.S | 183 |
2 files changed, 328 insertions, 0 deletions
diff --git a/plat/qti/msm8916/aarch32/msm8916_helpers.S b/plat/qti/msm8916/aarch32/msm8916_helpers.S new file mode 100644 index 0000000..dc35043 --- /dev/null +++ b/plat/qti/msm8916/aarch32/msm8916_helpers.S @@ -0,0 +1,145 @@ +/* + * Copyright (c) 2021-2023, Stephan Gerhold <stephan@gerhold.net> + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include <arch.h> +#include <asm_macros.S> +#include <platform_def.h> + +#include <msm8916_mmap.h> + +#if PLATFORM_CORE_COUNT > 1 +#define APCS_TCM_START_ADDR 0x10 +#else +#define APCS_TCM_START_ADDR 0x34 +#endif +#define APCS_TCM_REDIRECT_EN_0 BIT_32(0) + + .globl plat_crash_console_init + .globl plat_crash_console_putc + .globl plat_crash_console_flush + .globl plat_panic_handler + .globl plat_my_core_pos + .globl plat_get_my_entrypoint + .globl plat_reset_handler + .globl platform_mem_init + .globl msm8916_entry_point + + /* ------------------------------------------------- + * int plat_crash_console_init(void) + * Initialize the crash console. + * Out: r0 - 1 on success, 0 on error + * Clobber list : r0 - r4 + * ------------------------------------------------- + */ +func plat_crash_console_init + ldr r1, =BLSP_UART_BASE + mov r0, #1 + b console_uartdm_core_init +endfunc plat_crash_console_init + + /* ------------------------------------------------- + * int plat_crash_console_putc(int c) + * Print a character on the crash console. + * In : r0 - character to be printed + * Out: r0 - printed character on success + * Clobber list : r1, r2 + * ------------------------------------------------- + */ +func plat_crash_console_putc + ldr r1, =BLSP_UART_BASE + b console_uartdm_core_putc +endfunc plat_crash_console_putc + + /* ------------------------------------------------- + * void plat_crash_console_flush(void) + * Force a write of all buffered data that has not + * been output. + * Clobber list : r1, r2 + * ------------------------------------------------- + */ +func plat_crash_console_flush + ldr r1, =BLSP_UART_BASE + b console_uartdm_core_flush +endfunc plat_crash_console_flush + + /* ------------------------------------------------- + * void plat_panic_handler(void) __dead + * Called when an unrecoverable error occurs. + * ------------------------------------------------- + */ +func plat_panic_handler + /* Try to shutdown/reset */ + ldr r0, =MPM_PS_HOLD + mov r1, #0 + str r1, [r0] +1: b 1b +endfunc plat_panic_handler + + /* ------------------------------------------------- + * unsigned int plat_my_core_pos(void) + * Out: r0 - index of the calling CPU + * ------------------------------------------------- + */ +func plat_my_core_pos + .if PLATFORM_CORE_COUNT > 1 + ldcopr r1, MPIDR + and r0, r1, #MPIDR_CPU_MASK + .if PLATFORM_CLUSTER_COUNT > 1 + and r1, r1, #MPIDR_CLUSTER_MASK + orr r0, r0, r1, LSR #(MPIDR_AFFINITY_BITS - \ + PLATFORM_CPU_PER_CLUSTER_SHIFT) + .endif + .else + /* There is just a single core so always 0 */ + mov r0, #0 + .endif + bx lr +endfunc plat_my_core_pos + + /* ------------------------------------------------- + * uintptr_t plat_get_my_entrypoint(void) + * Distinguish cold and warm boot and return warm boot + * entry address if available. + * Out: r0 - warm boot entry point or 0 on cold boot + * ------------------------------------------------- + */ +func plat_get_my_entrypoint + ldr r0, =msm8916_entry_point + ldr r0, [r0] + cmp r0, #0 + bxne lr + + /* + * Cold boot: Disable TCM redirect to L2 cache as early as + * possible to avoid crashes when making use of the cache. + */ + ldr r1, =APCS_CFG(0) + ldr r2, [r1, #APCS_TCM_START_ADDR] + and r2, r2, #~APCS_TCM_REDIRECT_EN_0 + str r2, [r1, #APCS_TCM_START_ADDR] + bx lr +endfunc plat_get_my_entrypoint + + /* ------------------------------------------------- + * void platform_mem_init(void) + * Performs additional memory initialization early + * in the boot process. + * ------------------------------------------------- + */ +func platform_mem_init + /* Nothing to do here, all memory is already initialized */ + bx lr +endfunc platform_mem_init + + .data + .align 3 + + /* ------------------------------------------------- + * Warm boot entry point for CPU. Set by PSCI code. + * ------------------------------------------------- + */ +msm8916_entry_point: + .word 0 diff --git a/plat/qti/msm8916/aarch32/uartdm_console.S b/plat/qti/msm8916/aarch32/uartdm_console.S new file mode 100644 index 0000000..a19776a --- /dev/null +++ b/plat/qti/msm8916/aarch32/uartdm_console.S @@ -0,0 +1,183 @@ +/* + * Copyright (c) 2021-2023, Stephan Gerhold <stephan@gerhold.net> + * + * Based on aarch32/skeleton_console.S: + * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include <asm_macros.S> +#include <console_macros.S> + +/* UART DM registers */ +#define UART_DM_DMEN 0x03c /* DMA / data packing */ +#define UART_DM_SR 0x0a4 /* status register */ +#define UART_DM_CR 0x0a8 /* command register */ +#define UART_DM_TF 0x100 /* transmit FIFO */ + +#define UART_DM_DMEN_TX_SC BIT_32(4) /* TX single character mode */ + +#define UART_DM_SR_TXRDY BIT_32(2) /* TX FIFO has space */ +#define UART_DM_SR_TXEMT BIT_32(3) /* TX FIFO is empty */ + +#define UART_DM_CR_RESET_RX (U(0x01) << 4) /* reset receiver */ +#define UART_DM_CR_RESET_TX (U(0x02) << 4) /* reset transmitter */ +#define UART_DM_CR_TX_ENABLE BIT_32(2) /* enable transmitter */ + + .globl console_uartdm_register + .globl console_uartdm_core_init + .globl console_uartdm_putc + .globl console_uartdm_core_putc + .globl console_uartdm_flush + .globl console_uartdm_core_flush + + /* ----------------------------------------------------------- + * int console_uartdm_register(console_t *console, + * uintptr_t base_addr) + * Function to initialize and register the console. The caller + * needs to pass an empty console_t structure in which *MUST* + * be allocated in persistent memory (e.g. a global or static + * local variable, *NOT* on the stack). + * In : r0 - pointer to empty console_t structure + * r1 - base address + * Out: r0 - 1 on success, 0 on error + * Clobber list : r0 - r7 + * ----------------------------------------------------------- + */ +func console_uartdm_register + str r1, [r0, #CONSOLE_T_BASE] + mov r7, lr + bl console_uartdm_core_init + mov lr, r7 + + /* Register the new console */ + finish_console_register uartdm putc=1, flush=1 +endfunc console_uartdm_register + + /* ----------------------------------------------------------- + * void console_uartdm_core_init(unused, uintptr_t base_addr) + * Function to initialize the console. + * In : r0 - unused + * r1 - base address + * Out: void + * Clobber list : r1, r2, r3 + * ----------------------------------------------------------- + */ +func console_uartdm_core_init + /* + * Try to flush remaining characters from the TX FIFO before resetting + * the transmitter. Unfortunately there is no good way to check if + * the transmitter is actually enabled (and will finish eventually), + * so use a timeout to avoid looping forever. + */ + mov r2, #65536 +1: + ldr r3, [r1, #UART_DM_SR] + tst r3, #UART_DM_SR_TXEMT + bne 2f + subs r2, r2, #1 + bne 1b + /* Timeout */ + +2: /* Reset receiver */ + mov r3, #UART_DM_CR_RESET_RX + str r3, [r1, #UART_DM_CR] + + /* Reset transmitter */ + mov r3, #UART_DM_CR_RESET_TX + str r3, [r1, #UART_DM_CR] + + /* + * Disable BAM/DMA modes but enable single-character mode for TX. + * The single character mode allows simplifying the putc implementation + * since characters can be written directly to the FIFO instead of + * having to initiate a new transfer and waiting for its completion. + */ + mov r3, #UART_DM_DMEN_TX_SC + str r3, [r1, #UART_DM_DMEN] + + /* Enable transmitter */ + mov r3, #UART_DM_CR_TX_ENABLE + str r3, [r1, #UART_DM_CR] + + bx lr +endfunc console_uartdm_core_init + + /* ----------------------------------------------------------- + * int console_uartdm_putc(int c, console_t *console) + * Function to output a character over the console. + * In : r0 - character to be printed + * r1 - pointer to console_t struct + * Out: r0 - printed character on success, < 0 on error. + * Clobber list : r0, r1, r2 + * ----------------------------------------------------------- + */ +func console_uartdm_putc + ldr r1, [r1, #CONSOLE_T_BASE] + b console_uartdm_core_putc +endfunc console_uartdm_putc + + /* ----------------------------------------------------------- + * int console_uartdm_core_putc(int c, uintptr_t base_addr) + * Function to output a character over the console. + * In : r0 - character to be printed + * r1 - base address + * Out: r0 - printed character on success, < 0 on error. + * Clobber list : r2 + * ----------------------------------------------------------- + */ +func console_uartdm_core_putc + cmp r0, #'\n' + bne 2f + +1: /* Loop until TX FIFO has space */ + ldr r2, [r1, #UART_DM_SR] + tst r2, #UART_DM_SR_TXRDY + beq 1b + + /* Prepend '\r' to '\n' */ + mov r2, #'\r' + str r2, [r1, #UART_DM_TF] + +2: /* Loop until TX FIFO has space */ + ldr r2, [r1, #UART_DM_SR] + tst r2, #UART_DM_SR_TXRDY + beq 2b + + /* Write character to FIFO */ + str r0, [r1, #UART_DM_TF] + bx lr +endfunc console_uartdm_core_putc + + /* ----------------------------------------------------------- + * void console_uartdm_flush(console_t *console) + * Function to force a write of all buffered data + * that has not been output. + * In : r0 - pointer to console_t struct + * Out: void + * Clobber list : r0, r1, r2, r3, r4, r5 + * ----------------------------------------------------------- + */ +func console_uartdm_flush + ldr r1, [r0, #CONSOLE_T_BASE] + b console_uartdm_core_flush +endfunc console_uartdm_flush + + /* ----------------------------------------------------------- + * void console_uartdm_core_flush(unused, uintptr_t base_addr) + * Function to force a write of all buffered data + * that has not been output. + * In : r0 - unused + * r1 - base address + * Out: void + * Clobber list : r2 + * ----------------------------------------------------------- + */ +func console_uartdm_core_flush +1: /* Loop until TX FIFO is empty */ + ldr r2, [r1, #UART_DM_SR] + tst r2, #UART_DM_SR_TXEMT + beq 1b + bx lr +endfunc console_uartdm_core_flush |