1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
|
/* prim_templates.h
* vi:ts=4 sw=4
*
* (c) Copyright 2012 Hewlett-Packard Development Company, L.P.
* Licensed under the Apache License, Version 2.0 (the "License"); you may
* not use this file except in compliance with the License. You may obtain
* a copy of the License at http://www.apache.org/licenses/LICENSE-2.0.
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express
* or implied. See the License for the specific language governing
* permissions and limitations under the License. Algorithms used by
* this code may be covered by patents by HP, Microsoft, or other parties.
*/
#ifdef __GNUC__
#pragma once
#endif
#ifndef FREERDP_LIB_PRIM_TEMPLATES_H
#define FREERDP_LIB_PRIM_TEMPLATES_H
/* These are prototypes for SSE (potentially NEON) routines that do a
* simple SSE operation over an array of data. Since so much of this
* code is shared except for the operation itself, these prototypes are
* used rather than duplicating code. The naming convention depends on
* the parameters: S=Source param; C=Constant; D=Destination.
* All the macros have parameters for a fallback procedure if the data
* is too small and an operation "the slow way" for use at 16-byte edges.
*/
/* SSE3 note: If someone needs to support an SSE2 version of these without
* SSE3 support, an alternative version could be added that merely checks
* that 16-byte alignment on both destination and source(s) can be
* achieved, rather than use LDDQU for unaligned reads.
*/
/* Note: the compiler is good at turning (16/sizeof(_type_)) into a constant.
* It easily can't do that if the value is stored in a variable.
* So don't save it as an intermediate value.
*/
/* ----------------------------------------------------------------------------
* SCD = Source, Constant, Destination
*/
#define SSE3_SCD_ROUTINE(_name_, _type_, _fallback_, _op_, _slowWay_) \
static pstatus_t _name_(const _type_* pSrc, UINT32 val, _type_* pDst, UINT32 len) \
{ \
INT32 shifts = 0; \
UINT32 offBeatMask; \
const _type_* sptr = pSrc; \
_type_* dptr = pDst; \
int count; \
if (val == 0) \
return PRIMITIVES_SUCCESS; \
if (val >= 16) \
return -1; \
if (len < 16) /* pointless if too small */ \
{ \
return _fallback_(pSrc, val, pDst, len); \
} \
if (sizeof(_type_) == 1) \
shifts = 1; \
else if (sizeof(_type_) == 2) \
shifts = 2; \
else if (sizeof(_type_) == 4) \
shifts = 3; \
else if (sizeof(_type_) == 8) \
shifts = 4; \
offBeatMask = (1 << (shifts - 1)) - 1; \
if ((ULONG_PTR)pDst & offBeatMask) \
{ \
/* Incrementing the pointer skips over 16-byte boundary. */ \
return _fallback_(pSrc, val, pDst, len); \
} \
/* Get to the 16-byte boundary now. */ \
while ((ULONG_PTR)dptr & 0x0f) \
{ \
_slowWay_; \
if (--len == 0) \
return PRIMITIVES_SUCCESS; \
} \
/* Use 8 128-bit SSE registers. */ \
count = len >> (8 - shifts); \
len -= count << (8 - shifts); \
if ((const ULONG_PTR)sptr & 0x0f) \
{ \
while (count--) \
{ \
__m128i xmm0 = _mm_lddqu_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm1 = _mm_lddqu_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm2 = _mm_lddqu_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm3 = _mm_lddqu_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm4 = _mm_lddqu_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm5 = _mm_lddqu_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm6 = _mm_lddqu_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm7 = _mm_lddqu_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
xmm0 = _op_(xmm0, val); \
xmm1 = _op_(xmm1, val); \
xmm2 = _op_(xmm2, val); \
xmm3 = _op_(xmm3, val); \
xmm4 = _op_(xmm4, val); \
xmm5 = _op_(xmm5, val); \
xmm6 = _op_(xmm6, val); \
xmm7 = _op_(xmm7, val); \
_mm_store_si128((__m128i*)dptr, xmm0); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm1); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm2); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm3); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm4); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm5); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm6); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm7); \
dptr += (16 / sizeof(_type_)); \
} \
} \
else \
{ \
while (count--) \
{ \
__m128i xmm0 = _mm_load_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm1 = _mm_load_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm2 = _mm_load_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm3 = _mm_load_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm4 = _mm_load_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm5 = _mm_load_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm6 = _mm_load_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm7 = _mm_load_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
xmm0 = _op_(xmm0, val); \
xmm1 = _op_(xmm1, val); \
xmm2 = _op_(xmm2, val); \
xmm3 = _op_(xmm3, val); \
xmm4 = _op_(xmm4, val); \
xmm5 = _op_(xmm5, val); \
xmm6 = _op_(xmm6, val); \
xmm7 = _op_(xmm7, val); \
_mm_store_si128((__m128i*)dptr, xmm0); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm1); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm2); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm3); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm4); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm5); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm6); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm7); \
dptr += (16 / sizeof(_type_)); \
} \
} \
/* Use a single 128-bit SSE register. */ \
count = len >> (5 - shifts); \
len -= count << (5 - shifts); \
while (count--) \
{ \
__m128i xmm0 = LOAD_SI128(sptr); \
sptr += (16 / sizeof(_type_)); \
xmm0 = _op_(xmm0, val); \
_mm_store_si128((__m128i*)dptr, xmm0); \
dptr += (16 / sizeof(_type_)); \
} \
/* Finish off the remainder. */ \
while (len--) \
{ \
_slowWay_; \
} \
return PRIMITIVES_SUCCESS; \
}
/* ----------------------------------------------------------------------------
* SCD = Source, Constant, Destination
* PRE = preload xmm0 with the constant.
*/
#define SSE3_SCD_PRE_ROUTINE(_name_, _type_, _fallback_, _op_, _slowWay_) \
static pstatus_t _name_(const _type_* pSrc, _type_ val, _type_* pDst, INT32 len) \
{ \
int shifts = 0; \
UINT32 offBeatMask; \
const _type_* sptr = pSrc; \
_type_* dptr = pDst; \
size_t count; \
__m128i xmm0; \
if (len < 16) /* pointless if too small */ \
{ \
return _fallback_(pSrc, val, pDst, len); \
} \
if (sizeof(_type_) == 1) \
shifts = 1; \
else if (sizeof(_type_) == 2) \
shifts = 2; \
else if (sizeof(_type_) == 4) \
shifts = 3; \
else if (sizeof(_type_) == 8) \
shifts = 4; \
offBeatMask = (1 << (shifts - 1)) - 1; \
if ((ULONG_PTR)pDst & offBeatMask) \
{ \
/* Incrementing the pointer skips over 16-byte boundary. */ \
return _fallback_(pSrc, val, pDst, len); \
} \
/* Get to the 16-byte boundary now. */ \
while ((ULONG_PTR)dptr & 0x0f) \
{ \
_slowWay_; \
if (--len == 0) \
return PRIMITIVES_SUCCESS; \
} \
/* Use 4 128-bit SSE registers. */ \
count = len >> (7 - shifts); \
len -= count << (7 - shifts); \
xmm0 = _mm_set1_epi32(val); \
if ((const ULONG_PTR)sptr & 0x0f) \
{ \
while (count--) \
{ \
__m128i xmm1 = _mm_lddqu_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm2 = _mm_lddqu_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm3 = _mm_lddqu_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm4 = _mm_lddqu_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
xmm1 = _op_(xmm1, xmm0); \
xmm2 = _op_(xmm2, xmm0); \
xmm3 = _op_(xmm3, xmm0); \
xmm4 = _op_(xmm4, xmm0); \
_mm_store_si128((__m128i*)dptr, xmm1); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm2); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm3); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm4); \
dptr += (16 / sizeof(_type_)); \
} \
} \
else \
{ \
while (count--) \
{ \
__m128i xmm1 = _mm_load_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm2 = _mm_load_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm3 = _mm_load_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
__m128i xmm4 = _mm_load_si128((const __m128i*)sptr); \
sptr += (16 / sizeof(_type_)); \
xmm1 = _op_(xmm1, xmm0); \
xmm2 = _op_(xmm2, xmm0); \
xmm3 = _op_(xmm3, xmm0); \
xmm4 = _op_(xmm4, xmm0); \
_mm_store_si128((__m128i*)dptr, xmm1); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm2); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm3); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm4); \
dptr += (16 / sizeof(_type_)); \
} \
} \
/* Use a single 128-bit SSE register. */ \
count = len >> (5 - shifts); \
len -= count << (5 - shifts); \
while (count--) \
{ \
__m128i xmm1 = LOAD_SI128(sptr); \
sptr += (16 / sizeof(_type_)); \
xmm1 = _op_(xmm1, xmm0); \
_mm_store_si128((__m128i*)dptr, xmm1); \
dptr += (16 / sizeof(_type_)); \
} \
/* Finish off the remainder. */ \
while (len--) \
{ \
_slowWay_; \
} \
return PRIMITIVES_SUCCESS; \
}
/* ----------------------------------------------------------------------------
* SSD = Source1, Source2, Destination
*/
#define SSE3_SSD_ROUTINE(_name_, _type_, _fallback_, _op_, _slowWay_) \
static pstatus_t _name_(const _type_* pSrc1, const _type_* pSrc2, _type_* pDst, UINT32 len) \
{ \
int shifts = 0; \
UINT32 offBeatMask; \
const _type_* sptr1 = pSrc1; \
const _type_* sptr2 = pSrc2; \
_type_* dptr = pDst; \
size_t count; \
if (len < 16) /* pointless if too small */ \
{ \
return _fallback_(pSrc1, pSrc2, pDst, len); \
} \
if (sizeof(_type_) == 1) \
shifts = 1; \
else if (sizeof(_type_) == 2) \
shifts = 2; \
else if (sizeof(_type_) == 4) \
shifts = 3; \
else if (sizeof(_type_) == 8) \
shifts = 4; \
offBeatMask = (1 << (shifts - 1)) - 1; \
if ((ULONG_PTR)pDst & offBeatMask) \
{ \
/* Incrementing the pointer skips over 16-byte boundary. */ \
return _fallback_(pSrc1, pSrc2, pDst, len); \
} \
/* Get to the 16-byte boundary now. */ \
while ((ULONG_PTR)dptr & 0x0f) \
{ \
pstatus_t status; \
status = _slowWay_; \
if (status != PRIMITIVES_SUCCESS) \
return status; \
if (--len == 0) \
return PRIMITIVES_SUCCESS; \
} \
/* Use 4 128-bit SSE registers. */ \
count = len >> (7 - shifts); \
len -= count << (7 - shifts); \
if (((const ULONG_PTR)sptr1 & 0x0f) || ((const ULONG_PTR)sptr2 & 0x0f)) \
{ \
/* Unaligned loads */ \
while (count--) \
{ \
__m128i xmm0 = _mm_lddqu_si128((const __m128i*)sptr1); \
sptr1 += (16 / sizeof(_type_)); \
__m128i xmm1 = _mm_lddqu_si128((const __m128i*)sptr1); \
sptr1 += (16 / sizeof(_type_)); \
__m128i xmm2 = _mm_lddqu_si128((const __m128i*)sptr1); \
sptr1 += (16 / sizeof(_type_)); \
__m128i xmm3 = _mm_lddqu_si128((const __m128i*)sptr1); \
sptr1 += (16 / sizeof(_type_)); \
__m128i xmm4 = _mm_lddqu_si128((const __m128i*)sptr2); \
sptr2 += (16 / sizeof(_type_)); \
__m128i xmm5 = _mm_lddqu_si128((const __m128i*)sptr2); \
sptr2 += (16 / sizeof(_type_)); \
__m128i xmm6 = _mm_lddqu_si128((const __m128i*)sptr2); \
sptr2 += (16 / sizeof(_type_)); \
__m128i xmm7 = _mm_lddqu_si128((const __m128i*)sptr2); \
sptr2 += (16 / sizeof(_type_)); \
xmm0 = _op_(xmm0, xmm4); \
xmm1 = _op_(xmm1, xmm5); \
xmm2 = _op_(xmm2, xmm6); \
xmm3 = _op_(xmm3, xmm7); \
_mm_store_si128((__m128i*)dptr, xmm0); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm1); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm2); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm3); \
dptr += (16 / sizeof(_type_)); \
} \
} \
else \
{ \
/* Aligned loads */ \
while (count--) \
{ \
__m128i xmm0 = _mm_load_si128((const __m128i*)sptr1); \
sptr1 += (16 / sizeof(_type_)); \
__m128i xmm1 = _mm_load_si128((const __m128i*)sptr1); \
sptr1 += (16 / sizeof(_type_)); \
__m128i xmm2 = _mm_load_si128((const __m128i*)sptr1); \
sptr1 += (16 / sizeof(_type_)); \
__m128i xmm3 = _mm_load_si128((const __m128i*)sptr1); \
sptr1 += (16 / sizeof(_type_)); \
__m128i xmm4 = _mm_load_si128((const __m128i*)sptr2); \
sptr2 += (16 / sizeof(_type_)); \
__m128i xmm5 = _mm_load_si128((const __m128i*)sptr2); \
sptr2 += (16 / sizeof(_type_)); \
__m128i xmm6 = _mm_load_si128((const __m128i*)sptr2); \
sptr2 += (16 / sizeof(_type_)); \
__m128i xmm7 = _mm_load_si128((const __m128i*)sptr2); \
sptr2 += (16 / sizeof(_type_)); \
xmm0 = _op_(xmm0, xmm4); \
xmm1 = _op_(xmm1, xmm5); \
xmm2 = _op_(xmm2, xmm6); \
xmm3 = _op_(xmm3, xmm7); \
_mm_store_si128((__m128i*)dptr, xmm0); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm1); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm2); \
dptr += (16 / sizeof(_type_)); \
_mm_store_si128((__m128i*)dptr, xmm3); \
dptr += (16 / sizeof(_type_)); \
} \
} \
/* Use a single 128-bit SSE register. */ \
count = len >> (5 - shifts); \
len -= count << (5 - shifts); \
while (count--) \
{ \
__m128i xmm0 = LOAD_SI128(sptr1); \
sptr1 += (16 / sizeof(_type_)); \
__m128i xmm1 = LOAD_SI128(sptr2); \
sptr2 += (16 / sizeof(_type_)); \
xmm0 = _op_(xmm0, xmm1); \
_mm_store_si128((__m128i*)dptr, xmm0); \
dptr += (16 / sizeof(_type_)); \
} \
/* Finish off the remainder. */ \
while (len--) \
{ \
_slowWay_; \
} \
return PRIMITIVES_SUCCESS; \
}
#endif /* FREERDP_LIB_PRIM_TEMPLATES_H */
|