tests/fuzz/corpus/lys_parse_mem/issue970.yang


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module p{
	namespace "";
	prefix p;

	container ports{
		list port {
			key name;
			leaf name{	
				type string;}	
		}	
	}	
	augment "/ports/port" {
		when "0</*=0";
		leaf i {
			type int32;
		}
	}
}