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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-11 08:27:49 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-11 08:27:49 +0000
commitace9429bb58fd418f0c81d4c2835699bddf6bde6 (patch)
treeb2d64bc10158fdd5497876388cd68142ca374ed3 /Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml
parentInitial commit. (diff)
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Adding upstream version 6.6.15.upstream/6.6.15
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/mediatek/mediatek,pwrap.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek PMIC Wrapper
+
+maintainers:
+ - Flora Fu <flora.fu@mediatek.com>
+ - Alexandre Mergnat <amergnat@baylibre.com>
+
+description:
+ On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface
+ is not directly visible to the CPU, but only through the PMIC wrapper
+ inside the SoC. The communication between the SoC and the PMIC can
+ optionally be encrypted. Also a non standard Dual IO SPI mode can be
+ used to increase speed.
+
+ IP Pairing
+
+ On MT8135 the pins of some SoC internal peripherals can be on the PMIC.
+ The signals of these pins are routed over the SPI bus using the pwrap
+ bridge. In the binding description below the properties needed for bridging
+ are marked with "IP Pairing". These are optional on SoCs which do not support
+ IP Pairing
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - mediatek,mt2701-pwrap
+ - mediatek,mt6765-pwrap
+ - mediatek,mt6779-pwrap
+ - mediatek,mt6795-pwrap
+ - mediatek,mt6797-pwrap
+ - mediatek,mt6873-pwrap
+ - mediatek,mt7622-pwrap
+ - mediatek,mt8135-pwrap
+ - mediatek,mt8173-pwrap
+ - mediatek,mt8183-pwrap
+ - mediatek,mt8186-pwrap
+ - mediatek,mt8188-pwrap
+ - mediatek,mt8195-pwrap
+ - mediatek,mt8365-pwrap
+ - mediatek,mt8516-pwrap
+ - items:
+ - enum:
+ - mediatek,mt8186-pwrap
+ - mediatek,mt8195-pwrap
+ - const: syscon
+
+ reg:
+ minItems: 1
+ items:
+ - description: PMIC wrapper registers
+ - description: IP pairing registers
+
+ reg-names:
+ minItems: 1
+ items:
+ - const: pwrap
+ - const: pwrap-bridge
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 2
+ items:
+ - description: SPI bus clock
+ - description: Main module clock
+ - description: System module clock
+ - description: Timer module clock
+
+ clock-names:
+ minItems: 2
+ items:
+ - const: spi
+ - const: wrap
+ - const: sys
+ - const: tmr
+
+ resets:
+ minItems: 1
+ items:
+ - description: PMIC wrapper reset
+ - description: IP pairing reset
+
+ reset-names:
+ minItems: 1
+ items:
+ - const: pwrap
+ - const: pwrap-bridge
+
+ pmic:
+ type: object
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - clocks
+ - clock-names
+
+dependentRequired:
+ resets: [reset-names]
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: mediatek,mt8365-pwrap
+ then:
+ properties:
+ clocks:
+ minItems: 4
+
+ clock-names:
+ minItems: 4
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/reset/mt8135-resets.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ pwrap@1000f000 {
+ compatible = "mediatek,mt8135-pwrap";
+ reg = <0 0x1000f000 0 0x1000>,
+ <0 0x11017000 0 0x1000>;
+ reg-names = "pwrap", "pwrap-bridge";
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk26m>, <&clk26m>;
+ clock-names = "spi", "wrap";
+ resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>,
+ <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>;
+ reset-names = "pwrap", "pwrap-bridge";
+ };
+ };