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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-11 08:27:49 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-11 08:27:49 +0000 |
commit | ace9429bb58fd418f0c81d4c2835699bddf6bde6 (patch) | |
tree | b2d64bc10158fdd5497876388cd68142ca374ed3 /arch/arm/boot/dts/st/ste-hrefprev60.dtsi | |
parent | Initial commit. (diff) | |
download | linux-ace9429bb58fd418f0c81d4c2835699bddf6bde6.tar.xz linux-ace9429bb58fd418f0c81d4c2835699bddf6bde6.zip |
Adding upstream version 6.6.15.upstream/6.6.15
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'arch/arm/boot/dts/st/ste-hrefprev60.dtsi')
-rw-r--r-- | arch/arm/boot/dts/st/ste-hrefprev60.dtsi | 122 |
1 files changed, 122 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/st/ste-hrefprev60.dtsi b/arch/arm/boot/dts/st/ste-hrefprev60.dtsi new file mode 100644 index 0000000000..9859ee91a1 --- /dev/null +++ b/arch/arm/boot/dts/st/ste-hrefprev60.dtsi @@ -0,0 +1,122 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2012 ST-Ericsson AB + * + * Device Tree for the HREF+ prior to the v60 variant. + */ + +#include "ste-href-ab8500.dtsi" +#include "ste-href.dtsi" + +/ { + gpio_keys { + button@1 { + gpios = <&tc3589x_gpio 7 GPIO_ACTIVE_HIGH>; + }; + }; + + soc { + /* Enable UART1 on this board */ + serial@80121000 { + status = "okay"; + }; + + i2c@80004000 { + tps61052@33 { + compatible = "ti,tps61052"; + reg = <0x33>; + }; + + tc35892@42 { + compatible = "toshiba,tc35892"; + reg = <0x42>; + interrupt-parent = <&gpio6>; + interrupts = <25 IRQ_TYPE_EDGE_RISING>; + pinctrl-names = "default"; + pinctrl-0 = <&tc35892_hrefprev60_mode>; + + interrupt-controller; + #interrupt-cells = <1>; + + tc3589x_gpio: tc3589x_gpio { + compatible = "tc3589x-gpio"; + interrupts = <0>; + + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + }; + }; + }; + + spi@80002000 { + /* + * On the first generation boards, this SSP/SPI port was connected + * to the AB8500. + */ + pinctrl-names = "default"; + pinctrl-0 = <&ssp0_hrefprev60_mode>; + status = "okay"; + }; + + // External Micro SD slot + mmc@80126000 { + cd-gpios = <&tc3589x_gpio 3 GPIO_ACTIVE_HIGH>; + }; + + pinctrl { + /* Set this up using hogs */ + pinctrl-names = "default"; + pinctrl-0 = <&ipgpio_hrefprev60_mode>; + + ssp0 { + ssp0_hrefprev60_mode: ssp0_hrefprev60_default { + hrefprev60_mux { + function = "ssp0"; + groups = "ssp0_a_1"; + }; + hrefprev60_cfg1 { + pins = "GPIO145_C13"; /* RXD */ + ste,config = <&in_pd>; + }; + + }; + }; + sdi0 { + /* This additional pin needed on early MOP500 and HREFs previous to v60 */ + sdi0_default_mode: sdi0_default { + hrefprev60_mux { + function = "mc0"; + groups = "mc0dat31dir_a_1"; + }; + hrefprev60_cfg1 { + pins = "GPIO21_AB3"; /* DAT31DIR */ + ste,config = <&out_hi>; + }; + + }; + }; + tc35892 { + tc35892_hrefprev60_mode: tc35892_hrefprev60 { + hrefprev60_cfg { + pins = "GPIO217_AH12"; + ste,config = <&gpio_in_pu>; + }; + }; + }; + ipgpio { + ipgpio_hrefprev60_mode: ipgpio_hrefprev60 { + hrefprev60_mux { + function = "ipgpio"; + groups = "ipgpio0_c_1", "ipgpio1_c_1"; + }; + hrefprev60_cfg1 { + pins = "GPIO6_AF6", "GPIO7_AG5"; + ste,config = <&in_pu>; + }; + }; + }; + }; + }; +}; |